JPH0756895B2 - Mesa type semiconductor substrate - Google Patents

Description

The present invention relates to a mesa-type semiconductor substrate, and more particularly to a positive mesa structure included in the configuration of a mesa-type rectifying element having bidirectional characteristics. Used as a semiconductor substrate (also referred to as a positive bevel structure).

(Prior Art) The prior art will be described below by taking a mesa type semiconductor substrate included in the configuration of the bidirectional rectifying element as an example. The bidirectional rectifying element is mainly used for surge voltage protection of telephones, AC motors and the like. Normally, a varistor or a glass-sealed discharge gap is often used, but a varistor or a glass-sealed discharge gap has a slow response speed of several μsec, and is bidirectional to follow a faster response speed. Semiconductor element is required.

FIG. 4 shows a cross-sectional view including a manufacturing process of a conventional bidirectional rectifying element. As shown in FIG. 3A, impurities are diffused from both sides of the N-type semiconductor substrate 1 to form high-concentration P ⁺ -type layers 2a and 2b, and PN junctions by these are defined as J ₁ and J ₂ . Next, Ni on both main surfaces
After plating or V-Ni-Au vapor deposition, patterning to the required size by photo-etching method, etc., to form the electrode 3, and separating the wafer by a chemical etching method or a mechanical method such as a blade. A plurality of semiconductor chips as shown in (b) can be formed. This figure shows a mesa structure in which the electrode bonding solder material 4 is attached to the chip. In addition, a separation groove is formed on the substrate,
In the so-called glass passivation in which glass is baked and then separated on the bonded exposed surface of the groove, the same mesa shape is obtained. Using the chip manufactured by the above method, for example, an axial type bidirectional rectifying element is prepared as shown in FIG. In this device, the side surface of the chip, that is, the mesa surface has a so-called negative mesa structure having an inclination that the surface area increases from the P ⁺ type layers 2a, 2b toward the N type layer, and the junction J ₁ , The J ₂ end is formed at a shallow position near the main surface. Fig. 5 shows the ideal V of this device.
The -I characteristic is shown by the solid line a. Bidirectionally, it has characteristics similar to a constant voltage diode with V ₁ and V ₂ as Zener voltages. As an application example, one or more of these elements are connected in series to have a constant voltage characteristic of the maximum rated voltage of the AC motor or less, and by connecting in parallel to both ends of the motor, surge voltage of the maximum rated voltage or less The motor can be protected.

(Motor to be Solved by the Invention) The bidirectional rectifying element produced as described above is a mesa type,
In both glass passivation and the mesa surface of the chip has a negative mesa structure, the electric field strength in the vicinity of the junction of the mesa surface when a voltage is applied becomes stronger than the electric field strength inside the junction, and the dielectric strength of the mesa surface is likely to deteriorate. For example, when a voltage of about 100 V or more is applied to both ends of the element at a high temperature (about 150 ° C.), its VI characteristic is as shown by the broken line b in FIG.
This may cause a problem that the reverse leakage current increases, which is a problem.

Further, as shown in FIG. 4 (c), when the lead electrode (for example, Cu lead is plated with Ni) 5 and the chip are fused with the solder material 4 in the bidirectional rectifying element, the solder material hangs down on the silicon chip. Sometimes. In this element, since the PN junction end is exposed at a position shallower than the chip main surface, in some cases, the PN junction may short-circuit.

An object of the present invention is to provide a PN junction in which the junction end is exposed on the mesa surface.
In a semiconductor substrate with two electrodes, when a voltage is applied at high temperature as described above, the reverse leakage current of the reverse-biased junction increases, or when the lead electrode is fused to the chip with a solder material, the PN junction is An object of the present invention is to provide a mesa-type semiconductor substrate which does not cause a short circuit and is reliable and whose yield can be improved.

[Structure of the Invention] (Means and Actions for Solving Problems) The mesa semiconductor substrate of the present invention comprises a semiconductor layer of one conductivity type and a semiconductor layer of opposite conductivity type having a higher impurity concentration than the layer. A semiconductor substrate in which two high-concentration-layer-side main surfaces are superposed and closely bonded to each other, and two side surfaces of the base body are composed of two mesa surfaces. Both have a positive mesa structure with an inclination that the area decreases from the high-concentration layer in the middle of the substrate toward the two low-concentration layers on the main surface side of the base, and the PN junction is formed from the main surface of the base. It is characterized in that it is formed at a position deeper than the middle of the thickness of the substrate.

As described above, in the present invention, since the adhesive semiconductor substrate in which the high-concentration layers of the two substrates are tightly joined is used, PN
The joining position can be easily formed in the intermediate portion deeper than the main surface of the substrate. As a result, it is not necessary to form a deep high-concentration layer by diffusion at high temperature for a long time in the prior art, and therefore a uniform PN junction can be obtained. Further, in the subsequent steps, electrodes are attached and chips are separated as in the conventional method to obtain a mesa surface having a positive mesa structure. As a result, the electric field strength near the junction of the mesa surface when a voltage is applied is smaller than the electric field strength of the junction inside the chip, and even if a voltage is applied at high temperature, the reverse leakage current is small and constant, and a stable constant voltage characteristic is obtained. Is obtained. Also, in the case of an adhesive semiconductor substrate, the distance between the PN junction position on the mesa surface and the main surface of the substrate can be made sufficiently large, and when used for a bidirectional rectifying device, etc., when the lead electrode is fused to the chip with a solder material. The short-circuiting of the joint part due to the solder material is significantly reduced.

(Example) An example of the mesa type semiconductor substrate of the present invention is shown in FIG. As shown in the figure, the substrate 10 is composed of N-type semiconductor layers 11N and 1N.
2N and, a high impurity concentration than the N layer P ⁺ -type semiconductor layer 11P of the first and second semiconductor substrates 11 and 12 formed with the P ⁺ N junction J ₁ and J ₂ and the 12P are stacked respectively P ⁺ This is an adhesive semiconductor substrate in which the layer-side main surfaces are adhered and joined together to form an integrated adhesive surface 18.
The side surface of the substrate has a positive mesa angle (also referred to as a bevel angle) θ ₁ or θ ₂ whose surface area decreases from the intermediate P ⁺ layer 11P or 12P toward the main surface N layer 11N or 12N. Surface 11S,
Made of 12S.

When a voltage is applied between both main surfaces of this substrate, the junction J ₁ or J ₂
One of the two is reverse biased and a depletion layer is formed.
Since it has a positive mesa angle as is well known, the thickness of the depletion layer at the exposed portion of the junction is larger than the thickness inside the junction, and the electric field strength of the exposed portion is weaker than the internal electric field strength.
It is extremely effective in improving the breakdown voltage and stabilizing the reverse leakage current. Further, since it is an adhesive semiconductor substrate, it is possible to easily form two positive mesa structures, and it is also easy to provide the PN junction position at a deep intermediate portion from the main surface of the substrate. In addition, P ⁺ layer 11P and P
The impurity concentrations of the ⁺ layer 12P or the N layer 11N and the N layer 12N do not have to be equal to each other, and the first and second semiconductor substrates 11 and 12 are P-type substrates, the N ⁺ layer is formed, and the N ⁺ layers are connected to each other. It may be adhered, and when the substrate is used for a semiconductor device, it goes without saying that a desired semiconductor layer constituting the device is formed on the N layer 11N or the N layer 12N.

Next, an embodiment in which the above mesa type semiconductor substrate is applied to a bidirectional rectifying device will be described with reference to FIGS. The same reference numerals as those in FIG. 1 represent the same parts, and the description thereof will be omitted. First, a first N-type semiconductor substrate (wafer) 11 and a second N-type semiconductor substrate (wafer) 12 are prepared, and high-concentration P-type impurities are diffused from one main surface of each to form P ⁺ N junctions J ₁ and J ₂ To form. Next, the surfaces of the P ⁺ layers 11P and 12P of the wafers 11 and 12 are mirror-polished to obtain a surface roughness of 500.
Å Form below. At this time, depending on the surface condition of the wafer, a pretreatment step of H ₂ O ₂ + H ₂ SO ₄ → HF → dilute HF is continuously performed to remove the stain film and the stain film adhered to the wafer surface. Next, the wafer mirror surface is washed with clean water for about several minutes, and a dehydration treatment such as a spinner treatment is performed at room temperature. The wafers that have undergone these treatments are placed in, for example, a clean atmosphere of class 1 or less, and are stacked in such a manner that no foreign matter is substantially present between their mirror surfaces.
Bond them closely to each other. The wafer thus bonded is heat-treated at 200 ° C. or higher, preferably 1000 ° C. to 1200 ° C. FIG. 2 is a partial sectional view of the bonded wafer thus obtained. Reference numeral 18 represents an adhesive surface.

Both surfaces of the bonded substrate obtained by the wafer bonding technique as described above are ground to the required dimensions. Thereafter, as in the conventional method, a Ni plating film or a V-Ni-Au vapor deposition film is formed on both surfaces of the adhesive substrate, and then patterned into a predetermined size by a photo-etching method or the like to form a predetermined electrode 13. Next, by chemical cut or glass passivation, it is divided into a plurality of chips as shown in FIG. 1 (electrodes are formed in this embodiment), and the chip shape is a regular mesa. Then the lead electrode (eg Cu
The lead is Ni-plated) 15 and the chip electrode 13 are fused with a solder material 14. Next, a glass passivation film 16 is formed and sealed with resin 17 or the like to obtain the bidirectional rectifying element shown in FIG. In the device of this embodiment, it is often preferable that the bidirectional characteristics are symmetrical, so that the high-concentration layers 11P and 12P of the two semiconductor substrates have the same impurity density, and the N-layers 11N and 12N have the same impurity density. And their thicknesses are made equal to each other.

The trial result of this example shows that even in a high temperature (about 150 ° C.) state,
VI which is almost equal to the ideal characteristic shown by the solid line a in FIG.
The characteristics were obtained. That is, the reverse leakage current is extremely small and shows a stable value at a voltage equal to or lower than the breakdown voltage V ₁ (= V ₂ ), and in soldering the lead electrodes, short-circuit defects due to the solder material of the PN junction are significantly reduced. .

EFFECTS OF THE INVENTION Since the side surface of the mesa type semiconductor substrate of the present invention is composed of two mesa surfaces having a positive mesa structure, the current may increase the reverse leakage of the reverse biased junction when a voltage is applied at a high temperature. Never. Further, since the adhesive substrate is used, it is easy to form the positive mesa surface, the distance between the PN junction position and the solder electrode can be made large, and the short circuit defect due to the solder material is eliminated. As a result, it was possible to provide a mesa-type semiconductor substrate with improved reliability and yield.

[Brief description of drawings]

1 is a cross-sectional view of a mesa type semiconductor substrate of the present invention, FIG. 2 is a partial cross-sectional view of an adhesive semiconductor substrate used when manufacturing the substrate of FIG. 1, and FIG. 4 is a cross-sectional view of the device when applied to a static rectifying device, and FIG. 4 is a cross-sectional view of the device including a manufacturing process of a conventional bidirectional rectifying device, and FIG. 4A shows two P ⁺ N junctions formed. Partial cross-sectional view of the substrate,
5B is a sectional view of the divided chip, FIG. 5C is a sectional view of the element, and FIG. 5 is a VI characteristic diagram of the bidirectional rectifying element of the present invention and the related art. 10 ... Mesa type semiconductor substrate, 11 ... First semiconductor substrate, 12 ...
… Second semiconductor substrate, 11P, 12P …… P ⁺ type semiconductor layer, 11N, 12N
... N-type semiconductor layer, 11S, 12S ... Mesa surface, 13 ... Electrode, 1
4 …… Solder material, 15 …… Lead electrode, 18 …… Adhesive surface, J ₁ , J ₂
...... PN junction.

Claims (2)

[Claims] 1. A high-concentration-layer-side main surface of each of two semiconductor substrates having a PN junction formed by laminating a semiconductor layer of one conductivity type and a semiconductor layer of an opposite conductivity type having a higher impurity concentration than that layer. A semiconductor substrate in which the above are closely bonded to each other, and the side surface of the substrate is composed of two mesa surfaces, and the two mesa surfaces are two high-concentration layers in the middle of the substrate to two low-concentration layers on the main surface side of the substrate. Forming a positive mesa structure with an inclination that the area becomes smaller toward, and the two PN junctions are formed at a position deeper from the main surface of the base body to the middle of the thickness of the substrate. A mesa type semiconductor substrate. 2. The mesa-type semiconductor substrate is included in a structure of a bidirectional rectifying element, and the impurity concentrations of the high-concentration opposite-conductivity-type semiconductor layers of the two semiconductor substrates are substantially equal to each other or the one-conductivity-type semiconductor layer. The mesa type semiconductor substrate according to claim 1, wherein the impurity concentrations of the above are substantially equal to each other.