JPH0751794Y2 - Semiconductor mounting structure - Google Patents

Description

[Detailed description of the device]

[0001]

[Industrial application] This invention is a film carrier (T
AB: Tape Automated Bondin
The present invention relates to a semiconductor mounting structure for mounting an electronic component such as a semiconductor chip on a wiring board using g).

[0002]

2. Description of the Related Art Conventionally, as the performance of semiconductor chips such as ICs and LSIs has been improved, remarkably high-density mounting technology has been required. Therefore, in recent years, as a technique for connecting electronic components such as semiconductor chips having high-density multi-terminals such as IC chips onto a wiring board with high reliability, a film carrier (TAB) is used to mount electronic components on a printed wiring board. Mounting technology for high-density surface mounting has been developed and put into practical use.

[0003]

However, in the above-mentioned conventional mounting technique, when a TAB package formed by a film carrier on which a semiconductor chip is mounted is mounted on a substrate, the semiconductor chip and the substrate are naturally attached to each other. However, there is a problem that a connection connector, a connection wire, and the like are separately required to connect this board to another board, and it is not possible to cope with high packaging density.

Therefore, the present invention has been made in consideration of the above circumstances, and in a TAB package formed by a film carrier on which a semiconductor chip is mounted, it becomes possible to connect the semiconductor chips and the substrates to each other. It is an object of the present invention to provide a semiconductor mounting structure that can cope with higher packaging density.

[0005]

In order to achieve the above-mentioned object, the present invention is characterized in that a bypass wiring pattern is formed in a TAB package formed by a film carrier on which a semiconductor chip is mounted. is there.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of a semiconductor mounting structure according to the present invention will be described below with reference to the drawings. FIG. 1 is an overall perspective view showing a semiconductor mounting structure in this embodiment, and FIG. 2 is a plan view showing the structure of a film carrier (TAB) type semiconductor. 3A and 3B are side views of the mounting structure.

First, as shown in FIG. 2, the structure of a film carrier (TAB) type semiconductor has a sprocket hole (11) for transportation and positioning, a device hole (19) which is an opening portion into which a semiconductor chip (1) is inserted, and A metal foil such as copper is adhered onto an insulating film such as a polyimide having an OLB hole (20), and the metal foil is etched to form leads (inner leads (15) and outer leads (16)) having a desired shape. A film carrier tape (10) is manufactured by forming a pad (14) for electrical screening.
Further, bumps which are metal protrusions are formed on the electrode terminals of the semiconductor chip (1).

Next, the inner leads (15) of the film carrier tape (10) and the bumps of the semiconductor chip (1) are inner lead bonded (ILB) by a thermocompression bonding method or a eutectic method, and attached to the film carrier tape. In this state, a contactor is brought into contact with the electric selection pad (14) to perform electric selection and bias test of the semiconductor chip (1). As a result, the film carrier type semiconductor device is completed. In addition, in order to improve reliability and mechanical protection, the resin may be potted for resin sealing.

Then, in order to mount the above film carrier type semiconductor device on the wiring board (2), it is cut into a predetermined length (predetermined shape) to form a TAB package (5).

In this embodiment, the TAB package (5) is provided with the connecting portions (4) and (4) for connecting to the wiring board (2). Further, the TAB package (5) is provided with a plurality of bypass wiring patterns (6), and the connecting portions (7) and (7) at both ends are electrically connected without passing through the semiconductor chip (1). It is formed of a conductive metal material so as to form a connected configuration.

In this embodiment, as shown in FIG.
When the TAB package (5) formed as described above is mounted on the substrate (2), the semiconductor chip (1) and the substrate (2) are connected by the leads (16), and the substrate (2) ) And the other substrate (2a) are connected to each other by a wiring pattern (6) for bypass. In the case of such a TAB package (5), a wiring pattern having a pitch of about 100 μm is possible, and for example, if the allowable width (A) of the wiring pattern (6) portion is about 3 mm, 30
The number of books, 60 on both sides, is possible, which is an advantage that many can be connected at one time.

The step of outer lead bonding (OLB) the outer leads (16) and the wiring pattern (6) to the conductive patterns of the wiring boards (2) and (2a) is performed by a pressure tool as in the ILB step. Is performed by heating under pressure, and the joining is performed by a thermocompression bonding method, a eutectic method, brazing using solder, or the like. Also,
The wiring pattern (6) is not limited to the above-mentioned soldering and the like as long as the fine pitch is about 0.2 mm, and the connection may be made with an anisotropic conductive film.

By the way, the TAB package (5) of this embodiment is provided with a plurality of bent portions (for example, slits) (3) for allowing the TAB package (5) to be bent. Therefore, as shown in (a) and (b) of FIG. 3, the mounted substrate (2) and the other substrate (2a) are arbitrary, such as approximately 180 ° or approximately 90 °, depending on the arrangement state of the substrates. There is an advantage that it can be set to an angle.

In the TAB package (5), when the wiring pattern (6) for bypass is unnecessary, only the IC portion is punched out so that it can be used as a conventional TAB shape. .

The preferred embodiment of the present invention has been described above in detail, but the present invention is not limited to this, and it is apparent that various modifications can be made without departing from the scope of the present invention. Is.

For example, in the above-described embodiment, bypass wiring patterns (6) are provided on both sides of the TAB package (5).
Although it is provided, it may be provided only on one side. Further, in the above-described embodiments, the example in which one semiconductor chip (1) is mounted on the TAB package (5) has been described, but the present invention is not limited to this, and it is needless to say that two or more (plural) semiconductor chips can be mounted. Further, the bent portion (3) is not limited to the slit shape as in the present embodiment, and can be replaced with various structures such as dents, perforations and thinness, which enable the TAB package (5) to be bent. Further, in the above-described embodiment, a printed wiring board (PC) is used as a board for connecting the TAB package (5).
Although B) is taken as an example, the present invention is not limited to this, and it is needless to say that it can be applied to a flexible printed wiring board (FPC) or the like.

As described above, according to this embodiment, the T formed by the film carrier on which the semiconductor chip (1) is mounted.
By forming the bypass wiring pattern (6) on the AB package (5), the semiconductor chip (1) and the substrates (2) and (2a) can be connected to each other.
It has the advantage of being able to handle high-density mounting. Also, the above T
Since the AB package (5) is provided with the bending portion (3) and can be bent, there is an advantage that it can be set to an arbitrary angle according to the arrangement state of the mounted boards (2) and (2a).

[0018]

As described above in detail, according to the present invention, a semiconductor chip is mounted and a wiring pattern for bypass is formed on a TAB package formed by a film carrier. It is possible to connect with, and it is possible to achieve the effect of being able to cope with higher packaging density.

[Brief description of drawings]

FIG. 1 is a perspective view showing an embodiment of a semiconductor mounting structure according to the present invention.

FIG. 2 is a plan view showing the structure of a film carrier (TAB) type semiconductor on which a semiconductor chip is mounted.

FIG. 3 is a side view showing another example of a semiconductor mounting structure according to the present invention.

[Explanation of symbols]

 (1) Semiconductor chip (2) (2a) Wiring board (3) Bent portion (4) (7) Connection portion (5) TAB package (6) Wiring pattern

Claims (1)

[Scope of utility model registration request] 1. A semiconductor mounting structure in which a bypass wiring pattern is formed on a TAB package formed by a film carrier on which a semiconductor chip is mounted.