JPH07500227A - “VAN” system with additional access protocols for open circuit conditions - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] rVANJ system with additional access protocols for open circuit conditions The present invention provides a data communication bus that interconnects these modules. between the first and second lines (both detectable by two electronic modules, Concerning a transmission method for digital data sent in the form of differential voltage signal frames . More particularly, the present invention provides a multi-function device for controlling various functions within a motor vehicle. Its design is implemented in a set of superimposed electronic modules. Regarding such methods. Moreover, to be more specific, the present invention provides information between modules. eliminates adverse effects from accidental oven circuit conditions that can affect the transmission of information. designed to prevent. Regarding such methods.

Nowadays, it is used for general electrical cable wiring in automobiles.

by electrical supply bus as well as for control of actuators or sensors. A device interconnecting the electronic modules for the acquisition of signals received from the Research and development is underway to replace it with a digital data transmission bus. example For example, [30/TC22/SC3/WGIN] published by the International Organization for Standardization. 429 French Preliminary Design Standard R1 corresponding to the working document referred to in Part 2 3-708 is a communication device called rVANJ, which is designed to be installed inside a car. It describes the general architecture of communication networks.

As shown schematically in FIG. 1 of the accompanying drawings, a VAN type network includes, for example: of a differentially detected voltage signal frame between two lines or lines of a path. Suitable for digital data transmission sent by one of the electronic modules in the form Multiple electronic modules interconnected by a two-wire path DATA, DATA Contains rules A, B, and C. Each module connected to this path is to receive information carried by a path, and to send information on this path. For this purpose, the transmitter, receiver or or sender/receiver unit. This receiver part is commonly , U.S. Pat. No. 4,792,950 (No. US-A-4,792,950) and Furan As known from Patent Publication No. 2627036 (FR-A-2627036) , the first controller whose inputs are connected to the DATA and DATA lines, respectively. Parator RO and its non-inverting and inverting inputs are DATA, DA respectively connected to the TA line, and its inverting and non-inverting inputs are respectively passed a reference voltage source V adjusted to a voltage corresponding to the voltage displacement between the two lines of The second (ERRI) and third (ERR2) “common modules” connected to Contains a ``code'' comparator. The two filters 3 and 4 are DATA and the DATA line and the comparator. this The purpose of the filter is to affect the signal transmitted on the line. The goal is to limit parasitic effects.

If the line is not affected by the defect, the comparator RO input line of the path to provide at its output two transmit signals that vary with the sign of the voltage. It is fully possible to detect the differential voltage between. But the two comparators - Complementarity of logic states of DATA and DATA lines by ERR1 and ERR2 This can improve the performance of the circuit and prevent one of the two lines from becoming a short or open circuit. Even when a failure occurs, the information items circulating on the path reach the receiving module. It becomes possible to be transmitted. Analysis of the outputs of the three comparators detects defects. and one of three outputs, one of which accurately transmits the information item. It is possible to choose. For this purpose, the line sender/receiver Seaver 1 includes a diagnostic device 2 that allows selection of valid comparator outputs. , these devices are assigned to the management device, and the actuator commands or e.g. to "applications", such as the acquisition of signals provided by sensors. The particular transmission protocol chosen for the transmission of information received from the path of It is equipped with LE.

The sender/receiver further has its unipolar input connected to device 2. Then, the DATA and DATA lines are connected through the protection device 6 that can output the differential type. The line sender 5 is connected to the line sender 5.

All of these are known in the art and require no further explanation. be.

It is clear from the foregoing that the transmitting module can You can “reread” your own state, and this rereading will be understood later. This allows some degree of defect diagnosis. A network like the one shown in Figure 1 Among other defects that may affect the operation of the For example, if the voltage between modules B and C on the DATA line is Be aware of the occurrence of an oven circuit condition as indicated by oven switch 7. There must be. Such oven circuits are e.g. frame is sent, while selected within module C to read the information on the bus. The comparator is comparator RO1, which is commonly understood as During the period of transmission, which is unreliable in such an environment, It may appear. A first solution to this problem was proposed by the applicant in 19 Forms the subject of French Patent Application No. 9103379 filed on March 20, 1991 A transmission method for digital data is provided. This solution is To pass control of the path from one sender module to the other module in at least one predetermined intermediate sequence of signals of Reads the frame sent on the path, and on return reads the two lines of the path. Even if there is an open circuit on one side, there is no way to correctly read this frame. The existence of open circuits in the process of selecting the applicable comparator consists of performing diagnostics.

However, in VAN-type networks, access to paths is asynchronous. In particular, the "collision avoidance" process for highest priority messages Several modules can simultaneously process bits across specified fields of a frame. “Sending contention j” is regulated by bit-orbitration. It must be noted that this is possible.

The module that loses arbitration then immediately terminates the transmission.

If then there is an open circuit on one of the path lines between those modules. If two modules gain access to the path at the same time when As understood, the frame sent is a differential comparator of two modules, This comparator is unreliable in this environment, as it is reread on the RO. Bit-bit arbitration is not performed correctly.

Then bit-bit arbitration is performed in a given frame portion. cannot run, or the module that is the sender of the lowest priority message This is resolved by the path's membership to the path, which high percentage of frames, blocking some messages or some modules, network cause the network to malfunction or cause other inconveniences.

Therefore, it is an object of the present invention to which similarly disrupts the bit-to-bit orbital phase between joules, Even if there is a possible oven circuit on one side of the path line, The objective is to provide reliable transmission of transmitted signal frames.

This object of the invention, as well as other things that emerge from reading the following description, between the first and second lines of the data communication path interconnecting these modules. The form of a differential voltage signal frame that can be detected by two electronic modules This is accomplished by a transmission method for digital data sent in a At least one module is a frame sender and 1 special table 1,7-500227 (4) a receiver designed to receive data through two comparators; The comparator is selected from the eleventh second and third comparators, The input of the first comparator is connected to two lines of the path, the second and One of the inputs of the third comparator is connected to the first and second lines of the path, respectively. connected and other inputs are connected to a reference voltage located within the voltage displacement range of the line. voltage, allowing several modules to simultaneously compete for control of the path. The performance is minimized by bit-to-bit orbiting.

According to the invention, the appearance of a possible oven circuit on one of the lines of the path is detected, and then.

Continuously sent signals on the path until the path is affected by the oven circuit. After each signal frame, a bit-by-bit arbitration procedure is performed. both are supplemented by a predetermined partially random processing procedure, the one procedure being Assign a unique sending time window to each module.

This arrangement makes it practical to use hierarchically lower modules in the event of an oven circuit. Access to a strictly hierarchical path, where all access to the path by make access avoidable.

According to another inventive feature of the method according to the invention, the assignment or attribution In some cases, the priority weight of the message contained within the frame sent to the path is also be considered.

Other features and advantages of the method according to the invention can be found by reading the following description and referring to the attached drawings. These drawings become clear by looking at them: Figure 1 shows a network of electronic modules interconnected by differential paths. FIG. Figure 2 shows the line sender/receiver included in such a module. These two figures have already been explained in the preamble of this specification. is, is, Figure 3 shows the receiver comparator of the network module in Figure 1. The timing diagrams of these output signals are Detection of one oven circuit in the line of is useful in elucidating prior to determining a specific sending window to , and FIG. 4 shows a module useful for explaining sending window determination according to the present invention. from the comparator of the module and the sender of the module of the network in Figure 1. FIG. 2 is a timing diagram of the same output signal from

As already explained, the present invention provides for modules A and B on the one hand, and of modules A and B on the other hand. and C, the switch 7 in FIG. An accidental oven circuit in one of the lines of the path as shown schematically in devices available for detection, e.g. Joule sending/receiving unit diagnostics and protocol management It is intended to be incorporated into the device 2. These devices will now be shown in Figure 3. At least two successive paths in a path, as described with reference to the timing diagram of Observe and compare the output of the comparator during the transmission of the signal frame to By It is properly programmed to be able to sense life.

The first thing that may be recalled is that module A's comparator ERRl The VAN type communication A signal frame in a protocol contains a predetermined number of consecutive fields. , at the beginning of which the SOF field for "beginning of frame" is found. This field was filed by the applicant on March 5, 1991. As explained in French Patent Application No. 9102592, allow for possible parasitic signals to be recognized and identified , presenting a predetermined form. The SOF field is Illustrated generally by the hatched area following the Confirm field, Control field, Data field, and other It precedes the genus field.

When there is an oven circuit 7 that has not yet been detected, the module C detects the signal The path is controlled (see the "Path control" line in Figure 3) to send frames. This transmission causes module C to take control of the path to send a new frame. Assume that before returning, module A takes over to send another frame. .

This frame is only perceived by comparator ERR2 of modules A and B. Contrary to the fact that the module C is unaffected by the oven circuit 7, The three comparators of , reread the frame sent by module C's sender.

Module C perceives frames only through its comparator ERR2 and The operation of comparators ERR1 and RO is affected by oven circuit 7. In contrast, when module A next takes control of the path, it The system has all of its comparators and module B (then the orb (not affected by the control circuit 7).

Therefore, in the presence of such an oven circuit, modules A and B , in the first frame in one comparator and in three comparators Receive subsequent frames in

For module C, it must reliably reproduce itself in its three comparators. When re-controlling the path for reading, its comparator ERR2 is It is the same as perceiving a frame.

According to another method, two different modules located on one side of the oven circuit During the transmission of two consecutive frames by a call, if it The first frame in the Mon mode comparator (ERRI or ERR2) frame, and the second frame in its comparator RO (and the same Sometimes, in two common mode comparators), if the receiver takes the Each module of the network has an oven circuit in one line of the path. can be analyzed for the presence of (see the arrow of analysis j in Figure 3).

Therefore, according to the present invention, detecting the presence of an oven circuit on the path For example, access to a path by a module that could result in such an oven circuit. Possible failures of the pittobit orbiting procedure for the This procedure is even more reliable, and according to the present invention, the module By the procedure for attribution of a distinct sending window to a module, It will be explained below in connection with the timing diagram of FIG.

Before this explanation, two ideas are essential for understanding the method according to the invention: i.e. those of "potential sending modules" and those of "preferred" It is necessary to explain it in detail. ``The potential sending module j is frames can be sent spontaneously, however, messages can be sent It is not possible to remain in a fixed position.

Furthermore, the urgency of the transmission in the path of the message sent by the module is , may deviate from one type of message to another9 For example, it is related to parameters with frequent changes (e.g. engine speed) Some messages are caused by parameters that change slowly (e.g. engine temperature). may be ascribed to priority for passages on the path, beyond parameters. I can imagine that. Furthermore, in normal operation, it Preference for passages by messages sent by modules Motivation for the existence of a bitwise procedure for accessing a path, relative to In the 6VAN protocol, this attribution is called "confirmation". A small portion of the field C2O (can be brought into play by flying).

According to a prerequisite feature of the method according to the invention, the operation in one of the lines of the path is In the presence of a bus circuit, each potentially transmitting module While it can send messages, it clearly cannot send such messages. and any other modules that require path control in advance. It attributes the time window to itself to such an extent that it does not control it. Each The module performs window calculations by applying the following rules: equipped with internal logic that is properly programmed to

As symbolized by line n in the timing diagram of Figure 4, each sent At the end of each frame, there are (n+1) consecutive windows of the same duration d. The number n of the sequence is determined by each module, and the beginning of the sequence number n is 0. ．． 1, 2, 3, 4, 5. is indicated by a pulse with a reference symbol such as ing.

The number n1 of the window array, which is module 8, has its own attribute. (i=1), B (i=2) or C (i=3), the module is not communicating. Add an integer p1 that quantifies the message's priority: and a random number from among the integers (O≦a1≦A) of (A〒1) It is calculated by the number a retrieved by the module in the method.

Absolutely: n 1” p 1 + 81 The window distribution law according to the invention can be explained by the following formula in conjunction with FIG. It will be explained through illustrated examples.

As seen above, the window allocation is the frame seen on the bus. are made at the end of each. Assuming the existence of eight classes of priorities ( 0≦p1≦7.0 has the highest priority), and random numbers a, (0 Assuming the existence of eight possible integer values for ≦a1≦7), the following three successive window allocations, each of which replaces the previous obsolete allocation. It is possible to calculate as follows: First allocation: p, = 4, a, = 2 → n1 = 6 (Module A places itself in the 7th window) p,=2. a! =7-+n, =9 (Module B designates itself as the 10th window) p, = 31 a, = 4 → n, = 7 (Module C designates itself as the 8th window) 2nd allocation p,=4. a, = 3 → n, = 7 (Module A designates itself as the 8th window) p, -〇, a, = 5 → n, = 5 (Module B designates itself as the 6th window) p,=3. a, = 1-+n, = 4 (module C adds itself to the fifth window) 3rd allocation: p,=4. a+=2→n,=6 (Module A designates itself as the seventh window) pl”’ O+ 82 = O → n = = 0 (Module B sets itself as number 1 ps = 5 + a, = 4 - + n, = 9 (module C designates itself as the 10th window), so the first allocation (see Figure 4), creating the 7th window (n + = 6) Module A has SOF field and bitwise arbitration. (see line ``Data Center JDE'') start.

A module that sends a message with a higher priority (pt=2) than modules A and C. B places a “latch” on the SOF field sent by module A on the bus. ', then apply the 'Identifier' field following the SOF field. Let module A finish sending after bit-by-bit priority arbitration. Sending a message that has been communicated after obtaining priority over It is. At the opening of the 8th window that module C belongs to itself Therefore, the latter cannot be sent since the bus is occupied by module B. They have been instructed not to come.

Hypothetically, the data line on the bus is an open circuit, so the module Only comparator ERR2 of Lecture C currently reads frames on the bus.

Once module B has finished sending, the bus becomes free again and the present invention According to the new window allocation procedure now works . The result of the calculation is the number n of the window arrangement (order) and the three modules By virtue of the random component a1 that belongs to the rule, a new attribution ( assignment) strictly matches the one that precedes it (which it supersedes) The probability of that happening is extremely small. Therefore, access to the bus is , on the basis of the priority pl of messages sent by the module, specified or not hierarchical at all. According to the present invention, Even though the message does not have a high priority, it still has enough have the opportunity to be sent on the line with frequency (if the oven circuit is connected to the bus) This assumption may affect communication between modules configured as In the hypothesis, access to the bus is therefore made pseudo-random, Depending on the random component a1, access inflexibility or inflexibility may be loose. The sum is adjusted.

Therefore, the second window allocation is such that module B (n+=5) While receiving only Indo, it appears to have been designated as the fifth window. Attributes priority to module C (nx=4) for controlling the bus. pulse 5, when this latter window opens, module B: Controlled by module C and therefore not activated. It is what it is now (see line DE). Here again, the oven times in the data line To open the bus, module B acknowledges module C's occupancy of the bus. It passes through comparator ERR2, which is called Once the latter has finished sending, the As soon as the space is determined to be “free”, module B opens the first window (n As soon as z = O) opens, it takes control of the bus and likewise it indicates a defect in the oven circuit. affects one of the lines of the bus, the third allocation is executed.

Needless to say, modules A, B and C operate independently of each other, each with a value Continue independent random sampling of a: due to similar allocation, the same window is attributed to two or more different modules. That can happen.

At the opening of said window, a collision then immediately occurs between the module and the This is achieved through a new window allocation procedure starting from the first window. It will be recognized that this new procedure does not reproduce any prior attribution that is not appropriate. With a random sampling of a, such that the probability of Since it is executed, access to the path for the module is not prevented there. do not have.

The duration d of the window can be modified from the previous one by such a way as to allow the module During the window, the window of that module We are starting to differentiate between having and taking over the path by other modules, but the selection be done. The procedure to this effect was filed by the applicant on March 5, 1991. , French Patent Application No. 9102592, which describes this point in more detail. It is expressed as "can be affected". This procedure essentially starts the SOF frame. field, the field for which the module has priority is the first Applying the latch as seen above in the depiction of the indoor allocation, It is based on the recognition of And for the window duration d, at least S Since it is necessary that the duration of the OF fields be equal, the latter is 1,700-500,227 (7) can be recognized before opening the window. Latch on SOF field This procedure, however, may damage an open circuit in one of the lines of the path. This is possible only between modules that never The field for modules A and B in the case of an open circuit 7, symbolized by That's right.

If a potentially sending module has an array number of its sending windows When calculating a value, if you do not have any messages to send, the number is calculated by giving an average preference to substantive messages. if module but the window opens (sometimes I don't have any messages to send yet) In that case, don't send it. In contrast, if you have the next message to send - sage, It considers the first window that follows the request it sends to open. .

The method of data transmission according to the invention aims to reach the stated purpose. quite possible. Therefore, in the case of oven circuit conditions, simultaneous Access only one window for each module to start sending Obviously limited due to the fact that it has. In addition, the module Any transmission that is not initiated by an imwindow is considered noise. Common mode Very insensitive to noise. Furthermore, window attribution (assignment) Depending on a purely partially random characteristic (the window assignment may be high priority messages sent by very many You can avoid increasing the timescale by sending too many pages. become capable. Therefore, the introduction of random component a1 will cause two Messages with two different windows, giving lower priority messages less priority. It is possible to "rotate" the priority so that it does not put you at a big disadvantage.

In this respect, all messages sent by the module have similar If it was earlier, the attribution of the sending window would definitely be It is clear that this was carried out through random procedures.

It goes without saying that the invention is presented and represented by way of example only, There are no restrictions on the reification provided. Therefore, the present invention applies to motor vehicles. other telecommunication networks, such as the CAN network (such as the CAN network) or other applicants. Expand to The described method follows the point to the priority T) Parameter a to increase the weight of the random component, inverse of , and p, such that it is possible to perform various possible combinations of response is acceptable. Similarly, the duration of window d is the period during which frames are sent out. In terms of delay (with respect to normal state) and frame signal recognition regarding parasitics, Adjustments are made based on the desired compromise between required integrity.

FIG.1 FIG.3

Claims (7)

[Claims] 1. the first and second lines of the data communications bus interconnecting those modules; can be detected by at least two electronic modules between (DATA) , a method of transmitting digital data sent in the form of different signal frames, the method comprising: , at least one of the modules includes a frame sender and a receiver. The receiver has a signal frame sent on the bus through one comparator. one comparator is configured to receive the first (R O), second (ERR1) and third (ERR2) comparators. The input side of the first comparator (RO) is connected to the two lines of the bus. One of the inputs of the second (ERR1) and third (ERR2) comparators is connected to the first (DATA) and second (DATA) lines of the bus, respectively; while the other input side is connected to a reference voltage defined within the voltage variation range of the line. Therefore, the probability that several modules control the bus at the same time is In a transmission method that is minimized by a bitration procedure, monitor the occurrence of possible open circuit conditions on one side of the bus line; and perform at least a portion of the bitwise arbitration procedure there. After the signal frames are sent on the bus in succession, the current To the extent that the bus is affected by open circuit conditions, A person who is characterized by assigning or attributing a landing time window. Law. 2. The window attribution (assignment) procedure uses various messages sent by the module. The first claim takes into account the priority of the message. The method described in section. 3. During the transmission window assignment (attribution) procedure, such sequential Each module to which an integer (a1) forming part of the integer number is assigned randomly drawn from the The ordinal number (n1) of the window (which was An integer (p1) that quantifies the priority of the message is run by the module. of the claim, calculated by adding to the above integer (a1) drawn on the dam. The method described in Scope No. 2. 4. The number of windows (ordinal) to which a module is assigned ( If you do not have a message to send when calculating n1), this calculation is Performed by giving an average value to the number (p1) that quantifies the priority of the message 4. The method of claim 3, wherein: 5. The at least two modules have the same window to both modules. When attempting to take control of the bus after assignment (attribution), a collision on the bus is detected and the Then, a partially random assignment (attribution) procedure is applied to the conflicting window. Claim 1, wherein the invention can be restarted at the opening of the window following the opening of the window. The method described in any of paragraphs 3 to 3. 6. Each window has at least one file placed at the start of the signal frame. such that it has a duration (d) equal to that of the field (SOF). A method according to any one of claims 1 to 5. 7. One module has a second (ERR1) and a third (ERR2) comparator. 2 in either of the comparator and in the comparator (RO), respectively. detecting two sequential consecutive frames sent by two separate modules. A closed-circuit defect on one line of the bus between two modules when According to any one of claims 1 to 6, the presence of which is diagnosed. the method of.