JPH0746145B2 - Electronic clock - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an electronic timepiece having a charging function, which includes a charging means such as a solar cell.

[Prior art]

Generally, a clock circuit using a solar cell as a charging means (primary power source) ensures some operation even when the supply of light energy from the sun is cut off at night, so that some kind of backup energy, that is, a storage means (secondary power source) is used. ) Is provided.

Then, by supplying electric power from the secondary power source to the clock circuit, stable operation is ensured.

However, in the conventional electronic timepiece, a predetermined reference level for starting charging is set in advance, and when the voltage of the secondary power supply falls below the reference level, a display is provided to inform the user that charging is required. I was going.

In particular, the reference voltage has been set to a high level with a sufficient margin in order to reliably prevent a malfunction due to the voltage drop.

For this reason, the conventional electronic timepiece with a charging function has a problem that the display is extremely troublesome for the user because the display for instructing the user to start charging is made earlier. In addition, there is also a problem that it is not possible to notify the user that sufficient charging has been completed simply by giving an instruction to start charging the secondary power source.

It is an object of the present invention to provide an electronic timepiece with a charging function that solves the above conventional problems.

[Means for Solving the Problems]

In order to achieve the above-mentioned target, the present invention provides a power generation unit that generates power based on energy applied from the outside, a secondary power source that is charged using the output of the power generation unit, and a power source voltage from the secondary power source. And a charging operation display means for performing a forced charging display of the secondary power supply, wherein the charging operation display means is a first reference corresponding to the forced charging start voltage of the secondary power supply. 2nd corresponding to the voltage and the charging end voltage of a sufficiently large value
A reference voltage setting unit that sets a reference voltage, a first comparator that outputs a first signal when the power supply voltage of the secondary power supply becomes equal to or lower than a first reference voltage, and the power supply voltage of the secondary power supply is A second comparator that outputs a second signal when the voltage becomes equal to or higher than the reference voltage of 2 and a forced charge operation display of the power supply voltage from the time when the first signal is output until the time when the second signal is output. It is characterized by including a display section for performing.

As described above, according to the electronic timepiece of the invention, when the forced charge operation is performed based on two voltage levels, which is not present in the conventional electronic timepiece, that is, when an abnormal voltage drop occurs due to discharge, the residual capacity becomes small due to the start of the abnormal display. Can let you know
By the end of the abnormal display, the user can be informed that the sufficient voltage has been charged by the charging. Therefore, if the user charges while checking this display, that is, the forced charging operation display, the electronic timepiece will continue to operate sufficiently,
Moreover, since the abnormal display is not restarted until the minimum level at which the battery needs to be charged, normally, the trouble of the abnormal display is not disturbed.

〔Example〕

 Hereinafter, the present invention will be described in detail based on examples.

FIG. 1 is a block diagram showing the basic configuration of the present invention.
Reference numeral 101 is a power generation means. Photoelectric conversion element 102 is an overcharge prevention means for preventing overcharge from the power generation means. 103 is a storage means. 104 is a time display means. 105 is an electric signal between the above means. It is an electronic circuit.

FIG. 2 is a plan view of a solar cell applied to a portable analog display type electronic timepiece, which is an embodiment relating to the power generation means (primary power source) of the present invention.

FIG. 3 is a sectional view taken along the line XX ′ in FIG.

From 201 to 212, 12-divided amorphous silicon solar cells are connected in series between 201 and 206 and between 207 and 212, and each is connected in parallel. Dividing the solar cells in series to the left and right with the so-called pointer display type 12H-6H as the boundary has the following advantages. The solar cells connected in series have the property of losing the overall electromotive force even if one of them is blocked from light. Therefore,
Under the condition that it is used in a state where it covers the cuff like a mobile watch, set a series part on the 3H side that is easy to hit the light,
Even if the 9H side is hidden inside the sleeve, it is effective for practical use to obtain the charging energy from the primary power source.

In FIG. 3, 301 is an upper transparent electrode, 302 is an amorphous silicon solar cell, and p layer, i layer and n layer are laminated by vacuum deposition. Reference numeral 303 denotes a lower metal electrode, which has the amorphous silicon solar cell layers engaged in series on the left and right with YY '(12H) as the center. Reference numeral 305 denotes a glass substrate, which is used as a cover glass of a timepiece or a display plate such as a dial. 30
6 is used as a decorative character, etc. to give a variety of designs on the printed surface, but it is not a functionally superior one. 30
4 is a resin protective coat that protects the lower metal electrode from mechanical scratches.

In FIG. 3, part b is almost white in appearance and part c is a Newton ring interference color determined by the thickness of the upper transparent conductive film described above. ing. Therefore, this division always occurs when a plurality of solar cells are stacked in a plane. Also, a is the printing width a
> B.

By the way, I will explain why we have to combine several solar cells in series.

FIG. 4 is a graph showing the characteristics of electromotive voltage V and electromotive current I per amorphous silicon solar cell. Voc is an open voltage and is an electromotive voltage when there is no load. The open voltage Voc varies depending on the illuminance of received light, but is 0.6 V when the brightness is about −200 Lx due to indoor lighting, and is 0.8 V in direct sunlight. It is well known that amorphous silicon solar cells have high charging efficiency under room light such as fluorescent lights. Generally, electronic timepieces operate at around 1.5V due to the IC operating voltage. Therefore, the voltage of the primary power supply must be at least 1.5V. Further, in the storage means 103 of FIG. 1, when the charging means by the photoelectric conversion element is placed in the dark state, the voltage drop of the element to be inserted is considered to be about 0.6V in order to prevent the backflow thereof. At least four solar cells in series are needed to complete. If a point (Iop) with good charging efficiency is selected, it is advantageous to connect 5 to 6 in series.
Incidentally, Isc in FIG. 4 is a short current which can be taken out when the load voltage is ov.

Amorphous silicon solar cells are formed by vacuum vapor deposition, etc., as they used to be. Therefore, it has the following features as compared with the conventional single crystal silicon solar cell.

(1) Since the thickness is as thin as several thousand angstroms, it is possible to make electronic watches thinner.

(2) Batch processing by vapor deposition is easy and cost reduction is possible.

(3) The degree of freedom of the shape is high, and an arbitrary shape can be formed by the mask shape.

(4) The connection between the solar cells can be punched at the same time.

Although it has many advantages as described above, once the shape of the solar cell is determined, it is not realistic to frequently change the precise photographic mask for each model because it becomes expensive. In order to solve this, it is effective to increase the model variety by the printing surface 306 described above.

Furthermore, this division can be used positively, and it can also be used as a scale for the dial in the analog display type.

In addition, recently, a laminated solar cell as shown in the magazine "Nikka Electronics" No.306.P118 has been developed, and it can be used as a primary power source. In this case, even if the solar cell is visible from the cuff, it can be charged,
The divisions shown in FIGS. 2 and 3 are not necessary, which helps improve the aesthetic appearance and enhances the practicality.

Next, various measures for the secondary power supply to bring the electronic circuit in the vicinity of ov from the non-operating state to the operating state without any problem will be described in detail.

First, an improvement measure of the overcharge preventing means (limiter circuit) from the primary power source to the secondary power source will be described. In this regard, the point is to prevent erroneous short-circuiting of the overcharge prevention transistor when the secondary power supply voltage is within the circuit operating range.

In the conventional means for preventing overcharge of electronic devices with solar cells (hereinafter referred to as limiters), when the secondary power supply falls below the operating voltage of the limiter, the open / closed state of the switching transistor in the limiter becomes indeterminate, and the solar cell is shut down. There is a case where the loop that keeps forming is still formed (it should be shut down when the secondary power source becomes overvoltage). Therefore, no matter how much charge is made from this state, no current flows in the secondary power supply. In particular, in a place where the light is weak, the electromotive force generated by the solar cell is small, so that the solar cell is not charged no matter how long the light is applied. This is the most fatal defect of the charging device. In the past, without this preventive measure, the secondary power supply was forced to be charged before it was completely emptied (before the threshold voltage of the transistor became lower than the threshold voltage).

An example for preventing the above defects is shown in FIG. In FIG. 5A, 501 is a solar cell and 502,50.
3, 504, 505, and 506 are MOS-FETs (hereinafter abbreviated as Tr), 507 is a resistor, 508 is a diode for preventing backflow from the secondary power source side to the solar cell, 509 is the electronic circuit described above, and 510 is a secondary power source. The basic operating principle of the limiter is the same as the conventional one. That is, the circuit diagram is the same as the conventional circuit diagram.

The basic operation will be described below. The voltage of the secondary power supply is
When the date of Tr502 and Tr503 is applied and the secondary battery voltage rises, the current flowing through the resistor 507 increases in proportion to the square of the gate-source voltage of Tr502 (hereinafter abbreviated as gate voltage). As a result, the gate voltage of Tr504 increases, so that Tr504 turns on and the gate voltage of Tr506 rises.
The 506 turns on. The secondary power supply voltage for turning on the Tr 506 is called a limiter voltage, and the threshold voltage and the amplification factor of each Tr are usually determined so as to be about 1.8V to 2.0V. Further, it is desirable that the resistor 507 be variable because it finally adjusts the limiter voltage. Here, consider the case where the secondary power supply voltage becomes lower than the threshold voltage (hereinafter referred to as V ^TH ) of each Tr. At this time, Tr502,503,50
Since 4 are enhancement type MOS-FETs, respectively, when the gate voltage becomes V ^TH or less, the operation of Tr becomes impossible and the gate potential of Tr 506 becomes a floating state. Therefore, only the characteristics of Tr505 connected between the gate of Tr506 and the + electrode maintain a certain level of impedance even if the secondary battery 510 drops in voltage.
It is necessary to pull up the gate of 6 to the + side. Therefore, Tr505 uses a depletion type MOSFET so that the current can flow even if the gate voltage is OV. Of course, Tr
Although 505 may be replaced with a resistor, this circuit type shows an example in which a transistor is used as a resistance element for bias setting.

Another circuit system will be described based on the same idea.

FIG. 5- (b) shows a second circuit example.
Reference numerals 512 and 513 are resistors, 514 is a reference voltage generation circuit, 515 is a comparator, and the other parts having the same numbers as in FIG.
It has the same functions and elements as those in FIG. Fig. 5-
In (b), the voltage divided by the resistors 512 and 513 changes in proportion to the voltage of the secondary power supply 510 and becomes one input of the comparator 515. The other input of the comparator 515 is the output from the reference voltage generation circuit 514, which outputs a constant voltage without being affected by the voltage change of the secondary power supply. These two inputs are compared, and when the resistance-divided voltage becomes higher than the reference voltage, the comparator 515 outputs a LOW potential and causes the Tr 506 to short. Here, if the secondary power supply voltage becomes lower than the operating voltage of the comparator 515 and the reference voltage generation circuit 514, the gate voltage of Tr506 becomes indefinite.Therefore, the resistor 511 pulls up and Tr506 turns on. To prevent. If the impedance of the resistor 511 is set to a resistance value (several MΩ to several tens MΩ) such that the gate voltage of the Tr 506 does not float, the increase in current is small (several nA to several tens nA).

As described above, the present invention reliably prevents a limiter short circuit at a low voltage (a region of 0.6 V or less), which has been completely given up in the past, with a simple circuit configuration. By doing this, the power supply system can be automatically set to a chargeable state even if the remaining capacity of the secondary power source is exhausted and the voltage value becomes the inactive state of the limiter.

Secondly, the improvement measures when the pointer type display device is used as the display means will be described in detail. In the conventional pointer-type display electronic timepiece, the motor drive system applies pulses alternately to the motor terminals (hereinafter referred to as o ₁ and o ₂ ) by controlling the final stage flip-flop (hereinafter referred to as FF). Do it. Therefore, if the input and output potentials of the FF are different when the oscillation is stopped, a potential difference also occurs between o _{1 and} o _2, so unless the oscillation is restarted, several hundred μA to several
A current of about mA will continue to flow. This probability can occur 50% in principle, so when oscillation stops for some reason, one of the two clocks will empty the secondary battery in a short time. Like an electronic watch with a solar cell,
For an object that needs to be restarted by charging even after the voltage of the secondary battery becomes equal to or lower than the oscillation stop voltage, it is necessary to suppress the discharge of the secondary battery as much as possible during that period to facilitate restarting. However, in the conventional motor drive method, the potentials of o ₁ and o ₂ are not guaranteed when oscillation is stopped, as described above, so even if an attempt is made to charge, the generated energy of the solar cell is lost between o _{1 and} o _2. (Because current flows to the motor), it becomes impossible to charge the secondary battery.

The embodiment is one in which the above-mentioned drawbacks are eliminated, and its basic circuit block is shown in Fig. 6- (a). FIG. 6- (a) shows the minimum required circuit configuration for this embodiment, which is simpler than the actual circuit. In FIG. 6- (a), 60
Reference numeral 1 is an oscillation circuit, 602 is a frequency dividing circuit, 603 is a motor drive circuit, 604 is an oscillation stop detection circuit, and 605 is a motor.
The reference signal (32768 Hz) of the oscillator circuit 601 is divided into a signal of 2 seconds by the frequency dividing circuit 602, differentiated into a predetermined pulse width by the motor drive circuit 603, and drives the motor. The pulse width is determined by the clock output from the frequency dividing circuit 602, and is generally about 6 to 7 msec. When the oscillation stops, the output of the oscillation stop detection circuit 604 changes and controls the drive of the motor drive circuit 603.

Next, a circuit plan of the oscillation stop detection circuit 604 motor drive circuit 603 in FIG. 6- (a) will be presented, and the principle of the present invention will be described in more detail.

FIG. 6- (b) shows an embodiment of the oscillation stop detection circuit.
606 is the oscillation output (32768Hz) of the oscillator circuit, and the inverter 61
Exclusive OR gate 612 (hereinafter EXOR
There is a line to input to, and a line directly connected to the other input terminal of EXOR. Inverter here
The signal 607 that has passed through 611 is delayed by the inverter, and the output 608 of the EXOR 612 is multiplied by the oscillation output 606 (65536H).
z) waveform appears. The phase relationship of this operation is shown in the timing chart of FIG. 6- (c). Fig. 6- (c)
The numbers in the figure indicate the voltage waveforms of the signals of the same numbers in FIG. 6- (b). Then, in FIG. 6- (b), the signal 608
Is at a high level (hereinafter abbreviated as H), the diode 613 is in the forward direction, so that electric charge is accumulated in the capacitor 615,
The signal line 609 indicates H. Here, the accumulated charge is always discharged by the resistor 614 pulled down to the low potential (Vss), but a time constant of CR larger than the frequency of the signal 608 is set (capacitor 615 is about 10PF, resistance is If 614 is about 10 MΩ), charging is superior to discharging and H is maintained. Reference numeral 609 'in FIG. 6- (c) shows the waveform of the terminal voltage of the capacitor 615. Further, when the oscillation is stopped and the signal 606 remains at H level or LOW level (hereinafter abbreviated as L), the signal 608 always remains at L, and the diode 613 is cut off in the opposite direction. The capacitor 615 is not charged,
Electric charge flows through the resistor 614, and the signal line 609 holds L. In this way, a circuit showing L when oscillation is stopped and H when oscillation is realized is realized. In addition, in order to improve the circuit performance,
It is necessary to invert the signal 609 to shape the waveform and stabilize the charge / discharge time constant. Furthermore, since the control by the diode has a large forward voltage loss (0.3 to 0.6V),
It is preferable to use a transmission gate. Although the above circuit is omitted in this section for simplification of description, there is no problem in principle. Next, the motor drive circuit will be described. FIG. 6- (d) is an example of the motor drive circuit in the present invention, and FIG. 6- (e) is FIG.
7 is a timing chart for explaining the circuit operation of (d). In FIG. 6- (d), 616 is 2 from the frequency divider circuit.
The second signal, 617 is the 128 Hz signal from the frequency dividing circuit, and 618 is the waveform-shaped output of the oscillation stop detection circuit described above. First, when the signal 618 is H, that is, in an oscillating state, the rising edge of the signal 616 from L to H is differentiated by the signal 617,
Output to NAND gate 623. It also outputs the falling edge from H to L to the NAND gate 624. Therefore motor 6
In 05, a pulse current flows in alternate directions once a second, and the hands of the clock can be moved. This operation is similar to the conventional drive circuit. If signal 618 is always high, then a conventional drive circuit is achieved. For example, the oscillation stops when the signal 618 remains H, and the signal 616 changes to the L, D type flip-flop (hereinafter FF
If the Q output of 622 is kept L, the output of NAND gate 623 is H, the output of NAND gate 624 is L, and the output is increased by drivers 625 and 626, and a large current flows to motor 605. It will be left as it is. But,
When the oscillation is stopped, the signal 618 becomes L and the NAND gates 623, 624
The motor terminals 619 and 620 are both set to L, so that the motor current does not flow. That is, the output control of the differentiating circuit composed of the inverter 621′FF622 and the NAND gates 623 and 624 is performed by the signal 618. Where o ₁ ,
To make o _{2 the} same potential, use a driver 62 as another circuit.
Changing 5,626 to a NAND gate or a clocked gate and performing control with the signal 618 has the same effect and is another embodiment of the present invention. Or signal 616 to L and FF622 to H
You can set it to

The timing chart of the above control is shown in FIG. 6- (e). In FIG. 6- (e), 616 'is a 2-second signal waveform, 617'.
Is the 128Hz signal waveform, 618 'is the oscillation stop detection signal waveform, 619',
Reference numeral 620 'shows the output waveforms of the drivers 625 and 626 in FIG. 6- (d). The shaded areas 616 'and 617' in the figure indicate that it is indefinite between H and L because the oscillation is stopped. As explained in FIG. 6- (d), 619 'and 620' hold L in this oscillation stop section. In an actual clock circuit, since V ^{DD is} grounded, the o ₁ and o ₂ outputs are normally H and have a negative logic of active L. However, for the sake of explanation, all of the items are positive logic.

By doing this, the energy consumption of the motor can be stopped while the electronic circuit is not operating, and the charging energy of the primary power supply can be smoothly started from the non-operating state of the electronic circuit when the secondary power supply is near ov. Available. Therefore, it is also useful for accelerating the speed of starting the clock operation.

Next, when charging the secondary power supply with the charging energy from the primary power supply, let us consider the time required for the secondary power supply to rise from an empty state to a voltage at which the electronic circuit / display means becomes operable. Considering the case of the least energy consumption such as a portable electronic timepiece, the current energy consumption is
It is considered to be about 1 to 2 μW. Therefore, 12 to 24 μWH is required as energy for one day. Meanwhile the charging energy from the primary power supply, taking the case of a solar cell as an example, the light - assuming electrical conversion efficiency of 10%, the maximum energy 100 mW / cm ² of direct sunlight, the first solar cell that can be extracted by the clock display board Even if the area per cell is 0.3 cm ² , the energy taken out from the primary power source is only about 100 × 0.1 × 0.3 = 3 (mW). With this charging energy, the secondary power supply can be activated from ov to 1.0v, which is considered to enable the module to operate. To increase the capacity of the secondary power supply to about 2 days of the energy consumption of the module, 2 x (12-24) x 60/3000
The module will not operate for x0.5 = 1 to 2 (minutes). This time is an assumption under strong sunlight, and in places where the light is weak such as indoors, the secondary power supply cannot be charged until it waits several tens of minutes to several hours, and accordingly the module does not work. A problem occurs.

A method for solving this problem and allowing the consumer to immediately start the electronic timepiece from its stopped state will be described in detail below.

FIG. 7- (a) is a basic configuration diagram for enabling this immediate start, and FIG. 7- (b) is an embodiment of an oscillation stop detection circuit in a battery clock with solar electronics. The configuration will be described below with reference to FIGS. 7- (a) and 7- (b).

The solar cell 701 forms a charging loop via the backflow prevention diode 704 for supplying power to the clock circuit 702 and the secondary battery 703. Here, a transmission gate 705 is connected in series between the power source of the timepiece circuit and the secondary battery, and its control signal 713 is the output of the oscillation stop detection circuit included in the timepiece circuit 702. As shown in FIG. 7- (b), the oscillation stop detection circuit applies the reference signal of the oscillation circuit 708 and the inverted signal from the inverter 709 to the transmission gates 706 and 707, respectively, as control signals, and the capacitors 710 and 711 and the resistor 712.
Control the charge and discharge loop of.

Next, the operation will be described. Now when the oscillation is stopped,
Since the output of the oscillator circuit 708 is maintained as H (high potential) or L (low potential), the transmission gate
Either 706 or 707 is kept OFF, and capacitor 711
Is discharged by the resistor 712, and the control signal 713 becomes L
(Vss level). As a result, the transmission gate 705 is turned off and the clock circuit 702 of the secondary battery 703 is brought out of conduction. Therefore, in this state, if the solar cell receives light, the electromotive voltage from the Taiyo battery is generated in the clock circuit 702 even if the secondary battery 703 is OV. The above is the basic principle of the method for starting immediately, and the following method can be adopted in addition to this. For example, if the oscillation is started once, the output 713 of the oscillation stop detection circuit becomes H and the transmitting gate is turned ON. Therefore, in the oscillating state, the secondary battery voltage is detected, and when the voltage exceeds a certain voltage, the control signal 713 and an AND gate are combined to form a transmission gate 70.
You can control 5. In addition, in order to charge the secondary battery, the ON resistance of the transmission gate 705 is increased to charge little by little, or charging is performed by intermittently repeating switching, or a circuit such as another charging path is provided. Means are considered. In any case, a reference clock is required in designing the logic circuit, and once a high voltage is generated in the clock circuit, oscillation starts and various power supply control can be performed.

FIG. 7- (c) is an application example of the present invention and is a circuit diagram showing a power supply control system of an electronic timepiece with a solar cell.

The power supply control will be described below with reference to FIG. 7- (c). First, the secondary battery 703 is set to a low voltage state, that is, the electronic circuit is inactive.

If the oscillation signal 723 of the oscillation circuit 708 does not oscillate, the oscillation stop detection circuit 717 detects the stop, the control signal 713 becomes L, the transmission gate 714 turns ON, and the transmission gates 715 and 705 turn OFF.

Therefore, the power supply 720 of the oscillator circuit 708 is turned off by the booster power supply 721 by the booster circuit 719 and turned on by the solar battery side power supply 722, and when light is applied to the solar battery 701, the oscillator circuit 708, the oscillation stop detection circuit. A voltage capable of oscillating is supplied to 717 and the logic circuit 718, and oscillation starts. When oscillation starts, the boost clock 724 required for boosting is generated, and the boost circuit 719 turns the secondary battery 70
The boosting of 3 is started, and a high voltage is generated in the boosting power source 721. On the other hand, in the power supply gate, the transmission gate 714 turns off and the transmission gates 715 and 705 turn on due to the start of oscillation.
Therefore, in the power supply system of the clock circuit 702, the solar cell 701 charges the secondary battery 703, and the clock circuit 702 operates by the high voltage boosted by the secondary battery 703. That is, the watch operates even if the secondary battery has a low voltage.

Note) The step-up circuit 718 in FIG. 7- (c) is a capacitor type that is widely used for liquid crystal display, and its details are omitted.
In order to stabilize the booster power source 721, it is conceivable to detect the secondary voltage and change the boosting ratio according to the voltage, to pass a constant voltage circuit, etc., but this is omitted here. The logic circuit 718 is a group of circuits necessary for the clock. The oscillation stop detection circuit 717 is the same as in FIG. 7- (b).

In this way, if the clock circuit and the secondary battery are connected to the power supply by the switching circuit and the connection is opened when the oscillation is stopped, the start can be started immediately.

Furthermore, another embodiment in which this is further devised so as to be practically used will be described below.

FIG. 8 is a circuit diagram of a charging / discharging power supply control system showing another embodiment. In FIG. 8, reference numeral 802 is an electronic circuit provided with a clock circuit for driving the time display means. This electronic circuit can be supplied with power from a solar cell 801 which is a primary power source and a capacitor 803 which is a secondary power source. In FIG. 8, 809 is a smoothing capacitor 807 for absorbing load fluctuations of the clock.
Reference numerals 808 and 808 are reverse-current blocking diodes, 804 is an overvoltage protection transistor, 805 is a charging transistor, and 806 is a discharging transistor. In the initial state, when the generated voltage (Vss) of the solar cell 801 exceeds the forward voltage of the diode 808 and the clock circuit voltage (Vss) becomes equal to or higher than the minimum operation start voltage, the clock function is started. Here, the charging transistor 805 does not turn on until Vss becomes equal to or higher than the minimum operation start voltage. If sufficient illuminance is maintained after the clock function starts, the 805 will be turned ON / OFF in response to the amount of voltage increase / decrease corresponding to the illuminance. Here, the smoothing capacitor 809 absorbs the voltage fluctuation due to the driving of the hand movement motor for driving the time display means, and also absorbs the voltage fluctuation due to the switching of 805. Further, the minimum operation starting voltage of the timepiece circuit is higher than the minimum operation voltage, and the difference serves as a control margin to prevent the timepiece circuit from further stopping. In this way, the capacitor 803 is charged by the surplus current generated by the solar cell without disturbing the driving of the clock circuit. After charging is completed, the transistor 804 is turned on when the voltage exceeds the rated voltage in order to prevent overvoltage of the capacitor 803.
Next, when the illuminance drops extremely, the capacitor voltage (Vs
c) becomes higher than the solar cell voltage (Vs ^B ), the discharge transistor 806 is turned on by the detection of the difference, and the electronic circuit 802
Will be powered by the capacitor. The diodes 807 and 808 are installed to prevent loss during discharge. If Vss becomes lower than the minimum operating voltage (clock function stops) during discharging, 806 is turned off to prohibit unnecessary discharging of the capacitor 803. That is, the loss in the non-operating voltage region of the timepiece is mainly due to the self-discharge of the capacitor 803.

With this method, a stable charging / discharging system can be obtained against a wide variation of the power supply voltage from ov to the withstand voltage of the secondary power supply.

Next, when the capacity is small as in the present invention, it is more practical to inform the user of the remaining capacity by some method.
This is advantageous when there is a functional relationship between capacitance and voltage. In the present invention, for example, in the case of a capacitor as shown in FIG. 9- (a), if the initial voltage E ₀ is the voltage E after t time has elapsed, it is expressed by the following equation.

Here, R is a watch load resistance, and C is a capacitor capacity. In this case, if the operation stop voltage of the timepiece is En, the remaining capacity can be converted as a voltage.

FIG. 9- (b) shows the case of using a fixed electrolyte battery.
It is a constant current load discharge curve. Using similar parameters,

c is the capacity of the solid electrolyte battery, and i is the load current consumption.

As described above, in the power storage means applied to the present invention, since the voltage and the remaining capacity have a functional relationship, the remaining capacity can be displayed by the following measures.

FIG. 10 is an example of a remaining capacity display method when a liquid crystal display panel is used among the electro-optical conversion elements.

1001 and 1002 are upper and lower panel glasses, 1003 and 1004 are upper and lower polarizing plates, and 1005 and 1006 are upper and lower transparent electrodes, respectively. This is a well-known structure in which a liquid crystal is sandwiched between upper and lower panel glasses to form a display panel. 1009 is a sealant. Here, if a thin film 1007, 1008 of polyimide or the like for suppressing liquid crystal orientation is covered on a part of the transparent electrode, this electrode part is divided into three parts a, b, c, that is, when the secondary power supply voltage is low, that is, When the capacity is low, only a lights up, and when the voltage is medium,
When the voltage is high, a, b, or a, b, c are all turned on, and the remaining capacity can be easily displayed. The voltage level of lighting / non-lighting can be easily shifted by controlling the thickness of the thin films 107 and 108. If the thin film has multiple thicknesses, it is possible to display a linear remaining capacity with high resolution.

On the other hand, when the display means is of the pointer type, it is preferable in terms of design that both the display means and the remaining capacity display means are combined in terms of design. This detects the voltage that has already been put to practical use,
A method of displaying an abnormality on the second hand, for example, a step of 2 seconds can be applied. Unlike the above-described chemical battery using an electrolytic solution, a capacitor has a wide voltage fluctuation range, and thus it is easy to set a plurality of voltage detection levels. in this case,
The lower the voltage of the second hand movement step is, the longer the interval is, and the fourth step or 8 seconds step is given to give the user a natural feeling.

As another display method of the remaining capacity, a circuit form is proposed below in which the detection voltage level at the time of charging and discharging is changed and the user is warned to complete the photoelectric action.

First, this concept will be described with reference to FIG. FIG. 11 is a graph showing a section of an abnormal display (hereinafter abbreviated as BLD) with respect to a change in the power supply voltage (voltage used as the power supply of the timepiece electronic circuit), in which the vertical axis represents the voltage V and the horizontal axis represents the time T. If the capacitor is a secondary battery, charging with the solar cell and discharging with the watch load are repeated, and the voltage curve of the capacitor is 1101 in FIG. 11, the voltage curve is the first voltage level. A dotted line is shown from when the 1102 is traversed during the descent to when it rises to the second voltage level 1103. This dotted line section is the BLD section. The basic circuit will be described below with reference to FIG.

FIG. 12 is an example of a circuit configuration that enables the remaining capacity display. 1201 is a solar cell, 1203 is a clock circuit, 1204
Is a capacitor that stores electric charge and acts as a secondary battery, and 1205 is a backflow prevention diode that prevents backflow from the capacitor to the solar cell when it is dark. First, a constant voltage output circuit 1215 (Vref) that does not depend on the voltage fluctuation of the capacitor 1204 by the constant voltage generation circuit 1202 serving as a reference for voltage detection (actually, slightly changes, but can be ignored). obtain. The constant voltage generating circuit is generally formed based on the V ^TH of the MOS transistor, and detailed description will be omitted. The constant voltage output 1215 is input to the comparators 1206 and 1207, and one comparison voltage of each comparator is a high voltage input and a low voltage input obtained by dividing the power supply by the resistors 1216, 1217 and 1218. less than,
BL using the comparators 1206 and 1207 of the circuit shown in FIG.
The D display operation will be described in detail based on the timing chart shown in FIG.

As shown in the figure, the terminal voltage V ₁₀₀ of the capacitor 1204 is
It is divided into the voltages of V ₁₁₀ and V _{120 by} the voltage dividing circuit of R ₁ , R ₂ and R ₃ .

Comparators 1206 and 1207 compare the reference voltage Vref output from the constant voltage generation circuit 1202 with the voltages V ₁₁₀ and V _120, and output H ₂₁₀ or V ₂₂₀ H or L level signals.

These output signals V ₂₁₀ and V ₂₂₀ are output to a rising differentiating circuit A composed of a flip-flop 1208 and an AND gate 1210, a flip-flop 1209 and a NOR, respectively.
The falling differential circuit B composed of the gate 1211 processes the differential waveforms V ₃₁₀ and V ₃₂₀ , and the differential waveforms are input to the latch circuit C composed of the NOR gates 1212 and 1213. As a result, the latch circuit C outputs a waveform such as V ₄₀₀ , and the inverter 1214 outputs a signal such as V ₅₀₀ to the clock circuit 1203.

The H level section of the output V ₅₀₀ of the inverter 1214 is the BLD section. The clock circuit 1203 has a gate circuit configured to perform BLD display when the output V _{500 of the} inverter 1214 is in the H level section. The BLD display is preferably a flashing of a display digit in the case of a digital timepiece display, and a 2-second jumping hand of a second hand in the case of an analog display timepiece, but is not specifically limited in this embodiment. In any case, the normal state and the state of the BLD section may be identified by the clock user in some way.

The differential pulse width of the differentiating circuits A and B is the same as that of the clock circuit 120.
Determined by the high frequency clock signal 1219 from the divider included in 3.

Next, the relationship between the reference voltage Vref and the two reference voltages V ₁ and V ₂ will be described.

Divided voltage V ₁₁₀ , V input to comparators 1206, 1207
₁₂₀ is a capacitor 120 according to the following equations (1) and (2).
It is a voltage obtained by dividing the terminal voltage V _{100 of} 4.

The reference voltage Vref input to the comparators 1206 and 1207 is
In order to consider it at the same level as the terminal voltage V ₁₀₀ of the capacitor 1204, it is considered that this reference voltage Vref is divided, and the value is divided by the voltage dividing circuits R ₁ , R ₂ and R ₃ before voltage division. It is necessary to convert into the voltage of. That is, the following (3),
According to the equation (4), it is necessary to convert the reference voltage Vref into the voltages V ₁ and V ₂ before being divided by the voltage dividing circuit. This is the two reference voltages V ₁ and V ₂ referred to in the present invention.

That is, the divided voltage V ₁₁₀ in each comparator 1206, 1207,
Comparing V ₁₂₀ with the reference voltage Vref means that the terminal voltage V ₁₀₀ of the capacitor 1204 itself is
It means to compare with V ₁ and V ₂ .

Therefore, in the circuit shown in FIG.
02 outputs only one type of reference voltage Vref, but by combining the operation of the reference voltage Vref and the voltage dividing circuits R ₁ , R ₂ and R _{3 with each} other, the comparator 1206 causes the capacitor 12
This means that 04 compares the terminal voltage V ₁₀₀ with the reference voltage V _1, and the other comparator 1207 compares the terminal voltage V ₁₀₀ with another reference voltage V ₂ .

That is, the constant voltage generating circuit 1202 and the three resistors 1216, 12
By combining with the voltage dividing circuit consisting of 17 and 1218, 2
A reference voltage setting unit for setting the _two reference voltages V ₁ and V ₂ will be configured.

Due to this, there are two BLD warnings that conventional electronic timepieces do not have. That is, "when the BLD ends, the battery has been charged to a sufficient voltage" during discharge, and when "the BLD starts, the remaining capacity is very small." Can be announced.
Therefore, if the user charges the battery while checking the BLD, then the clock will move sufficiently and the BL will reach the minimum level required for charging.
Since D doesn't start, BLD usually doesn't disturb you.

Next, it is necessary to save the labor of the clock circuit for guiding the signal to the time display means. If the time display means is a pointer display type,
It is desirable to use the pulse control circuit already disclosed and put to practical use as the drive circuit of the timepiece circuit. This will be described in detail below in parallel with the conventional method and the embodiment used in the present invention.

In the conventional pointer display type solar cell timepiece, the drive system of the motor which is the drive source of the time display means is 6 to 6 every 1 second.
The motor is driven with a pulse width of 8 msec. Therefore,
Average current consumption of motor (integrated value per second) is 2 to
It is required to have a secondary battery having a capacity of 3 μA and a large capacity. As a result, the thickness and size of the timepiece are more restricted than those of general timepieces, and especially for wristwatches, it has been extremely difficult to make solar cells thinner. On the other hand, various methods have been proposed and put to practical use for lowering the power of the motor. Among them, the method described below is the most excellent in terms of low power and reliability.

At least a first pulse for performing normal hand movement and a second pulse having a wider pulse width than the first pulse are provided to detect rotation / non-rotation of the motor due to the first pulse, and When rotating, it outputs a second pulse to drive the motor. For the first pulse, multiple types of pulse states can be selected from the minimum pulse width that allows the motor to rotate to the maximum pulse width that takes into consideration the train wheel load, etc., and a wider step after the motor non-rotation is detected. After a certain number of continuous rotations, control is performed to shift to a narrower step.

The above method for driving the motor is hereinafter referred to as an eagle. If you drive and control the motor with the above eagle method,
Although a low power and highly reliable electronic timepiece with a solar cell is possible, it has not been realized mainly due to the following technical problems. First
The problem with is that in the case of a solar-powered watch, the voltage fluctuations of the secondary battery over a wide range (about 0 to 2V) due to charge and discharge make the operation of motor rotation detection necessary for the eagle unstable. The second problem is that it is difficult to initialize optimum parameters (pulse width and the like) even if the secondary battery reaches a voltage at which the secondary battery can operate in an eagle state by charging. Therefore,
The current solar-powered watch uses a large-capacity secondary battery that covers the current consumption of the motor, and takes measures to increase the capacity of the secondary battery rather than improving the current consumption of the motor.

The present invention solves the above two problems and promotes low power consumption of a solar cell timepiece.

FIG. 13 shows a schematic block diagram of this embodiment. In FIG. 13, reference numeral 1301 denotes an oscillating circuit, which oscillates a reference frequency (32768 Hz) and is divided by a dividing circuit 1302 to a maximum of 1/2 Hz. 1
Reference numeral 303 denotes a pulse width control circuit, which represents the above-mentioned Eagle logic circuit section. Reference numeral 1304 denotes a motor, which transmits the rotation of the motor to a pointer-type display device via a train wheel and displays the time in analog form. A voltage detection circuit 1305 detects the voltage of the secondary battery 1307. When the voltage of the secondary battery 1307 becomes equal to or lower than an arbitrary set voltage (here, 1.2 V), a high level (hereinafter abbreviated as H) is set. It outputs and transmits to the eagle circuit. 1306 is a solar cell, and 1308 is a backflow prevention diode. The part surrounded by the dotted line 9 is a part which is made into an IC as a logic circuit.
When the voltage of the secondary battery 1307 is 1.2V or less, the voltage detection circuit 1305
Applies H to the eagle 1303, the rotation detection function of the motor in the eagle circuit 1303 is stopped, and the motor drive pulse is fixed (pulse width = 6.8 msec). Further, when the voltage of the secondary battery 1307 becomes 1.2 V or more, the output of the voltage detection circuit 1305 is from H level to Low level (hereinafter abbreviated as L).
And a one-shot pulse is formed by this fall, and the logic state of the pulse width control circuit 1303 is initialized.

In this embodiment, the pulse width of the first pulse is 2.0, 2.5, 3.0, 3.
Five types of 5,4.0 msec are provided, and the initial setting value is 3 msec. When the motor is continuously rotated 120 times (120 seconds), the pulse width of the first pulse is narrowed by 1 step. Here, the reason why the pulse width is set to the intermediate value of 3 msec will be described below.

When a capacitor is used as a secondary battery of a solar cell, charging / discharging is also very rapid. Therefore, the capacitor voltage
It takes less than 3 minutes to reach 2V from OV under direct sunlight. At this time, if the initial setting of the eagle is set to the maximum state (step state in which the pulse width of the first pulse is the widest), the capacitor voltage rises before the first pulse shifts to the next step (with a narrower pulse width). In the vicinity of 2V, a very wide pulse is applied to the motor. Not only the power loss, but also the braking of the rotor doesn't work, and this misses every 2 seconds. On the contrary, when the initial setting of the pulse width control circuit is set to the minimum state (step state in which the pulse width of the first pulse is the narrowest), the voltage is naturally low at the start time, and therefore the motor does not rotate at the first pulse, It wastes current. Therefore,
The present invention solves the above-mentioned danger by setting the pulse width of the first pulse at the start of the pulse width control circuit to a substantially central step. By doing so, the energy consumption required for the time display means can be reduced, and even if a secondary power source with a small capacity is used, it is possible to maintain the durability for use.

〔effect〕

As described above, according to the present invention, the first reference voltage corresponding to the forced charging start voltage of the secondary power supply and the second reference voltage corresponding to the charging end voltage of a sufficiently large value are set in advance. , When the power supply voltage of the secondary power supply becomes equal to or lower than the first reference voltage, the display unit performs the forced charge operation display, and when the power supply voltage of the secondary power supply becomes equal to or higher than the second reference voltage, the forced charge operation display ends. With such a configuration, it is possible to inform the user that "the remaining capacity of the secondary power source is small" by starting the forced charging operation display, and by terminating the forced charging display, the user can say "sufficient The user can be informed that the voltage has been charged, and by doing so, the user can charge the battery while checking the forced charging display, and the watch will continue to operate sufficiently, and the battery will be charged to the minimum level required for charging. Display Because they are not open, there is an effect that is not normally also be disturbed attention to the hassle of this display.

[Brief description of drawings]

FIG. 1 is a block diagram showing the basic configuration of the present invention. FIG. 2 is a plan view of a solar cell showing an embodiment relating to the charging means of the present invention. FIG. 3 is a sectional view taken along the line XX ′ in FIG. FIG. 4 is a voltage-current characteristic showing the performance of the solar cell. FIG. 5- (a) is a first embodiment showing an overcharge preventing means according to the present invention. FIG. 5- (b) is a second embodiment showing the overcharge preventing means according to the present invention. FIG. 6- (a) is a block diagram of an electronic circuit that gives an electric signal to the time display means. FIG. 6- (b) is an example of the oscillation stop detection circuit. FIG. 6- (c) is a timing chart shown in FIG. 6- (b). FIG. 6- (d) is an embodiment of the motor drive circuit according to the present invention. FIG. 6- (e) is a timing chart shown in FIG. 6- (d). FIG. 7- (a) is a basic configuration diagram for explaining an embodiment of the charging means according to the present invention. FIG. 7- (b) shows an embodiment of the oscillation stop detection circuit according to the present invention. FIG. 7- (c) is an example showing a power supply control system for an electronic timepiece to which the present invention is applied. FIG. 8 is a circuit diagram of a charging / discharging power source control system showing another embodiment. FIG. 9- (a) is a constant resistance load discharge characteristic showing time-voltage of the capacitor. FIG. 9- (b) is a constant current load discharge characteristic showing time-voltage of a Li-based solid electrolyte battery. FIG. 10 shows an embodiment in which liquid crystal is used as time display means in the remaining capacity display means according to the present invention. FIG. 11 is an explanatory diagram of a case where a pointer display type is used as a time means of the remaining capacity display means according to the present invention. FIG. 12 is an example of a circuit configuration for displaying the remaining capacity in FIG. FIG. 13 is a block diagram when the pulse width control means is applied to the time display means according to the present invention.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tomio Ueda 390 Shiojiri-cho, Shiojiri City, Shiojiri City, Nagano Prefecture Shiojiri Industrial Co., Ltd. (72) Inventor Masayuki Takayama 390 Shiojiri-cho, Shiojiri-shi, Nagano Prefecture Shiojiri Industry Co., Ltd. (56) References JP-A-54-7378 (JP, A) JP-A-59-26089 (JP, A) Actual development Sho 56-19783 (JP, U)

Claims (1)

[Claims] 1. A power generation means for generating power based on energy applied from the outside, a secondary power supply charged using the output of the power generation means, and a clock circuit to which a power supply voltage is supplied from the secondary power supply. Charging operation display means for performing a forced charge display of the secondary power supply, wherein the charging operation display means includes a first reference voltage corresponding to the forced charge start voltage of the secondary power supply and a sufficiently large value of charge. Second corresponding to the end voltage
A reference voltage setting unit that sets a reference voltage, a first comparator that outputs a first signal when the power supply voltage of the secondary power supply becomes equal to or lower than a first reference voltage, and the power supply voltage of the secondary power supply is A second comparator that outputs a second signal when the voltage becomes equal to or higher than the reference voltage of 2 and a forced charge operation display of the power supply voltage from the time when the first signal is output until the time when the second signal is output. An electronic timepiece with a charging function, characterized by including: