JPH0734444B2 - Method for setting electrode pad of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for setting an electrode pad of a semiconductor element chip in manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In recent years, fine patterning technology for semiconductor devices has been remarkably advanced by LSI technology and the like.
However, on the other hand, in an element having a function of having a large number of extraction electrodes to the outside of the element, the interval between the electrode parts limits the assembly technique and method. Figure 6 shows an IC using a lead frame.
The assembly, particularly, the state where the electrode pads of the element chip and the leads are wire-bonded by the bonding thin wires. In this figure, 101 is a lead frame, 1
Reference numeral 02 is an element chip, 103, 103 ... are bonding thin wires, and 104 is a lead. As is apparent from this figure, the element chip 102 is provided with a plurality of electrode pads (not shown, which will be described in detail in the description of FIG. 7) at the end portion of the main surface in the vicinity of its side edge. And the leads 10 are arranged so as to surround the device chip.
Wire bonding is performed on the thin wires 4, 104 ... With thin bonding wires 103, 103. Above, a so-called DIP type IC assembly is exemplified, and the electrode pad of the element chip and the lead interval are not shortened to the extent found in an LSI.
That is, the element chip 105 of the LSI shown in FIG.
Is a row of electrode pads 106 near the edge of the main surface,
106 are arranged at a certain interval. A functional pattern area 105a is displayed by a broken line in the central portion of the element chip in the figure, and the electrode pads 106, 106 ... Are provided through an unnecessary air area 105b surrounding the functional pattern area 105a.

That is, since there is a limit (minimum) to the interval between the electrode pads, the above-mentioned air space 10 is required for expansion up to now.
5b is interposed undesirably.

The above-mentioned air space 105b has a tendency to shorten the outer dimension of the element chip as much as possible to make IC / LSI smaller and higher in density, and has a significant obstacle to achievement of the demand.
There is a problem that the number of element chips formed from one semiconductor wafer is reduced and the yield is reduced.

[0005]

Although the spacing between the above electrode pads varies, the minimum spacing is limited by the wire bonding method. In other words, the formation of the electrode pad is possible up to a few microns within the limit of patterning technology,
Limited by wire bonding method. That is, in wire bonding, the bonding capillary 107 also called a bonding tool shown in FIG.
The electrode pads 106 are sequentially bonded by the method. However, when bonding is performed on one electrode pad and then on the adjacent electrode pad, there is damage such as deformation of the bonding thin wire already installed. Don't Actual bonding fine wire 1
08 is often used in IC / LSIs having a diameter of 25 to 35 μm, and the capillary used for this is larger than the size of the ball 108a actually bonded and goes further upward. Since it has an inverted conical shape that spreads to 30 °, if the pad spacing is too close, the adjacent bonding thin wires 1 as shown in FIG.
Contact 18 and damage it. Further, during bonding, it is not possible to bring the center of bonding to the actual pad position center due to the accuracy of the bonding apparatus, variations in ball diameter under the capillaries, and the like.

Generally, in an IC / LSI, an element chip is incorporated in a lead frame or an enclosure called a ceramic package and delivered to the user. For that purpose, an enclosure corresponding to an electrode pad of the element chip is provided. Although pads are required, it is well known that the center spacing of a ceramic package can be made narrower than that of a lead frame. Here, the case of a ceramic package will be described. The width of the part needs to be 150 to 200 μm, and the interval is 100 to 1 due to the metallization technology on ceramics.
50 μm is required, so the minimum is 2
The intervals are 50 μm. Therefore, as shown in FIG.
In a product having a large number of electrode pads 106 , ..., At the end portions of the electrode pads arranged in one row of the element chip 105 , the bonding thin wires 108 are forced to diagonally face the row of electrode pads. It In the wire bonding in the diagonal portion, since the distance between the electrode pads is substantially small, the wire bonding is adjusted between the electrode pads and the portions facing each other at a right angle. However, the reference of the distance between the electrode pads is not taken into consideration because of the accuracy of the bonding apparatus, the eccentricity of the ball (to the capillary) due to the variation in the diameter of the ball formed under the capillary, and the like.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and it is an object of the present invention to provide a reference for setting an interval between electrode pads.

[Configuration of Invention]

[0009]

A method for setting an electrode pad of a semiconductor device according to the present invention has a plurality of electrode lead-out leads 13 arranged in parallel , and an element chip facing these leads.
In the interval between the electrode pads 12 disposed on the side edge of the element chip at intervals narrower than the spacing between the leads 11, a _K the bottom radius of the bonding capillary 15, H is the height of the loop, K is the ball Thickness, α is the diameter of the bonding thin wire 14,
Assuming that θ represents the inclination of the side surface of the bonding capillary, the minimum distance L _K between the electrode pads is expressed by the following equation.

[0010]

[Equation 2] The contact between the electrode pad and the electrode lead.
Bonding wire 14 is not perpendicular to the row of electrode pads
In the region where the angle is close to this, the spacing between the electrode pads is
At least the above-mentioned minimum distance L _K , and the bonding thin wire 14
Are adjacent to each other in the area where
The minimum distance between the thin thin lines is at least the minimum distance L _K
Characterized by a.

[0011]

The present invention can provide an electrode pad setting method that facilitates wire bonding to an element chip in a semiconductor device, particularly an IC / LSI, and is effective in improving quality reliability.

[0012]

Embodiments of the present invention will be described below with reference to FIGS.
Will be described with reference to.

In FIG. 1 showing a main part of a semiconductor device according to the present invention, a plurality of electrode lead-out leads 13, 13 ... Provided on the envelope at equal intervals are provided with a semiconductor element chip 11 having a width smaller than these widths. A plurality of electrode pads 12 are formed so as to face each other at the side edges of the. These electrode pads 12, the central portion, i.e., the electrode pads 12a to which the bonding thin lines 14, 14 coupled between the electrode lead lead 13 is in the electrode pad 12 and the right angle to an angle close thereto, 12a ... is below The distance L ₁ is set to be described, and the bonding thin wire 14 for connecting the end portion, that is, the electrode lead 13,
Electrode pad 1 in which 14 ... Diagonally faces the electrode pad 12
2b, 12b ... Are set to the interval L ₂ described below. The above L ₁ and L ₂ were set as follows.

[0014] First, the following equation with reference to FIG. 2 as interval between the electrode pads

[0015]

[Equation 3] Where a _K is the bottom radius of the bonding capillary 15,
H is the height of the loop, K is the thickness of the ball, α is the diameter of the bonding thin wire 14, and θ is the slope of the side surface of the bonding capillary 15 and L _K is set. Then, the electrode pad 12a to which the bonding thin wire connecting the electrode pad and the electrode-leading lead is in the range of a row perpendicular to an angle close to the electrode pad, wherein L _K the distance between 12a ...
The distance L ₁ is set to a value larger than that of wire bonding, and the difference between L ₁ and L _K is added to the distance between the electrode pads at the portion where the thin bonding wire diagonally faces the row of electrode pads. Set to ₂ .

For the setting of L _K , the following value of the bonding data of the gold wire having a diameter of 25 μm is substituted, and θ: 75
°, a _K : 100 μm, H: 200 μm, K: 25 μ
L _k is 157 μm when m and α are 25 μm. This means that theoretically, if it is 157 μm, it is not affected by the capillary. However, since variations in mechanical accuracy, eccentricity of bonding balls, etc. are usually ± 30 μm, the distance between the centers of electrode pads must be 187 μm or more.

The above will be further described. Among the electrode pads shown in FIG. 3 as an example, the distance l _K between the electrode pads on the column line diagonally intersecting with the bonding curve is the distance between the bonding thin wires (perpendicular line from the center of one electrode to the other bonding thin wire: on the XX line). Always) greater than l . This relationship is also apparent in FIG. 4, which is further shown for the part. That is, regarding the bonding to the electrode pads arranged parallel to one side of the main surface of the element chip, for example, if the spacing between the electrode pads is uniformly 1 _K , the spacing between the bonding thin wires is 1 _K at the central portion. but those of l at the end, l <and Taiyoridokoro the accompanying tendency unreasonable at the end while the l _K can afford in the central portion, the spacing between the electrode pads as shown in FIG. 1 To set. That is, in a region where the bonding thin wires are at right angles to or close to the row in which the electrode pads are arranged, the spacing is set to L ₁ (L ₁ > l ) that is close enough to enable bonding, and the spacing l _K between the electrode pads is set. the central portion the terminal number of the difference l _K -L ₁ and (n) times n (l _K -L
End of the electrode pads 12b bonding fine wire ₁₎ the bonding pad row lines obliquely intersect, assignment L ₂ to 12b ... Interval
(L ₂ > L ₁ ). Further, this L ₂ is an average value at the end portions of the element chip, and the distance between the end portions is set to the maximum because it intersects the bonding thin wires most obliquely, so that the minimum distance between the bonding thin wires is secured. , And is gradually reduced toward the central portion. Well
In addition, at the end of the gap between the electrode pads,
The wire depending on the distance l between the adjacent bonding wires.
Since the bonding limit is fixed, the distance l is reduced.
It is necessary to set at least the minimum distance L _K. Therefore, at the end
The distance L ₂ between the electrode pads is at least the relationship shown in FIG.
The value of l _K when the value of the street l was L _K. others
Therefore, even when assigning to the electrode pad on the end as described above
At least this value.

Next, in this embodiment, as shown in FIG. 5, the central electrode pads 22a, 22a ... Are provided in a zigzag pattern in multiple rows with respect to the row of electrode pads. Can be greatly reduced.

[0019]

According to the present invention, a semiconductor device, especially I
The design method for setting the electrode pad for the element chip in the C / LSI and the remarkable effect of facilitating the wire bonding are provided. In particular, it is extremely effective in improving the degree of integration due to the miniaturization of element chips. Further, the method of setting the electrode pad of the semiconductor element is improved so as not to cause the contact of the bonding fine wire including the step of sealing in the envelope, and the quality reliability of the obtained semiconductor device is significantly improved.

[Brief description of drawings]

FIG. 1 is a top view showing a main part for explaining one embodiment of a method for setting an electrode pad according to the present invention.

FIG. 2 is a side view for explaining wire bonding.

FIG. 3 is a diagram for explaining wire bonding.

FIG. 4 is a diagram for explaining wire bonding.

FIG. 5 is a top view of essential parts for explaining another embodiment of the present invention.

FIG. 6 is a front view for explaining the assembly of the IC by the lead frame.

FIG. 7 is a front view of a conventional element chip.

FIG. 8 is a cross-sectional view for explaining wire bonding.

FIG. 9 is a cross-sectional view for explaining wire bonding.

FIG. 10 is a top view showing a main part for explaining conventional wire bonding.

[Explanation of reference numerals] 11 ... Element chips 12 , 12a, 12b, 22a ... Electrode pads 13 ... Electrode leading leads 14 ... Bonding thin wires

Claims (1)

[Claims] 1. A plurality of electrode lead-outs arranged in parallel are provided.
Then, in the distance between the electrode pads arranged on the side edges of the element chip with a distance smaller than the distance between the leads on the element chips facing these leads , a _K is the bottom radius of the bonding capillary, and H is a loop. the height, K is the thickness of the ball, alpha is the diameter of the bonding thin line, theta as each table to the gradient of the side surface of the bonding capillary, the electrode pad of
Following equation 1] The minimum distance L _K between de The contact between the electrode pad and the electrode lead.
The following bonding wire is not perpendicular to the row of electrode pads
In the region where the angle is close to this, the interval between the electrode pads is small.
Even if the above-mentioned minimum interval is L _K , the bonding wire is electrically
In the area diagonally intersecting the row of pole pads, the bond
It is at least the minimum distance L _K minimal spacing between grayed thin line
A method for setting an electrode pad of a semiconductor device, comprising: