JPH0723346A - Image transmission method and system - Google Patents

Abstract

(57) [Abstract] [Purpose] To enable image transmission by variable length coding on satellite communication lines. [Structure] On the image transmitting side, a sync adding circuit 26 adds a sync signal indicating the beginning of an encoded block. The sync signal includes block number information. On the receiving side, memory 3
6 sequentially stores the demodulated data by the demodulation circuit 34.
The sync detection circuit 40 detects the sync signal and applies the block number to the pointer memory 42 as an address. The memory 42 stores the write address of the memory 36 according to the output of the circuit 40. Block number generation circuit 46
Sequentially generate block numbers, and the memory 42 loads the storage address corresponding to the block number into the read address generating circuit 44. After loading, the circuit 44 sequentially increments the address. The data stored in the memory 36 is read by the variable length decoding circuit 48 according to the read address.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image transmission system, and more specifically to an image transmission system for compressing and transmitting image information.

[0002]

2. Description of the Related Art Image information compression methods include a fixed length coding method (for example, DPCM method) and a variable length coding method. The fixed-length coding method has a feature that image data and transmission data have a one-to-one correspondence, so that even if a transmission error occurs, the effect can be suppressed within a coding unit (line or block). . On the other hand, the variable-length coding method can realize a high compression rate, but since the image data and the transmission data do not correspond to each other on a one-to-one basis, there is a drawback in that if a transmission error occurs, the influence of the transmission error is wide.

Conventionally, the variable length coding method is used in a transmission medium having a low occurrence rate of transmission errors (for example, a data transmission path between inside and outside a computer system or a disk medium), and the fixed length coding method is used in the transmission. Transmission medium with high error,
For example, it was used in satellite communication lines.

[0004]

In recent years, there is an increasing demand for transmitting image information through a transmission medium having a high transmission error rate such as a satellite communication line, and image transmission at a high compression rate is desired.

Therefore, an object of the present invention is to provide an image transmission method and system capable of recovering from a transmission error early even with a variable length coding system.

[0006]

According to the image transmitting method of the present invention, the image transmitting side performs variable length coding on the image to be transmitted, and the predetermined delimiter information is set at a specific timing that does not hinder the decoding at the image receiving side. On the image receiving side, the reception information is temporarily stored in the memory means, and the storage address in the memory means of the reception data delimited by the predetermined delimiter information is stored in the pointer memory means. It is characterized in that the reading of data from the means is restricted by the address information stored in the pointer memory means.

In the image transmission system according to the present invention, the image transmission device has a variable length coding means for variable length coding an image to be transmitted and a predetermined delimiter at a specific timing which does not hinder decoding on the image receiving side. The image receiving device includes a delimiter information inserting unit for inserting information, and the image receiving device stores a memory unit for temporarily storing the received information and a storage address of the received data delimited by the predetermined delimiter information in the memory unit. Pointer memory means, read address generating means for loading address information stored in the pointer memory means and generating a read address of the memory means, and read address generating means for reading from the memory means And a decoding means for performing variable length decoding of the data.

[0008]

With the above means, the propagation of the transmission error can be limited to the delimiter information. As a result, the image information can be variable length coded and transmitted even on a transmission line having a high transmission error rate.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a schematic block diagram of an embodiment of the present invention. 10 is a transmitter, 12 is a transmission line, and 14 is a receiver.

The transmitter 10 will be described. The image signal to be transmitted is input to the input terminal 20, and the blocking circuit 2
2 divides the image signal from the input terminal 20 into a plurality of blocks within the screen, and outputs the blocks to the variable length coding circuit 24 in block units. The variable-length coding circuit 24 performs variable-length coding on the image signal in block units, and the sync addition circuit 26, as shown in FIG. 2, adds a block identifier to the beginning of the block-unit code output from the variable-length coding circuit 24. Is added as a sync signal. The sync signal includes block number information. The modulation circuit 28 modulates the output of the sync addition circuit 26 by a predetermined method and outputs it from the output terminal 30 to the transmission line 12.

The receiver 14 will be described. The modulated signal from the transmission line 12 is applied to the demodulation circuit 34 via the input terminal 32 and demodulated. The demodulation circuit 34 outputs the received code data to the memory 36 and the sync detection circuit 40. The write address generation circuit 38 generates an address that is sequentially incremented at a rate corresponding to the transmission rate, and the address is applied to the memory 36 as a write address. The write address generation circuit 38 may generate the write address of the memory 36 according to the timing signal from the demodulation circuit 34. This allows the memory 3
6 sequentially stores the received code data output from the demodulation circuit 34.

The sync detection circuit 40 detects the output of the received code data of the demodulation circuit 34 and outputs the sync addition circuit 2 of the transmitter 10.
The sync signal added in 6 is detected, and the block number value included in the sync signal is output. Pointer memory 42
Stores the write address generated by the write address generation circuit 38 according to the output of the sync detection circuit 40. That is, the pointer memory 42 stores the block start address of the data stored in the memory 36. Pointer
The storage address in the memory 42 corresponds to the block number included in the sync signal. The pointer memory 42 is, for example, a dual port memory with SRAM elements.

The block number generation circuit 46 sequentially generates block numbers in synchronization with the blocks of the received image,
It is applied to the pointer memory 42 as a read address. The pointer memory 42 uses the block number generation circuit 4
The value stored in the address corresponding to the block number 6 generated (that is, the address indicating the head data storage position of the block of that block number in the memory 36) is read and applied to the read address generation circuit 44. The read address generation circuit 44 loads the address from the pointer memory 42 and then sequentially increments the address. The data stored in the memory 36 is read from the read address generated by the read address generating circuit 44 and applied to the variable length decoding circuit 48.

In this way, the variable length decoding circuit 48 is always supplied from the beginning data of each block, so that the influence of the transmission error does not spread to the next block.

In the above embodiment, the reading from the memory 36 is restricted to the head data of each block regardless of the presence or absence of the transmission error. However, only when the undecodable transmission error appears, the next data from the memory 36 is read. It goes without saying that the control may be performed so as to read the data after the head of the block.

[0017]

As can be easily understood from the above description, according to the present invention, the propagation of a transmission error can be limited to a specific block unit. Therefore, the image information can be variable length coded and transmitted even on a transmission line having a high transmission error rate.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an embodiment of the present invention.

FIG. 2 is a data transmission configuration diagram of the present embodiment.

[Explanation of symbols]

10: transmitter 12: transmission line 14: receiver 2
0: Input terminal 22: Blocking circuit 24: Variable length coding circuit 26: Sync addition circuit 28: Modulation circuit 30: Output terminal 32: Input terminal 34: Demodulation circuit 3
6: Memory 38: Write address generation circuit 40: Sync detection circuit 42: Pointer memory 44: Read address generation circuit 46: Block number generation circuit 4
8: Variable length decoding circuit

Claims (7)

[Claims] 1. An image transmitting side performs variable-length coding on an image to be transmitted, inserts predetermined delimiter information at a specific timing that does not interfere with decoding on the image receiving side, and the image receiving side,
The reception information is temporarily stored in the memory means, the storage address in the memory means of the reception data delimited by the predetermined delimiter information is stored in the pointer memory means, and the data read from the memory means is performed by the pointer. An image transmission method characterized in that it is regulated by the address information stored in the memory means. 2. The image transmission method according to claim 1, wherein the delimiter information includes block identification information by the delimiter. 3. The image transmission method according to claim 2, wherein the block includes one or more coded blocks. 4. An image transmitting apparatus, a variable length coding means for variable length coding an image to be transmitted, and delimiter information insertion for inserting predetermined delimiter information at a specific timing that does not hinder decoding on the image receiving side. And a pointer memory unit for storing a storage address in the memory unit of the received data delimited by the predetermined delimiter information, the image receiving apparatus including: Address information stored in the pointer memory means is loaded, and read address generating means for generating a read address of the memory means, and variable length decoding of data read from the memory means by the read address generating means. An image transmission system comprising: a decoding unit. 5. The image transmission system according to claim 4, wherein the delimiter information includes block identification information by the delimiter. 6. The image transmission system according to claim 5, wherein the block comprises one or more coded blocks. 7. The image receiving device further comprises identification information generating means for generating block identification information by the division, and the pointer memory means responds to the identification information output by the identification information generating means. 7. The image transmission system according to claim 5, wherein the storage address information corresponding to the identification information is loaded into the read address generating means.