JPH07162867A - Motion vector detection circuit - Google Patents

Abstract

(57) [Summary] [Object] To suppress an increase in circuit scale when a circuit is divided into channels in a motion vector detection circuit that receives a high data rate signal such as an HD signal as an input signal. [Structure] Block 1 field data is ch1
And means for allocating the data of the second field to ch2, and the data of the first field of the search area to ch1,
A means for allocating the data of the second field to ch2, and
means for calculating the prediction error of each candidate vector for each ch,
For each candidate vector, the sum of the prediction errors calculated for each channel is calculated, and the prediction error of each candidate vector is compared to detect one motion vector for one block.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to data compression based on encoding of a digital moving image, and more particularly to a motion vector detecting circuit for detecting a motion vector in interframe encoding.

[0002]

2. Description of the Related Art In encoding a digital moving image, motion compensation is performed in order to improve the encoding efficiency of a moving part.
In the TV signal, due to interlaced scanning (interlace), one screen is formed by two fields, the first field and the second field, and this is called one frame. FIG. 12 shows the positional relationship of pixels used for motion vector detection. Now, let the pixel in the screen of the input image be X (i, j)
, The pixel on the left of X (i, j) is X (i-
1, j), the pixel immediately above is referred to as X (i, j-1). Furthermore, if the pixel X
The pixel at the same position as (i, j) is Y (i, j), and similarly, the pixel on the left of Y (i, j) is Y (i-1, j),
The pixel immediately above is called Y (i, j-1). It should be noted that the pixels in the first field are represented by the black circle symbols shown in the pixel 23, and the pixels in the second field are represented by the white circle symbols shown in the pixel 24. Hereinafter, the description will be made using this notation. To do.

Conventional motion vector detection will be described with reference to FIGS. 13 and 14. In FIG. 13, reference numerals 25 and 26 are frame memories, 27 is a block memory for storing blocks, 28 is a search area memory for storing an area cut out from a reference image, 29 is a prediction error calculation circuit, 30
Is a comparison circuit. The operation of the motion vector detection circuit configured as above will be described. First, the input image is stored in the frame memory 25 and connected to the input side of the block memory 27. On the other hand, the reference image is stored in the frame memory 26 and connected to the input side of the search area memory 28.
Here, the memory capacity of each of the frame memories 25 and 26 is 1
It is for a frame. A block of 8 × 8 pixels is cut out from the frame memory 25 and stored in the block memory 27. Since the motion vector detection is performed only for the luminance component, the capacity of the block memory 27 needs to be 8 × 8 = 64 bytes when one pixel is 8 bits (1 byte).

From the frame memory 26, it is necessary to try a total of 17 × 17 candidate vectors in the range of ± 8 pixels in the vertical direction and ± 8 pixels in the horizontal direction centering on the block 31 as shown in FIG. An area 32 consisting of 24 × 24 pixels is cut out and stored in the search area memory 28. The capacity of the search area memory 28 at this time requires 24 × 24 bytes. Here, the area cut out from the reference image (in this case, 24
X 24 pixels) is called the search area for block 31,
Hereinafter, this notation will be used. The prediction error calculation circuit 29 calculates and calculates the prediction pixel of each pixel in the block for each candidate vector using a calculation unit described later. Further, for each candidate vector, the sum of absolute values of the differences between the pixels in the block and the predicted pixels is calculated. The comparison circuit 30 compares the sums of the absolute values of the differences calculated for each candidate vector, and sets the candidate vector having the smallest sum of the absolute values of the differences as the motion vector of the block.

A prediction pixel calculation method will be described with reference to FIG. FIG. 15 is a view of FIG. 14 seen in parallel with the time axis and in the direction of time progress. Area 33 is a block formed by 8 × 8 pixels, and area 34 is a search area formed by 24 × 24 pixels. is there. The vector 35 is an arbitrary candidate vector and is expressed as MV = (MVx, MVy). Here, MVx is a horizontal motion vector, and X (i, j) in FIG.
And the distance between X (i + 1, j) is 1. MVy is a motion vector in the vertical direction, and X (i, j) and X in FIG.
The distance of (i, j + 1) is 1. According to the notation defined in FIG. 12, when the pixel at the upper left corner of the block is represented as X (i, j), the predicted pixel Z (i, j) of X (i, j) for any candidate vector MV is It is calculated by the arithmetic expression of 1).

[0006]

Z (i, j) = t {(1-s) C + sD} + (1-t) {(1-s) A + sB}

[0007]

[Outer 1]

For the predicted pixel calculated by this predicted pixel calculation method, the vertical component of an arbitrary candidate vector is +1.0,
When FIG. 14 is viewed from the direction perpendicular to the time axis, it becomes like FIG. 16, a is a pixel in the first field in the block, b is a pixel in the second field in the same block as a, and a and b are X (i, j) and X in FIG. 15, respectively.
It corresponds to (i, j + 1). c is the predicted pixel of a obtained by the above equation (1), and d is the same as c
It is a predicted pixel of b obtained by the arithmetic expression of (Equation 1). c,
d corresponds to Z (i, j) and Z (i, j + 1) in FIG. 15, respectively. The first field is represented by f1 and the second field is represented by f2. Several types of prediction pixel calculation methods have been proposed in addition to the above, but the above calculation method is generally used from the viewpoint of the circuit scale due to the accuracy of internal division. Hereinafter, the above calculation method will be referred to as a predicted pixel calculation method 1.

Up to this point, the data rate of the signal is low and 1
Although the case where motion vector detection can be performed in ch has been described, ch is required for high-speed processing when processing a signal with a high data rate such as an HD (high density) signal.
It is necessary to divide (channel) and operate the motion vector detection circuit in parallel. For example, using the above-mentioned conventional method, 2
FIG. 17 shows the circuit configuration when the ch division processing is performed. Figure 17
, 36, 37, 38, 39 are frame memories, 40, 42 are block memories for storing blocks, 41, 43 are search area memories for storing search areas, 44, 45 are prediction error calculation circuits, 46, 47 is a comparison circuit.

The operation of the motion vector detection circuit divided into 2 channels configured as above will be described. Generally 2
In the case of performing the ch division processing, the input image is divided into two channels up and down as shown in FIG. 18 or left and right as shown in FIG. At this time, a half area of the input image divided into ch1 is called an area A, and a half area of the input image divided into ch2 is called an area B. Area A is in the frame memory 36 and area B is
Is input to the frame memory 38. At this time, the capacities of the frame memories 36 and 38 are each 1/2 frame.
Next, if the pixel in the reference image necessary for calculating the predicted pixel of the pixel in the block in the area A allocated to ch1 is ch
1 indicates that the pixel in the reference image necessary for calculating the predicted pixel of the pixel in the block in the area B allocated to ch2 is
It is divided into ch2 and input to the frame memories 37 and 39, respectively. At this time, the memory capacity of the frame memory 37 is 1 /
This is the total capacity of two frames and the memory capacity of the area necessary for detecting the motion vector of the lowest block of the area A shown by the diagonal lines in FIG. 20, and the memory capacity of the frame memory 39 is 1/2. Area B indicated by diagonal lines in Fig. 21 for the frame
This is the capacity of the memory necessary for detecting the motion vector of the uppermost block of.

8 × 8 cut out from the frame memory 36
A block of pixels is stored in the block memory 40, and a block of 8 × 8 pixels cut out from the frame memory 38 is stored in the block memory 42. The block assigned to ch1 is assigned to block 1 and ch2. The block will be called block 2. Next, a search area of 24 × 24 pixels necessary for calculating a prediction error for each candidate vector for the block 1 cut out from the frame memory 37 is provided in the search area memory 41 and a block cut out from the frame memory 39. 24 × 24 required to calculate the prediction error for each candidate vector for 2
The search areas of pixels are stored in the search area memory 43, and the search area assigned to ch1 is referred to as search area 1 and the search area assigned to ch2 is referred to as search area 2. At this time, the total capacity of the block memory needs to be (8 × 8) × 2 bytes, and the total capacity of the search area memory needs to be (24 × 24) × 2 bytes. The prediction error calculation circuit 44 calculates the prediction pixel of the pixel of the block 1 from the pixel of the search area 1 for each candidate vector, and calculates the error between the pixel in the block 1 and the prediction pixel. The comparison circuit 46 compares the prediction errors of the respective candidate vectors and sets the candidate vector having the smallest prediction error as the motion vector of block 1. In parallel with the prediction error calculation circuit 44, the prediction error calculation circuit 45 calculates the prediction pixel of the pixel of block 2 from the pixel of the search area 2 for each candidate vector, and calculates the error between the pixel of block 2 and the prediction pixel. calculate. The comparison circuit 47 compares the prediction error for each candidate vector, and determines the candidate vector having the smallest prediction error as block 2.
Is the motion vector of.

[0012]

However, as shown in the conventional example, one frame as a whole is vertically or horizontally divided into two.
When ch is divided and the motion vectors of two blocks are calculated in parallel, the memory capacity for storing the pixel in the block and the memory capacity for storing the pixel in the search area are doubled as compared with the case of the 1ch processing, and The capacity will also increase slightly. In addition, a prediction error calculation circuit and a comparison circuit are required twice, and a channel division circuit is also required. As a result, there has been a drawback that the circuit scale of the motion vector detecting unit is increased to about double. The present invention solves the above-mentioned conventional problems. A first object of the present invention is to divide a pixel in a block into 2 channels, thereby moving two blocks with a smaller circuit scale than the conventional method of dividing one frame into 2 channels. It is an object of the present invention to provide a motion vector detection circuit capable of calculating a vector in parallel. The second purpose is to set the number of pixels in the block to 1
It is to provide a motion vector detection circuit that detects a motion vector with a circuit scale smaller than that of 1 ch for a high data rate signal such as an HD signal that cannot be processed by 1 ch by thinning out / 2.

[0013]

A first aspect of the present invention for achieving the above object is to divide an entire input image frame into blocks each consisting of K × L pixels and store the blocks, and a reference image. From the block, a search area consisting of M × N pixels necessary for calculating a prediction pixel corresponding to a position shifted by a plurality of candidate vectors is cut out, and means for storing the cut out search area; Dividing means for dividing into first channel block data and second channel block data,
Dividing means for dividing the search area into first channel search area data and second channel search area data, and a predictive pixel of the first channel block data is calculated from only the first channel search area data for each candidate vector. First prediction error calculating means for calculating an error between the first channel block data and the predicted pixel thereof, and the second vector for each candidate vector.
Second predictive error calculating means for calculating a predictive pixel of channel block data only from the second channel search area data and calculating an error between the second channel block data and the predictive pixel, and for each candidate vector Then, the sum of the prediction error of the first channel calculated by the first prediction error calculation means and the prediction error of the second channel calculated by the second prediction error calculation means is calculated, and each candidate vector is calculated. It is characterized in that one motion vector is detected for one of the blocks by comparing the prediction errors of.

A second invention is characterized in that the ch division circuit divides the pixels in the first field into the first channel and the pixels in the second field into the second channel.

According to a third aspect of the present invention, one input image frame is divided into blocks each consisting of K × L pixels, the block is stored, and the position of the reference image is shifted by a plurality of candidate vectors. Means for cutting out a search area composed of M × N pixels necessary for calculating a predicted pixel corresponding to the above, and storing the cut out search area, and the first field of the block, or the second field.
First thinning means for thinning out only pixels in one of the fields, second thinning means for thinning out pixels in the same field as the field in which the blocks are thinned out from the search area, and for each candidate vector , The prediction pixel of each pixel of the decimated block consisting of only one of the fields extracted by the first decimating means, and the decimating pixel of only one of the fields extracted by the second decimating means. It is calculated by using only the pixels in the searched search area, the error between the pixel of the thinned block and its prediction pixel is calculated, and the prediction error of each candidate vector is compared to obtain one of the above. The feature is that one motion vector is detected for each block.

[0016]

In the present invention, a high data rate signal such as an HD signal is used as an input signal, and a low data rate signal capable of 1-channel processing shown in the conventional example is excluded. At this time, first, the inside of the block is divided into two channels by the above method,
The search area required for calculating the predicted pixel for each candidate vector for the block assigned to 1 is ch1 and the pixel within the search area required for calculating the predicted pixel for each block is assigned to ch2. Pixels in the area are divided into ch2, the sum of prediction errors calculated for each ch is calculated, and by comparing each, one motion vector is detected for one block. It is possible to reduce the memory capacity for the block and the memory capacity for the search area.

Second, the pixel in the first field of the block
The pixels in ch1 and the second field are divided into ch2, and the predicted pixel of the pixel in the first field of the block assigned to ch1 is calculated from only the pixels in the first field of the search area to the pixel of the block assigned to ch2. By calculating the predicted pixel of the pixel in the second field from only the pixel in the second field of the search area, the pixels in the search area assigned to ch1 are only the pixels in the first field and ch.
The pixels in the search area assigned to No. 2 are only the second field pixels, and the memory capacity for the search area can be further reduced.

Thirdly, the pixel in the block is set to the field 1/2.
By thinning out and calculating the predicted pixel only from the pixels in the same field of the search area, a motion vector can be detected with a circuit scale smaller than the 1ch processing shown in the conventional example for a signal of a high data rate that cannot be processed by 1ch. It can be carried out.

[0019]

Embodiments In the embodiments described below, a signal having a high data rate that cannot be processed by one channel, such as an HD signal, is used as an input signal. Next, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram of a motion vector detection circuit showing a first embodiment of the present invention. In FIG.
1, 2 are frame memories, 3, 4 are ch division circuits, 5, 6
Is the block memory that stores the pixels in the block,
Reference numerals 7 and 8 are search area memories for storing pixels in the search area, 9 and 10 are prediction error calculation circuits, and 11 is a comparison circuit.

The operation of the motion detection circuit configured as described above will be described. First, the input image is stored in the frame memory 1, and the reference image is stored in the frame memory 2. A block of 8 × 8 pixels is cut out from the frame memory 1 and input to the ch division circuit 3. The ch division circuit 3 divides the block into 2 ch as shown in FIG. 2, and the two ch divided 4 × 8 pixel blocks are stored in the block memory 5 and the block memory 6, respectively. A block of 4 × 8 pixels assigned to ch1 is called a block 1, and a block of 4 × 8 pixels assigned to ch2 is called a block 2. In this case, the total capacity of the block memory is (4 × 8) × 2 bytes. Next, a search area of 24 × 24 pixels necessary for calculating a predicted pixel corresponding to a position where the block is shifted by the candidate vector is cut out from the frame memory 2 and input to the ch division circuit 4.
The ch division circuit 4 stores, in the search area memory 7, 20 × 24 pixels in the search area necessary for calculating the predicted pixel corresponding to the position where the block 1 is shifted by the candidate vector as shown in FIG. 20 × 24 pixels in the search area necessary for calculating the predicted pixel corresponding to the position where the block 2 is shifted by the candidate vector are used as the search area memory 8
Store at. Here, 20 × 24 pixels assigned to ch1 are referred to as search area 1, and 20 × 24 pixels assigned to ch2 are referred to as search area 2. In this case, the total capacity of the search area memory is (20 × 24) × 2 bytes.

The prediction error calculation circuit 9 calculates the prediction pixel of the pixel of the block 1 from the search area 1 for each candidate vector. Further, the error between the pixel of block 1 and its predicted pixel is calculated. In parallel with this, the prediction error calculation circuit 10 calculates the prediction pixel of the pixel of block 2 from the search area 2 for each candidate vector, and further calculates the error between the pixel of block 2 and its prediction pixel. The comparison circuit 11 calculates, for each candidate vector, the sum of the prediction error of ch1 calculated by the prediction error calculation circuit 9 and the prediction error of ch2 calculated by the prediction error calculation circuit 10, and the prediction error of each candidate vector. By comparing the above, one motion vector is detected for one block.

A comparison of the memory capacities used in the first embodiment and the conventional example shows (Table 1).

[0023]

[Table 1]

As is clear from the comparison of the memory capacities described above, dividing the block into 2 channels as shown in the first embodiment reduces the memory capacity as compared with the case where the entire screen shown in the conventional example is divided into 2 channels. be able to.

A second embodiment of the present invention will be described below with reference to the drawings. The circuit configuration is similar to that of FIG. The difference from the first embodiment is that the ch division circuit 3,
4 and the operation of the prediction error calculation circuits 9 and 10, and the capacities of the block memories 5 and 6 and the search area memories 7 and 8. Next, the operation of the motion vector detection circuit will be described. First, the input image is stored in the frame memory 1 and the reference image is stored in the frame memory 2. A block of 8 × 8 pixels is cut out from the frame memory 1 and input to the ch division circuit 3. As shown in FIG. 4, the ch division circuit 3 divides a pixel in the first field of the block into ch1 and a pixel in the second field into ch2, and divides the ch into two four parts.
The blocks of × 8 pixels are stored in the block memory 5 and the block memory 6, respectively. Note that a block of 4 × 8 pixels assigned to ch1 is a block 1 and a block of ch2
The block of 4 × 8 pixels assigned to the block is called block 2. In this case, the total capacity of the block memory is (4 x 8)
× 2 bytes. Next, a 24 × 24 pixel search area necessary for calculating a predicted pixel corresponding to a position where the block is shifted by the candidate vector is cut out from the frame memory 2 and input to the ch division circuit 4. ch division circuit 4
As shown in FIG. 5, 12 × 24 pixels in the search area necessary for calculating the predicted pixel corresponding to the position where the block 1 is shifted by the candidate vector are used as the search area memory 7
Then, 12 × 24 pixels in the search area necessary for calculating the predicted pixel corresponding to the position where the block 2 is shifted by the candidate vector are stored in the search area memory 8.
Here, the search area of 12 × 24 pixels assigned to ch1 is referred to as a search area 1, and the search area of 12 × 24 pixels assigned to ch2 is referred to as a search area 2. In this case, the total memory required for the search area is (12 x 24) x 2 by
te.

Next, a predictive pixel calculation method in the second embodiment will be described with reference to FIG. FIG. 6 is a view of FIG. 14 seen from the time axis direction. The area 12 is a block formed of 8 × 8 pixels, and the area 13 is a search area formed of 24 × 24 pixels. The vector 14 is an arbitrary candidate vector MV = (MVx, MVy), and the definition of the distance is as described in the description of the conventional example. When the pixel at the upper left corner in the block is represented as X (i, j), the predicted pixel Z (i, j) of X (i, j) for any candidate vector MV is calculated by the arithmetic expression of (Equation 2). It

[0027]

[Equation 2]

[0028]

[Outside 2]

The predicted pixel calculated by this predicted pixel calculation method is set to +1.0 as the vertical component of an arbitrary candidate vector,
When FIG. 14 is viewed from the direction perpendicular to the time axis, it becomes like FIG. In FIG. 7, a is a pixel in the first field in the block, b is a pixel in the second field in the same block as a, and a and b are X (i, j), X (i,
j + 1). c is a predicted pixel of a calculated by the above-described arithmetic expression, and c is a predicted pixel of b calculated in the same manner as d. c and d are Z (i,
j), Z (i, j + 1). The difference from the prediction pixel calculation method 1 shown in the conventional example is that the prediction pixel of the pixel in the first field in the block is changed from the pixel in the first field of the search area to the prediction pixel of the pixel in the second field in the block. This is the point that calculation is performed only from the pixels in the second field of the search area. Hereinafter, this calculation method will be referred to as a predicted pixel calculation method 2. The prediction error calculation circuit 9 calculates a prediction error between the pixel of the block 1 and its predicted pixel for each candidate vector, and the prediction error calculation circuit 10 calculates the prediction error of the pixel of the block 2 and its predicted pixel for each candidate vector. Calculate the prediction error. The comparison circuit 11 has, for each candidate vector,
By calculating the sum of the prediction error of ch1 calculated by the prediction error calculation circuit 9 and the prediction error of ch2 calculated by the prediction error calculation circuit 10 and comparing each for each candidate vector, one block is obtained. On the other hand, one motion vector is detected.

The memory capacities used in the second embodiment and the conventional example are shown in comparison with (Table 2).

[0031]

[Table 2]

As is clear from the comparison of the memory capacities, the blocks shown in the second embodiment are divided into 2ch fields.
By dividing, the frame memory capacity can be reduced as compared to the case where the entire screen shown in the conventional example is divided into 2 channels, and particularly, the block and search area memory capacities can be reduced to 1/2. Furthermore, the block and search area memory capacities can be reduced as compared with the channel division shown in the first embodiment.

The third embodiment of the present invention will be described below with reference to the drawings. FIG. 8 is a diagram of a motion vector detection circuit showing a third embodiment of the present invention. In FIG. 8, 15 and 16 are frame memories, 17 and 18 are thinning circuits, and 19
Is a block memory, 20 is a search area memory, 21 is a prediction error calculation circuit, and 22 is a comparison circuit.

The operation of the motion vector detection circuit configured as above will be described. First, the input image is a frame memory
15, the reference image is stored in the frame memory 16, respectively. A block of 8 × 8 pixels is cut out from the frame memory 15 and input to the thinning circuit 17. The thinning circuit 17
By thinning out the second field of the block as shown in FIG. 9, a block of 4 × 8 pixels formed only in the first field is stored in the block memory 19. Next, it is necessary to calculate the predicted pixel corresponding to the position shifted from the frame memory 16 by each candidate vector.
The search area of 24 × 24 pixels is cut out and the thinning circuit 18
Entered in. As shown in FIG. 10, the thinning circuit 18 uses the same second field as the field obtained by thinning blocks from the search area.
By thinning out the fields, a block of 12 × 24 pixels formed only in the first field is stored in the search area memory 20. Note that FIG. 8 shows an example in which 8 × 8 pixels are cut out from the frame memory 15 and input to the thinning circuit 17 and the field 1/2 thinning is performed by the thinning circuit 17, but in addition to this, a control circuit is provided in the frame memory 15. A configuration is also conceivable in which 4 × 8 pixels formed from only the first field are connected to the frame memory and directly output to the block memory 19. This control also applies to thinning out the search area.

Next, the prediction error calculation circuit 21 determines, for each candidate vector, the predicted pixel of each pixel of the block formed from only the first field as a pixel in the search area formed from only the same first field as the block. Then, the prediction error between the pixel of the block and the predicted pixel thereof is calculated by the calculation according to the arithmetic expression of (Equation 2) shown in the second embodiment. The comparison circuit 22 compares the prediction error calculated for each candidate vector and detects one motion vector for one block.

By thinning out the second field of the pixels in the block and calculating a 4 × 8 pixel prediction pixel formed by only the first field using the prediction pixel calculation method 2,
The reference pixel required for the prediction pixel calculation is the first in the search area.
Since it is 12 x 24 pixels formed only from the field,
The memory capacity for the search area can be reduced to 1/2 as compared with the 1ch processing shown in the conventional example. Similarly, the block memory capacity is 1/2 as compared with the 1ch processing shown in the conventional example. Although the field 1/2 thinning-out has been described in the third embodiment, the thinning-out pattern is not limited to this. In addition to the third embodiment, as shown in FIG. 11, horizontal thinning-out, 1/2 diagonal thinning-out, etc. are conceivable. In any case, block and search are performed more than the 1ch processing shown in the conventional example. The memory capacity for the area can be reduced. Table 3 shows the memory capacities for blocks and search areas required for the 1ch processing shown in the conventional example and the field 1/2 thinning-out shown in the third embodiment.

[0037]

[Table 3]

As is apparent from the comparison of the memory capacities, the blocks are decimated by field 1/2 as shown in the third embodiment, and the prediction pixel calculation method 2 is used for the prediction pixel calculation. The capacity of the search area memory can be reduced as compared with the case of the 1-channel processing shown. When comparing the circuit configuration of the 1ch processing shown in the conventional example with the circuit configuration of the third embodiment shown in FIG. 8, the difference between them is the capacity of the block and search area memories and the presence or absence of the thinning circuit. Is. In the third embodiment, the capacity of the block memory and the search area memory is 1/2 as compared with the 1ch processing shown in the conventional example, but a thinning circuit is necessary. Since this thinning-out circuit is a simple circuit composed of switches and the like, the third embodiment can perform motion vector detection as a whole with a circuit scale smaller than the 1ch processing shown in the conventional example.

[0039]

As described above, according to the present invention, first, a block is divided into two channels, and a pixel in a search area necessary for calculating a predicted pixel for each candidate vector for a block assigned to ch1 is set to ch1. Pixels in the search area necessary for calculating the prediction pixel for each candidate vector for the block assigned to ch2 are divided into ch2, the sum of the prediction errors calculated for each ch is calculated, and each is compared. By detecting one motion vector for one block, it is possible to reduce the capacities of the block memory and the search area memory as compared with the conventional case where the entire one frame is divided into two channels.

Second, the pixel in the first field of the block
ch1, the pixel in the second field is divided into ch2, and the predicted pixel of the pixel in the first field of the block assigned to ch1 is calculated from only the pixel in the first field in the search area.
By calculating the predicted pixel of the pixel in the second field of the block allocated to No. 2 from only the pixel in the second field of the search area, the pixel in the search area allocated to ch1 is allocated only to the pixel in the first field and to ch2. Pixels in the search area that can be used are only the second field pixels, and it is possible to further reduce the memory capacity for the search area.

Thirdly, the pixel in the block is set to the field 1/2.
By thinning out and calculating the predicted pixel only from the pixels in the same field of the search area, the capacity of the block memory and the search area memory can be reduced as compared with the 2ch processing, and as a result, the circuit scale can be smaller than that of the 1ch processing. Motion vector detection can be performed.

[Brief description of drawings]

FIG. 1 is a diagram showing a motion vector detection circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram showing division of a block into two channels by a first channel division circuit in the first embodiment of the present invention.

FIG. 3 is a diagram showing division of a search area into two channels by a second channel division circuit in the first embodiment of the present invention.

FIG. 4 is a diagram showing field 2ch division of a block by a first channel division circuit in a second embodiment of the present invention.

FIG. 5 is a diagram showing field 2 channel division of a search area by a second channel division circuit in the second embodiment of the present invention.

FIG. 6 is a diagram showing a positional relationship of pixels on a screen which is a calculation target by a prediction pixel calculation method used in the second embodiment of the present invention.

FIG. 7 is a diagram of FIG. 6 viewed from a direction perpendicular to a time axis.

FIG. 8 is a diagram showing a motion vector detection circuit according to a third embodiment of the present invention.

FIG. 9 is a diagram showing 1/2 thinning of blocks by the first thinning circuit according to the third exemplary embodiment of the present invention.

FIG. 10 is a diagram showing 1/2 thinning of the search area by the second thinning circuit according to the third embodiment of the present invention.

FIG. 11 is a diagram showing 1/2 thinning-out of blocks other than those shown in the third embodiment of the present invention.

FIG. 12 is a diagram showing the positional relationship between pixels on the screen of the input image and the immediately preceding image targeted by the motion vector detection method according to the present invention.

FIG. 13 is a diagram showing a conventional motion vector detection circuit.

FIG. 14 is a diagram showing a positional relationship between a block in an input image and a search area in a reference image.

FIG. 15 is a diagram showing a positional relationship of pixels on a screen which is a calculation target in a prediction pixel calculation method used in a conventional example.

16 is a diagram of FIG. 15 viewed from a direction perpendicular to the time axis.

FIG. 17 is a diagram showing a circuit configuration for explaining a conventional method of dividing the entire input image into two channels and performing parallel calculation of motion vectors of blocks of each channel.

[Fig. 18] Fig. 18 is a diagram showing division of the entire conventional input image into upper and lower two channels.

FIG. 19 is a diagram showing conventional left / right 2-channel division of the entire input image.

20 is a diagram showing a search area in a region divided into ch1 when the entire input image shown in FIG. 18 is vertically divided into two channels.

FIG. 21 is a diagram showing a search area of an area divided into ch2 when the entire input image shown in FIG. 18 is vertically divided into two channels.

[Explanation of symbols]

1, 2, 15, 16, 25, 26, 36, 37, 38, 39 ... Frame memory, 3, 4 ... Ch division circuit, 5, 6, 19, 27, 40,
42 ... Block memory, 7, 8, 20, 28, 41, 43 ... Search area memory, 9, 10, 21, 29, 44, 45 ... Prediction error calculation circuit, 11, 22, 30, 49, 47 ... Comparator circuit, 12,
13, 32, 33, 34 ... Area, 14, 35 ... Vector, 17, 18
… Thinning circuit, 23, 24… Pixels.

Claims (3)

[Claims] 1. An entire input image frame is K × L (K,
L is a positive integer) means for dividing the block into blocks each consisting of pixels, and M for calculating the predicted pixel corresponding to the position where the block is shifted from the reference image by a plurality of candidate vectors Means for cutting out a search area composed of × N (M and N are positive integers) pixels, storing the cut-out search area, and dividing means for dividing the block into first channel block data and second channel block data. Dividing means for dividing the search area into first channel search area data and second channel search area data, and predictive pixels of the first channel block data for each candidate vector only in the first channel search area data. The error between the first channel block data and the predicted pixel is calculated from First prediction error calculating means for calculating, and for each candidate vector, a prediction pixel of the second channel block data is calculated by calculating only from the second channel search area data, and the second channel block data and its prediction Second prediction error calculation means for calculating an error with a pixel, and for each candidate vector, the prediction error of the first channel calculated by the first prediction error calculation means and the second prediction error calculation means. Motion vector detection, characterized in that one motion vector is detected for one of the blocks by calculating a sum with the calculated prediction error of the second channel and comparing the prediction errors of the respective candidate vectors. circuit. 2. A first channel dividing means for dividing a pixel in a first field of a block into a first channel and a pixel in a second field into a second channel, and a pixel in a first field of a search area into a first channel. 2. The motion vector detection circuit according to claim 1, further comprising a second channel division circuit for dividing the pixels in one channel and the second field into the second channel. 3. A unit for dividing an entire one frame of an input image into K × L pixel block units and storing the block, and a prediction pixel corresponding to a position where the block is shifted from a reference image by a plurality of candidate vectors. Means for cutting out a search area consisting of M × N pixels necessary for calculating the above and storing the cut-out search area, and only pixels in one of the first field and the second field of the block A thinning means, a second thinning means for thinning out pixels in the same field as the field thinning the block from the search area, and the first thinning means for each candidate vector.
A thinned search area consisting of only one of the fields extracted by the second thinning means for the predicted pixel of each pixel of the thinned block consisting of only one of the fields extracted by the thinning means. Calculated by using only the pixels of the block, the error between the pixel of the thinned block and its prediction pixel is calculated, and the prediction error of each candidate vector is compared to obtain 1 for each block. A motion vector detection circuit characterized by detecting two motion vectors.