JPH07142288A - Method of manufacturing multilayer thin film capacitor - Google Patents
Method of manufacturing multilayer thin film capacitorInfo
- Publication number
- JPH07142288A JPH07142288A JP5312495A JP31249593A JPH07142288A JP H07142288 A JPH07142288 A JP H07142288A JP 5312495 A JP5312495 A JP 5312495A JP 31249593 A JP31249593 A JP 31249593A JP H07142288 A JPH07142288 A JP H07142288A
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- Prior art keywords
- electrode
- thin film
- electrodes
- film capacitor
- dielectric
- Prior art date
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Abstract
(57)【要約】
【目的】 簡単な方法にて電極取り出し端面に一方の電
極のみを露出させる。
【構成】 一方の電極2の電極取り出し端面側において
は他方の電極4の端部のみを部分的にエッチングし、他
方の電極4の電極取り出し端面側においては一方の電極
2の端部のみを部分的にエッチングする。
(57) [Summary] [Purpose] Only one electrode is exposed at the electrode extraction end face by a simple method. [Structure] On the electrode extraction end surface side of one electrode 2, only the end portion of the other electrode 4 is partially etched, and on the electrode extraction end surface side of the other electrode 4, only the end portion of one electrode 2 is partly etched. Etching.
Description
【0001】[0001]
【産業上の利用分野】本発明は電極と誘電体とを交互に
積層してなる積層薄膜コンデンサの製造方法に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a laminated thin film capacitor in which electrodes and dielectrics are alternately laminated.
【0002】[0002]
【従来の技術】プリント基板への高密度実装に対応する
ため、コンデンサの分野でも表面実装し得るチップ化が
図られており、中でも積層セラミックコンデンサや薄膜
コンデンサは早くからチップ型に着手されている。2. Description of the Related Art In order to support high-density mounting on a printed circuit board, a chip which can be surface-mounted in the field of capacitors has been sought, and among them, a multilayer ceramic capacitor and a thin film capacitor have been started as a chip type from an early stage.
【0003】ここで、チップ型セラミックコンデンサの
製造法の一例を説明すると、まず、鉛系またはチタン酸
バリウム系の素材を調合した誘電体材料に適当なバイン
ダーを混合してスラリー化する。An example of a method of manufacturing a chip-type ceramic capacitor will be described. First, a dielectric material prepared by mixing a lead-based or barium titanate-based material with a suitable binder is mixed into a slurry.
【0004】次に、このスラリーを所定の基板上にスク
リーン印刷し乾燥させた後、電極をスクリーン印刷し乾
燥させる。これを所定回数繰り返して多層構造とする。
また、別の方法としては、スラリーをグリーンシート化
し、これに電極を印刷したものを積層、圧着して多層構
造とする場合もある。Next, this slurry is screen-printed on a predetermined substrate and dried, and then the electrodes are screen-printed and dried. This is repeated a predetermined number of times to form a multilayer structure.
As another method, there is also a case where a slurry is formed into a green sheet, and an electrode is printed on the green sheet, which is laminated and pressure-bonded to form a multilayer structure.
【0005】しかる後、所望のチップサイズに切断し、
脱バインダーおよび焼成を行ない、最後に外部電極を塗
布焼き付けし、その外部電極にハンダ付け性を良くする
ためにメッキを施す。Then, cut into a desired chip size,
The binder is removed and baked, and finally the external electrodes are coated and baked, and the external electrodes are plated to improve solderability.
【0006】薄膜コンデンサは、シリコン、アルミナ、
ガラス、サファイアなどの基板上にスパッタリングや蒸
着物等の物理的生膜方法もしくはMOCVD(Meta
lOxide Chmical Vapour Dep
osition)などの化学的生膜方法で誘電体膜を電
極膜で挟むようにして形成され、積層型の場合はこれを
繰り返して多層構造とされる。Thin film capacitors are made of silicon, alumina,
A physical film forming method such as sputtering or vapor deposition on a substrate such as glass or sapphire or MOCVD (Meta)
lOxide Chemical Vapor Dep
The film is formed by sandwiching the dielectric film between the electrode films by a chemical biofilm method such as the oscillating method), and in the case of a laminated type, this is repeated to form a multilayer structure.
【0007】[0007]
【発明が解決しようとする課題】セラミックコンデンサ
は今後さらにチップ化、小型化、大容量化していく傾向
にある。静電容量を大きくするには次式より誘電体膜を
薄くすれば良い。Ceramic capacitors have a tendency to be further made into chips, smaller in size and larger in capacity in the future. In order to increase the capacitance, the dielectric film may be thinned according to the following equation.
【0008】C(F)=8.85×10−12εS(m
2)/D(m) なお、Fはコンデンサの静電容量、εは比誘電率、Sは
誘電体を挟んで相対する電極の面積、Dは誘電体の厚み
である。C (F) = 8.85 × 10 −12 εS (m
2 ) / D (m) where F is the capacitance of the capacitor, ε is the relative permittivity, S is the area of the electrodes facing each other across the dielectric, and D is the thickness of the dielectric.
【0009】しかしながら、セラミックコンデンサの誘
電体膜の厚さを薄くするには、誘電体材料の微粒子化お
よびその粒径の均一化や、薄いグリーンシートの作成な
どの点において多くの困難な技術的課題があり、現状で
は誘電体の膜厚を5μm以下とするセラミック積層コン
デンサは量産されていない。However, in order to reduce the thickness of the dielectric film of the ceramic capacitor, there are many difficult technical points in terms of making the dielectric material fine particles and making the particle diameter uniform, and making a thin green sheet. However, at present, there is no mass production of a ceramic multilayer capacitor having a dielectric film thickness of 5 μm or less.
【0010】また、焼成を行なう工程を経るため、内部
電極はその焼成温度(1000℃以上)で酸化しない必
要があり、貴金属を使わざるを得ないため高価になる。Further, since the firing process is performed, the internal electrodes need not be oxidized at the firing temperature (1000 ° C. or higher), and the precious metal is inevitably used, which is expensive.
【0011】これに対して、薄膜コンデンサでは誘電体
の厚みを数μm以下にできるというメリットがあるが、
例えば特開昭60−94716号公報や特開平3−20
0307号公報で提案されているように、誘電体と電極
とを交互に積層し、かつ、相対する電極間の電気的絶縁
を確保するため、誘電体と電極を成膜するごとに、ウエ
ットエッチングやマスキングにより電極の成膜を工夫す
る必要がある。On the other hand, the thin film capacitor has an advantage that the thickness of the dielectric can be set to several μm or less.
For example, JP-A-60-94716 and JP-A-3-20
As proposed in Japanese Patent Publication No. 0307, in order to secure electrical insulation between electrodes and dielectrics which are alternately laminated and electrodes facing each other, wet etching is performed every time a film is formed on the dielectrics and electrodes. It is necessary to devise the film formation of the electrode by masking.
【0012】すなわち、電極を誘電体を挟んで積層する
際、電極取出し端面方向に電極を交互に数百μmずつず
らして、その後の工程で電極取出し端面に外部電極を取
り付ける際に、2つの外部電極同士が導通しないように
する必要がある。That is, when the electrodes are stacked with the dielectric material sandwiched therebetween, the electrodes are alternately displaced by several hundreds of μm in the direction of the electrode extraction end face, and when the external electrodes are attached to the electrode extraction end face in the subsequent step, two external electrodes are attached. It is necessary to prevent conduction between the electrodes.
【0013】しかしながら、ウエットエッチングを行な
うには、その都度スパッタリングや蒸着などの高真空を
破らなければならず、その工程に長時間を要することに
なり好ましくない。However, every time wet etching is performed, a high vacuum such as sputtering or vapor deposition must be broken, which requires a long time, which is not preferable.
【0014】これを回避して高真空中でマスキングを行
なう方法もあるが、これにはマスクを上記のように数百
μm単位の精度で動かすことが要求され、技術的にかな
りの困難が伴う。これらの技術的課題は、コンデンサの
サイズが小さくなるに連れてその困難さが増すことにな
る。There is also a method of avoiding this and performing masking in a high vacuum, but this requires the mask to be moved with an accuracy of several hundreds of μm as described above, which causes considerable technical difficulties. . These technical challenges become more difficult as the size of the capacitors decreases.
【0015】[0015]
【課題を解決するための手段】本発明は上記の積層薄膜
コンデンサが持つ課題を解決するためになされたもの
で、その構成上の特徴は、一方の電極と他方の電極とを
それらの間に誘電体を介在させて交互に積層し、対向す
る異なる側面側に電極取り出し端面を露出させ、その各
々に外部電極を形成してなる積層薄膜コンデンサにおい
て、上記一方の電極の電極取り出し端面側においては上
記他方の電極の端部のみを部分的にエッチングし、上記
他方の電極の電極取り出し端面側においては上記一方の
電極の端部のみを部分的にエッチングし、各電極の電極
取り出し端面が対向する異なる側面側に露出されるよう
にしたことを特徴とする積層薄膜コンデンサの製造方
法。The present invention has been made to solve the problems of the above-mentioned multilayer thin film capacitor, and its structural feature is that one electrode and the other electrode are placed between them. In a laminated thin-film capacitor in which dielectrics are alternately laminated, the electrode lead-out end faces are exposed at different side faces facing each other, and external electrodes are formed on each of them, the electrode lead-out end face side of one of the electrodes is Only the end portion of the other electrode is partially etched, and only the end portion of the one electrode is partially etched on the electrode lead-out end surface side of the other electrode so that the electrode lead-out end surface of each electrode faces each other. A method of manufacturing a multilayer thin film capacitor, characterized in that it is exposed on different side surfaces.
【0016】この場合、上記各電極を異なる導電性材料
から形成し、上記一方の電極の電極取り出し端面側にお
いては上記他方の電極は溶解するが、同一方の電極は溶
解しない第1エッチャントで上記他方の電極の端部をエ
ッチングし、上記他方の電極の電極取り出し端面側にお
いては上記一方の電極は溶解するが、同他方の電極は溶
解しない第2エッチャントで上記一方の電極の端部をエ
ッチングすることが好ましい。In this case, each of the electrodes is formed of a different conductive material, and on the electrode extraction end face side of the one electrode, the other electrode dissolves, but the same electrode does not dissolve. The end portion of the other electrode is etched, and the one electrode is dissolved on the electrode extraction end face side of the other electrode, but the other electrode is not dissolved. The end portion of the one electrode is etched by a second etchant. Preferably.
【0017】ここで、各電極の材質および第1、第2エ
ッチャントの組み合わは種々考えられ、例えば特定の酸
には溶け易いが、別の酸には溶けにくい金属とその酸の
組み合わせから選択されるが、それには次ぎのような組
み合わせを例示することができる。Here, various combinations of the material of each electrode and the first and second etchants are conceivable. For example, it is selected from a combination of a metal that is easily dissolved in a specific acid but is difficult to be dissolved in another acid and the acid. However, the following combinations can be exemplified.
【0018】 一方の電極 (第1エッチャント) 他方の電極 (第2エッチャント) パラジウム (硝酸) 鉄 (塩酸または硫酸) パラジウム (硝酸) 亜鉛 (塩酸または硫酸) パラジウム (硝酸) クロム (塩酸または硫酸) ニッケル (硝酸) アルミニウム(塩酸または硫酸) 銀 (硝酸) 鉄 (塩酸または硫酸) 銀 (硝酸) アルミニウム(塩酸または硫酸) 銀 (硝酸) 亜鉛 (塩酸または硫酸) 銀 (硝酸) クロム (塩酸) 銅 (硝酸) アルミニウム(塩酸または硫酸) モリブデン (硝酸) アルミニウム(塩酸または硫酸) 鉛 (硝酸) アルミニウム(塩酸または硫酸) モリブデン (硝酸) 亜鉛 (塩酸または硫酸) モリブデン (硝酸) クロム (塩酸または硫酸) 鉛 (硝酸) クロム (塩酸または硫酸) なお、上記電極および誘電体は物理的もしくは化学的成
膜法にて形成されるものであることが好ましい。One electrode (first etchant) Other electrode (second etchant) Palladium (nitric acid) Iron (hydrochloric acid or sulfuric acid) Palladium (nitric acid) Zinc (hydrochloric acid or sulfuric acid) Palladium (nitric acid) Chromium (hydrochloric acid or sulfuric acid) Nickel (Nitric acid) Aluminum (hydrochloric acid or sulfuric acid) Silver (nitric acid) Iron (hydrochloric acid or sulfuric acid) Silver (nitric acid) Aluminum (hydrochloric acid or sulfuric acid) Silver (nitric acid) Zinc (hydrochloric acid or sulfuric acid) Silver (nitric acid) Chromium (hydrochloric acid) Copper (nitric acid) ) Aluminum (hydrochloric acid or sulfuric acid) Molybdenum (nitric acid) Aluminum (hydrochloric acid or sulfuric acid) Lead (nitric acid) Aluminum (hydrochloric acid or sulfuric acid) Molybdenum (nitric acid) Zinc (hydrochloric acid or sulfuric acid) Molybdenum (nitric acid) Chromium (hydrochloric acid or sulfuric acid) Lead (nitric acid) ) Chromium (hydrochloric acid or sulfuric acid) It is preferable conductors of which are formed by physical or chemical deposition method.
【0019】[0019]
【作用】上記構成によると、一方の電極は溶かすが他方
の電極は溶かさないエッチャントにて一方の端面側をエ
ッチングすることにより、その端面側には他方の電極の
みが残る。また、一方の電極は溶かさないが他方の電極
は溶かすエッチャントにて他方の端面側をエッチングす
ることにより、その端面側には一方の電極のみが残るた
め、電極の位置ずらしを行なったのと同等の効果が得ら
れ、外部電極を取り付ける際、それらの電気的絶縁が確
保される。According to the above construction, by etching one end face side with an etchant which dissolves one electrode but not the other electrode, only the other electrode remains on the end face side. Also, by etching the other end face side with an etchant that does not melt one electrode but melts the other electrode, only one electrode remains on that end face side, so it is equivalent to shifting the position of the electrode. The effect is obtained, and when the external electrodes are attached, their electrical insulation is secured.
【0020】[0020]
【実施例】以下、本発明の一実施例を添付図面を参照し
ながら説明する。なお、電極と誘電体の積層方法はスク
リーン印刷やグリーンシートの圧着による方法、もしく
は物理的、化学的成膜方法のいずれでも良いが、ここで
はスパッタ法による場合について説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. The method of laminating the electrode and the dielectric may be either a method by screen printing, a pressure bonding of a green sheet, or a physical or chemical film forming method. Here, the case of the sputtering method will be described.
【0021】まず、スパッタターゲットとして所望の誘
電体と異なる2種類の電極とを用意し、シャッターなど
で任意のターゲットから成膜できるようにスパッタ装置
をセットする。First, a desired dielectric and two types of electrodes different from a desired dielectric are prepared as a sputtering target, and the sputtering apparatus is set so that a film can be formed from an arbitrary target with a shutter or the like.
【0022】次に、図1に示されているように、シリコ
ン、ガラス、アルミナ、サファイアなどからなる基板1
を同スパッタ装置の所定部位に配置し、同基板1の温度
を成膜が良好となるような温度に保持する。Next, as shown in FIG. 1, a substrate 1 made of silicon, glass, alumina, sapphire, or the like.
Is placed at a predetermined portion of the sputtering apparatus, and the temperature of the substrate 1 is maintained at a temperature at which film formation is good.
【0023】そして、スパッタ法にてこの基板1上に一
方の電極2を形成するとともに、同電極2上に誘電体3
を同じくスパッタ成膜する。しかる後、同誘電体3上に
他方の電極4をスパッタ成膜し、さらにその上に誘電体
3をスパッタ成膜する(第1の工程)。Then, one electrode 2 is formed on the substrate 1 by the sputtering method, and the dielectric 3 is formed on the electrode 2.
Is also formed by sputtering. Then, the other electrode 4 is sputter-deposited on the same dielectric 3, and the dielectric 3 is further sputter-deposited thereon (first step).
【0024】この第1の工程を繰り返して、誘電体3と
電極2,4とを所望とする数だけ積層することにより、
基板1上に誘電体3と電極2,4の薄膜積層体5を作製
する(第2の工程)。By repeating the first step and laminating the dielectric 3 and the electrodes 2 and 4 in a desired number,
A thin film laminated body 5 of the dielectric 3 and the electrodes 2 and 4 is produced on the substrate 1 (second step).
【0025】このようにして、薄膜積層体5が形成され
た基板1をスパッタ装置から取り外し、所望のサイズに
切断する(第3の工程)。In this way, the substrate 1 on which the thin film laminate 5 is formed is removed from the sputtering apparatus and cut into a desired size (third step).
【0026】図2にはこの切断されたチップ状のコンデ
ンサ素子5aが示されており、これによると、まず第1
のエッチング槽6内において他方の電極4の端部がエッ
チングされる。FIG. 2 shows this cut chip-shaped capacitor element 5a.
The end portion of the other electrode 4 is etched in the etching tank 6 of FIG.
【0027】すなわち、このエッチング槽6内には他方
の電極4は溶かすが、一方の電極2は溶かさないエッチ
ャント6aが貯留されており、コンデンサ素子5aの一
方の側面側を同エッチャント6aに浸漬して、電極4の
みをわずかにエッチングする(第4の工程)。That is, an etchant 6a in which the other electrode 4 is melted but the one electrode 2 is not melted is stored in the etching bath 6, and one side surface side of the capacitor element 5a is dipped in the etchant 6a. Then, only the electrode 4 is slightly etched (fourth step).
【0028】次に、図3に示されているように、コンデ
ンサ素子5aを逆様にして上記とは反対側の側面を第2
のエッチング槽7内に浸漬する。このエッチング槽7内
には、上記とは反対に一方の電極2は溶かすが、他方の
電極4は溶かさないエッチャント7aが貯留されてお
り、これにより電極2のみがわずかにエッチングされる
(第5の工程)。Next, as shown in FIG. 3, the capacitor element 5a is reversed so that the side surface opposite to the above is the second side surface.
It is immersed in the etching tank 7 of FIG. Contrary to the above, an etchant 7a that melts one electrode 2 but does not melt the other electrode 4 is stored in the etching tank 7, whereby only the electrode 2 is slightly etched (fifth). Process).
【0029】このようにして、コンデンサ素子5aの一
方の側面側には一方の電極2の電極取り出し端面が露出
され、同コンデンサ素子5aの他方の側面側には他方の
電極4の電極取り出し端面が露出されることになり、図
4に示されているように、各側面部においてその露出部
分を覆うように外部電極8,9を形成する(第6の工
程)。この場合、同外部電極8,9は通常の塗布焼き付
け法によっても良いが、スパッタや蒸着にて形成しても
良い。In this way, the electrode lead-out end face of one electrode 2 is exposed on one side face side of the capacitor element 5a, and the electrode lead-out end face of the other electrode 4 is exposed on the other side face side of the same capacitor element 5a. As exposed, the external electrodes 8 and 9 are formed so as to cover the exposed portions on each side surface, as shown in FIG. 4 (sixth step). In this case, the external electrodes 8 and 9 may be formed by a normal coating and baking method, or may be formed by sputtering or vapor deposition.
【0030】《実施例1》30cm角、厚さ2mmのガ
ラス板を基板として用いた。成膜方法はAr雰囲気中で
の高周波スパッタ法とした。誘電材料は(Ba0.5S
r0.5)TiO3、内部電極材料にはNiとAlをそ
れぞれターゲットとして用いた。なお、基板は500℃
に加熱した。Example 1 A glass plate 30 cm square and 2 mm thick was used as a substrate. The film forming method was a high frequency sputtering method in an Ar atmosphere. Dielectric material is (Ba 0.5 S
r 0.5 ) TiO 3 , and Ni and Al were used as targets for the internal electrode materials. The substrate is 500 ° C
Heated to.
【0031】図示しないスパッタ装置のホルダーに上記
のガラス基板を取り付け、まず、Niをターゲットとし
てスパッタを行ない、Ni電極を約100nmの厚さに
成膜した。The above glass substrate was attached to a holder of a sputtering device (not shown), and sputtering was performed with Ni as a target to form a Ni electrode with a thickness of about 100 nm.
【0032】次に、誘電体として(Ba0.5Sr
0.5)TiO3を約200nmの厚さに成膜するとと
もに、その上にAl電極を約100nmの厚さに成膜し
た。そして、再び(Ba0.5Sr0.5)TiO3を
約200nmの厚さに成膜した。Next, as a dielectric (Ba 0.5 Sr
0.5 ) TiO 3 was deposited to a thickness of about 200 nm, and an Al electrode was deposited thereon to a thickness of about 100 nm. Then, again (Ba 0.5 Sr 0.5 ) TiO 3 was formed into a film with a thickness of about 200 nm.
【0033】上記の工程を再度繰り返し、電極に挟まれ
た3層の誘電体層を有する薄膜積層体を作製した。な
お、最上層の誘電体層は内部電極が剥きだしにならない
ようにするための保護膜としてのものである。The above steps were repeated again to produce a thin film laminate having three dielectric layers sandwiched between electrodes. The uppermost dielectric layer is provided as a protective film for preventing the internal electrodes from being exposed.
【0034】上記のようにして成膜した基板をスパッタ
装置から取り出し、4.5mm×3.2mm角のチップ
を約3800個切り出した。The substrate on which the film had been formed as described above was taken out from the sputtering apparatus, and about 3,800 4.5 mm × 3.2 mm square chips were cut out.
【0035】そして、そのチップの一方の側面側を塩酸
に浸漬してAl電極の端部を溶かした後洗浄した。次
に、同チップの他方の側面側を硝酸に浸漬し、Ni電極
の端部を溶かした後洗浄した。Then, one side surface of the chip was immersed in hydrochloric acid to melt the end portion of the Al electrode and then washed. Next, the other side surface side of the chip was immersed in nitric acid to melt the end portion of the Ni electrode and then washed.
【0036】しかる後、そのAl電極およびNi電極が
露出されているチップの各側面に公知の方法にて外部電
極を形成して、その静電容量を測定したところ1μFで
あった。After that, an external electrode was formed on each side surface of the chip where the Al electrode and the Ni electrode were exposed by a known method, and the capacitance was measured and found to be 1 μF.
【0037】[0037]
【発明の効果】以上説明したように、本発明によれば、
チップ型積層薄膜コンデンサの電極取り出し端面に一方
の電極のみを露出させるにあたって、従来のようにマス
クを数百μm単位の精度でその位置を制御する必要がな
く、高真空中で連続的に成膜することができるととも
に、工程の簡略化が図れる。As described above, according to the present invention,
When exposing only one electrode to the electrode extraction end face of the chip type multilayer thin film capacitor, it is not necessary to control the position of the mask with an accuracy of several hundreds of μm as in the conventional case, and the film is continuously formed in a high vacuum. In addition to the above, the process can be simplified.
【図1】本発明に係る積層薄膜コンデンサの中間製品と
しての薄膜積層体を示した断面図。FIG. 1 is a sectional view showing a thin film laminated body as an intermediate product of a laminated thin film capacitor according to the present invention.
【図2】一方の電極の端部をエッチングする状態を説明
するための模式図。FIG. 2 is a schematic diagram for explaining a state in which an end portion of one electrode is etched.
【図3】他方の電極の端部をエッチングする状態を説明
するための模式図。FIG. 3 is a schematic diagram for explaining a state in which the end portion of the other electrode is etched.
【図4】外部電極が取り付けられた最終製品としての積
層薄膜コンデンサを示した断面図。FIG. 4 is a sectional view showing a laminated thin film capacitor as a final product to which external electrodes are attached.
1 基板 2,4 電極 3 誘電体 6a,7a エッチャント 8,9 外部電極 1 substrate 2, 4 electrode 3 dielectric 6a, 7a etchant 8, 9 external electrode
Claims (3)
に誘電体を介在させて交互に積層し、対向する異なる側
面側に電極取り出し端面を露出させ、その各々に外部電
極を形成してなる積層薄膜コンデンサにおいて、上記一
方の電極の電極取り出し端面側においては上記他方の電
極の端部のみを部分的にエッチングし、上記他方の電極
の電極取り出し端面側においては上記一方の電極の端部
のみを部分的にエッチングし、各電極の電極取り出し端
面が対向する異なる側面側に露出されるようにしたこと
を特徴とする積層薄膜コンデンサの製造方法。1. One electrode and the other electrode are alternately laminated with a dielectric interposed between them, the electrode lead-out end faces are exposed on different side faces facing each other, and external electrodes are formed on each of them. In the multilayer thin film capacitor consisting of the above, only one end of the other electrode is partially etched on the electrode extraction end face side of the one electrode, and the one electrode end is formed on the electrode extraction end face side of the other electrode. A method of manufacturing a multilayer thin film capacitor, wherein only the portions are partially etched so that the electrode extraction end faces of the respective electrodes are exposed on different side faces facing each other.
り、上記一方の電極の電極取り出し端面側においては上
記他方の電極は溶解するが、同一方の電極は溶解しない
第1エッチャントで上記他方の電極の端部をエッチング
し、上記他方の電極の電極取り出し端面側においては上
記一方の電極は溶解するが、同他方の電極は溶解しない
第2エッチャントで上記一方の電極の端部をエッチング
することを特徴とする請求項1に記載の積層薄膜コンデ
ンサの製造方法。2. Each of the electrodes is made of a different conductive material, and on the electrode extraction end face side of the one electrode, the other electrode dissolves but the same electrode does not dissolve. Etching the end of the electrode and etching the end of the one electrode with a second etchant that dissolves the one electrode but does not dissolve the other electrode on the electrode extraction end face side of the other electrode. The method of manufacturing a multilayer thin film capacitor according to claim 1.
化学的成膜法にて形成されることを特徴とする請求項1
または2に記載の積層薄膜コンデンサの製造方法。3. The electrode and the dielectric are formed by a physical or chemical film forming method.
Alternatively, the method of manufacturing the multilayer thin film capacitor described in 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5312495A JPH07142288A (en) | 1993-11-18 | 1993-11-18 | Method of manufacturing multilayer thin film capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5312495A JPH07142288A (en) | 1993-11-18 | 1993-11-18 | Method of manufacturing multilayer thin film capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07142288A true JPH07142288A (en) | 1995-06-02 |
Family
ID=18029909
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5312495A Withdrawn JPH07142288A (en) | 1993-11-18 | 1993-11-18 | Method of manufacturing multilayer thin film capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07142288A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997044797A1 (en) * | 1996-05-21 | 1997-11-27 | Siemens Aktiengesellschaft | Thin-film multilayer condenser |
-
1993
- 1993-11-18 JP JP5312495A patent/JPH07142288A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997044797A1 (en) * | 1996-05-21 | 1997-11-27 | Siemens Aktiengesellschaft | Thin-film multilayer condenser |
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