JPH07118908B2 - Switching power supply circuit - Google Patents
Switching power supply circuitInfo
- Publication number
- JPH07118908B2 JPH07118908B2 JP17855689A JP17855689A JPH07118908B2 JP H07118908 B2 JPH07118908 B2 JP H07118908B2 JP 17855689 A JP17855689 A JP 17855689A JP 17855689 A JP17855689 A JP 17855689A JP H07118908 B2 JPH07118908 B2 JP H07118908B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power supply
- switching power
- supply circuit
- oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 description 3
- 210000004899 c-terminal region Anatomy 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、スイッチング電源回路に関し、特に、例え
ば、＋5Vから±12Vを作るインタフェースIC用のスイッ
チング電源回路に関する。The present invention relates to a switching power supply circuit, and more particularly to a switching power supply circuit for an interface IC that produces +5 V to ± 12 V, for example.
従来、この種のスイッチング電源回路は、負荷が限定さ
れていることから、スイッチング電源回路を簡素化する
為、発振器の動作デューティを固定とし、負荷電力に合
わせた設計を行うことにより安定した出力電圧を供給す
ることができる。Conventionally, this type of switching power supply circuit has a limited load, so in order to simplify the switching power supply circuit, the operating duty of the oscillator is fixed and a stable output voltage is obtained by designing according to the load power. Can be supplied.
上述した従来のスイッチング電源回路は、動作デューテ
ィを固定としている為、軽負荷では出力電圧が昇圧する
ので、負荷回路を破壊するおそれがあり、汎用性がな
く、負荷に対応した専用設計が必要であり、又、変動範
囲の大きい負荷回路に対しては使用できないという欠点
がある。Since the above-mentioned conventional switching power supply circuit has a fixed operation duty, the output voltage is boosted at a light load, so the load circuit may be destroyed, it is not versatile, and a dedicated design corresponding to the load is required. However, there is a drawback that it cannot be used for a load circuit having a large variation range.
〔問題点を解決するための手段〕 本発明のスイッチング電源回路は、電池を共通の入力電
源とし前記電池の一側を基準電位として入力電圧の供給
を受ける昇圧形チョッパ・コンバータと反転形チョッパ
・コンバータとを同一の発振器で駆動する正負２出力を
出力するスイッチング電源回路において、前記昇圧形チ
ョッパ・コンバータの出力に抵抗とツェナーダイオード
との直列回路にPNPトランジスタのエミッターを接続
し、前記PNPトランジスタのコレクターを前記発振器の
時定数回路に接続し、前記PNPトランジスタのベースを
前記電池の十側に接続して成っている。[Means for Solving Problems] A switching power supply circuit according to the present invention is a step-up chopper converter and an inverting chopper that receive a supply of an input voltage with a battery as a common input power source and one side of the battery as a reference potential. In a switching power supply circuit that outputs two positive and negative outputs that drive a converter with the same oscillator, an emitter of a PNP transistor is connected to a series circuit of a resistor and a Zener diode at the output of the booster chopper converter, and the output of the PNP transistor is connected. The collector is connected to the time constant circuit of the oscillator, and the base of the PNP transistor is connected to the ten side of the battery.
次に、本発明の実施例について図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.
第１図において、本実施例は電池（以下Ｅと記す）４の
一側を基準電位としてE4から入力電圧の供給を受ける反
転形回路１及び昇圧形回路２と、発振器３と、昇圧形回
路１の出力に抵抗（以下Ｒと記す）21,ツェナーダイオ
ード（以下ZDと記す）22の直列回路にエミッターが接続
しコレクターを発振器３の時定数回路R24,コンデンサー
（以下Ｃと記す）25の接続点に接続しベースをE4の＋側
とR24の他端に接続するPNPトランジスタ（以下TRと記
す）23とを有して構成している。In FIG. 1, the present embodiment shows an inverting circuit 1 and a boosting circuit 2 which are supplied with an input voltage from E4 with one side of a battery (hereinafter referred to as E) 4 as a reference potential, an oscillator 3, and a boosting circuit. The output of 1 is connected to a series circuit of a resistor (hereinafter R) 21 and a Zener diode (ZD) 22 with an emitter connected to the collector of a time constant circuit R24 of an oscillator 3 and a capacitor (hereinafter C) 25. It has a PNP transistor (hereinafter referred to as TR) 23 connected to the point and having its base connected to the + side of E4 and the other end of R24.
尚、発振器３はモノスティブルマルチバイブレータ（以
下MMと記す）26,27とを有し、MM26のＣ端子にC25を、Ｒ
端子にR24を接続しRESET端子にE4の＋側と接続し、同様
にMM27のＣ端子にC28を,R端子にR29を接続しRESET端子
にE4の＋側と接続し、C25,R24及びC28,R29はそれぞれMM
26及びMM27の発振デューティを決定する時定数回路であ
る。又、MM26のＡ端子とMM27のＡ端子とを接続し、MM26
のＡ端子はE4の一側に接続し、MM26のＢ端子とMM27の
端子とを接続し、MM27のＢ端子とMM26端子とを接続し
ている。The oscillator 3 has a monostable multivibrator (hereinafter referred to as MM) 26 and 27, and C25 is connected to the C terminal of MM26 and R
Connect R24 to the terminal, connect the RESET terminal to the + side of E4, similarly connect C28 to the C terminal of MM27, connect R29 to the R terminal and connect the RESET terminal to the + side of E4, and connect C25, R24 and C28. , R29 are MM
It is a time constant circuit that determines the oscillation duty of 26 and MM27. Also, by connecting the A terminal of MM26 and the A terminal of MM27,
The A terminal is connected to one side of E4, the B terminal of MM26 and the terminal of MM27 are connected, and the B terminal of MM27 and the MM26 terminal are connected.
反転形回路１はエミッターがE4の＋側に接続しベースが
R6を介してエミッターに接続し又R7を介してMM26の端
子と接続しコレクターがコイル（以下Ｌと記す）８を介
してE4の一側（基準電位）と接続するTR5と、出力端子
間に接続するC10と、L8とC10間に接するダイオード（以
下Ｄと記す）９とを有して構成し、出力端子間には負荷
抵抗（以下RLと記す）11が接続されている。In the inverting circuit 1, the emitter is connected to the + side of E4 and the base is
Between TR5, which is connected to the emitter via R6, which is connected to the terminal of MM26 via R7, and whose collector is connected to one side of E4 (reference potential) via the coil (hereinafter referred to as L) 8 and the output terminal It is configured by including a connected C10 and a diode (hereinafter referred to as D) 9 that is in contact with L8 and C10, and a load resistance (hereinafter referred to as R L ) 11 is connected between output terminals.
昇圧形回路２はE4の＋側から入力電圧をD12を介して受
け、E4の基準電位とD12間に接続されたC13と、エミッタ
ーが基準電位に接続しコレクターがL14を介してD12とC1
3との接続点に接続しベースがR16を介して基準電位に接
続し又R15を介してMM26のＱ端子と接続するTR17と、出
力端子間に接続するC19と、C19の一端とTR17のコレクタ
間に接続するD18とを有して構成し、出力端子間にはRL2
0が接続されている。The booster circuit 2 receives the input voltage from the + side of E4 via D12, C13 connected between the reference potential of E4 and D12, and the emitter connected to the reference potential and the collector connected via L14 to D12 and C1.
TR17 connected to the connection point with 3, the base connected to the reference potential via R16, and also connected to the Q terminal of MM26 via R15, C19 connected between the output terminals, one end of C19 and the collector of TR17. It is configured with a D18 connected between the output terminals and R L 2 between the output terminals.
0 is connected.
次に、本実施例の動作について説明する。Next, the operation of this embodiment will be described.
今、E4からD12を介してL14に連続電流が流れる負荷範囲
では発振器３のC25,R24,C28,R29の時定で決まる動作デ
ューティで安定した出力電圧を供給するが、RL20が軽負
荷になった場合に、昇圧形回路２は安定範囲を外れて出
力電圧が上昇する。この場合、出力電圧がZD22のツェナ
ー電圧を越えるとZD22に電流が流れ、TR23のコレクター
を通してC25に電流を供給してMM26のパルス巾が減少
し、発振器３の動作デューティを小さくするため、昇圧
形回路２の出力電圧の上昇はZD22のツェナー電圧でクラ
ンプされる。Now, in the load range where a continuous current flows from E4 to D12 to L14, a stable output voltage is supplied with the operating duty determined by the time constant of C25, R24, C28, and R29 of oscillator 3, but R L 20 is a light load. Then, the booster circuit 2 goes out of the stable range and the output voltage rises. In this case, when the output voltage exceeds the Zener voltage of ZD22, a current flows through ZD22, and a current is supplied to C25 through the collector of TR23, the pulse width of MM26 is reduced, and the operating duty of oscillator 3 is reduced. The rise in the output voltage of the circuit 2 is clamped by the Zener voltage of ZD22.
今、昇圧形回路２の入力電圧をVin，出力電圧をVout2,M
M26のデューティ比をｄとすると、 で表わされ、ｄの小さくなることで、即ちMM26のパルス
巾が狭くなることで、出力電圧Vout2は減圧される。Now, the input voltage of the booster circuit 2 is V in , and the output voltage is V out2 , M
If the duty ratio of M26 is d, The output voltage V out2 is reduced by decreasing d, that is, by narrowing the pulse width of the MM26.
尚、反転形回路１の出力電圧をVout1とすると、 として表わされる。If the output voltage of the inverting circuit 1 is V out1 , Is represented as
以上説明したように本発明は、負荷抵抗が大きくなり過
電圧が生じた場合、昇圧形チョッパ・コンバータの出力
端子から、抵抗，ツェナーダイオードを介して発振器の
時定数回路のコンデンサ，抵抗に電流を流して、発振器
のデューティを小さくすることにより、過電圧を抑える
ので、小数の素子の追加によって変動範囲の大きい負荷
回路に対して安定した出力電圧を供給できる効果があ
る。As described above, according to the present invention, when the load resistance increases and an overvoltage occurs, a current is caused to flow from the output terminal of the step-up chopper converter to the capacitor and the resistor of the oscillator time constant circuit through the resistor and the Zener diode. By reducing the duty of the oscillator, the overvoltage is suppressed. Therefore, the addition of a small number of elements has the effect of being able to supply a stable output voltage to a load circuit having a large fluctuation range.
第１図は本発明の一実施例を示す回路図である。 １……反転形回路、２……昇圧形回路、３……発振器、
４……電池（Ｅ）、5,17,23……トランジスタ（TR）、
6,7,15,16,21,24,29……抵抗（Ｒ）、8,14……コイル
（Ｌ）、9,12,18……ダイオード（Ｄ）、10,13,19,25,2
8……コンデンサC,11,20……負荷抵抗（RL）、22……ツ
ェナーダイオード（ZD）、26,27……モノスティブルマ
ルチバイブレータ（MM）。FIG. 1 is a circuit diagram showing an embodiment of the present invention. 1 ... Inverting circuit, 2 ... Boosting circuit, 3 ... Oscillator,
4 …… Battery (E), 5,17,23 …… Transistor (TR),
6,7,15,16,21,24,29 …… Resistance (R), 8,14 …… Coil (L), 9,12,18 …… Diode (D), 10,13,19,25, 2
8 …… Capacitor C, 11,20 …… Load resistance (R L ), 22 …… Zener diode (ZD), 26,27 …… Monostable multivibrator (MM).
Claims (1)
を基準電位として入力電圧の供給を受ける昇圧形チョッ
パ・コンバータと反転形チョッパ・コンバータとを同一
の発振器で駆動する正負２出力を出力するスイッチング
電源回路において、前記昇圧形チョッパ・コンバータの
出力に抵抗とツェナーダイオードとの直列回路にPNPト
ランジスタのエミッターを接続し、前記PNPトランジス
タのコレクターを前記発振器の時定数回路に接続し、前
記PNPトランジスタのベースを前記電池の十側に接続し
て成る正負２出力を出力するスイッチング電源回路1. Positive and negative two outputs for driving a boosting chopper converter and an inverting chopper converter, which are supplied with an input voltage with one side of the batteries as a reference potential, with a battery as a common input power source, by the same oscillator. In the output switching power supply circuit, the output of the step-up chopper converter is connected to a series circuit of a resistor and a Zener diode, the emitter of a PNP transistor is connected, and the collector of the PNP transistor is connected to the time constant circuit of the oscillator. Switching power supply circuit which outputs two positive and negative outputs by connecting the base of a PNP transistor to the ten side of the battery
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17855689A JPH07118908B2 (en) | 1989-07-10 | 1989-07-10 | Switching power supply circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17855689A JPH07118908B2 (en) | 1989-07-10 | 1989-07-10 | Switching power supply circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0345160A JPH0345160A (en) | 1991-02-26 |
| JPH07118908B2 true JPH07118908B2 (en) | 1995-12-18 |
Family
ID=16050552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17855689A Expired - Lifetime JPH07118908B2 (en) | 1989-07-10 | 1989-07-10 | Switching power supply circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07118908B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| ITMO20050081A1 (en) * | 2005-04-08 | 2006-10-09 | Meta System Spa | CICUITE FOR THE GENERATION OF TWO SYMMETRIC VOLTAGE BUSES IN RESPECT OF THE NEGATIVE OF THE SUPPLY VOLTAGE. |
-
1989
- 1989-07-10 JP JP17855689A patent/JPH07118908B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0345160A (en) | 1991-02-26 |
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