JPH07106578A - Thin film transistor and manufacturing method thereof - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to provide a thin film transistor that can be applied to a wide substrate, can be applied to a self-aligned TFT, and can be manufactured at low cost. [Structure] A thin film transistor 1 (TFT) is formed on a transparent insulating substrate 2. The TFT is a semiconductor having a gate electrode 4 arranged on a substrate, a source region 3, a drain region 7 and a channel region 5 arranged on the upper surface side of the gate electrode with an insulating layer 6 interposed therebetween. Layer 8 and channel stopper layer 10 arranged to mask the channel region
And a dopant layer 16 is provided in contact with the source, drain and channel regions, and the source region and the drain region are selectively irradiated with radiation from the upper surface or the lower surface side of the TFT. When heated, the dopant is diffused from the dopant layer to each region. When the diffusion is complete, the dopant layer is removed and the source and drain electrodes 12, 14 are deposited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (hereinafter referred to as TFT) used as a switching element of, for example, an active matrix type liquid crystal display.

[0002]

2. Description of the Related Art As a display element using a liquid crystal, a large-capacity, high-density active matrix type liquid crystal display intended for a television display or a graphic display has been actively developed and put into practical use. With such an indicator,
Semiconductor switches are used as means for driving and controlling each pixel so that high-contrast display without crosstalk can be performed. As the semiconductor switch, a TFT formed on a transparent insulating substrate is usually used for the reason that a transmissive display is possible and the area can be easily increased.

This TFT is provided with a gate electrode formed of a metal alloy or a simple metal, a gate insulating layer provided so as to cover the gate electrode, and an upper surface of the gate insulating layer. A semiconductor layer having a source region, a drain region, and a channel region, a channel stopper layer provided only on the channel region on the upper surface of the semiconductor layer, and on the source region and the drain region. Each provided source
And a drain electrode, for example, has an inverted staggered structure.

When driving such a TFT to drive a liquid crystal display, first, a voltage Vds is applied between the source electrode and the drain electrode. When the voltage Vds is applied, a minute current (leak current) Ids flows in the semiconductor layer located between both electrodes. In this state (OFF state), when the gate voltage Vg is applied to the gate electrode according to the image signal of the liquid crystal display, charges are attracted to the channel region of the semiconductor layer (ON state) and the current resistance is reduced. As a result, the current Ids is increased and the TFT switch is turned on. The liquid crystal display is driven by controlling ON / OFF of each TFT according to the image signal of the liquid crystal display.

The TFT has an N-channel type TFT in which electrons are attracted to the channel region by applying a positive voltage to the gate electrode and a channel by applying a negative voltage to the gate electrode. There is a P-channel type TFT in which holes are attracted to the region. Also, each type of TF
The source and drain regions of T are doped to reduce their own resistivity. N channel type T
The source and drain regions of the FT are N-type doped by implanting a dopant such as phosphorus, arsenic, or antimony, and the source and drain regions of the P-channel TFT are boron-doped. It is p-typed by driving a dopant such as. The implantation of the dopant is usually performed before the vapor deposition of the source electrode and the drain electrode.

By doping the source region and the drain region in this manner, the specific resistance of each region is reduced and an ohmic junction is formed for the source electrode and the drain electrode. By doping each region, the photosensitivity of the TFT is reduced and the leak current is reduced.

Generally, the source and drain region doping methods include ion implantation and ion doping. Ion implantation is well known in the semiconductor manufacturing art. In this technique, a dopant that is ionized and ejected from an ion source passes through a mass separation analyzer. The dopant passing through the mass-separated analyzer is accelerated to high energy by removing unwanted types of ions by the electric field of the magnet. The high energy ion beam passes through vertical and horizontal scanners and is driven into the semiconductor. As described above, the method of implanting a small-diameter ion beam into a semiconductor layer while scanning it has a long doping time, and can be applied to a relatively large substrate such as a display screen used in various display devices. Is not suitable for.

Ion doping is similar to ion implantation, but since mass spectrometry and scanning as in ion implantation are not performed, the doping time is short and comparison is made. Suitable for doping large substrates. However, since the mass separation is not performed, there is a problem that an undesired type of ions is implanted into the semiconductor layer.

[0009]

As described above, in the conventional doping method, the ionized dopant is implanted into the semiconductor layer during the doping, so that the semiconductor surface is damaged. At the same time, the crystallinity of the semiconductor layer is disturbed, and it is necessary to further perform heat treatment such as annealing. In addition, the devices used for these ion implantation methods are expensive, which causes a problem of increased manufacturing cost.

As another doping method, a vapor-deposited microcrystalline silicon layer is vapor-deposited between the source electrode and the drain electrode and the source region and the drain region. A method of forming an ohmic junction with a region is known. However, this method has a problem that it cannot be applied to the manufacture of a self-aligned TFT.

The present invention has been made in view of the above points, and an object thereof is to be applied to a substrate having a relatively wide area such as a liquid crystal display, applicable to the manufacture of a self-aligned TFT, and expensive. It is to provide a thin film transistor that does not require a manufacturing apparatus.

[0012]

According to the present invention, there is provided a semiconductor layer having a source region, a drain region and a channel region, and a gate electrode provided on one side of the semiconductor layer.
A channel stopper layer provided on the channel region on the other surface side of the semiconductor layer, and a source electrode and a drain electrode provided in contact with the source region and the drain region, respectively, The source region and the drain region include a dopant, and a dopant layer that is removed before forming the source electrode and the drain electrode is provided on the other surface of the semiconductor layer and the channel stopper layer. And irradiating the semiconductor layer with radiation from the other surface side of the semiconductor layer with the channel stopper layer blocking the irradiation of the radiation to the channel region to select the source region and the drain region. The present invention provides a thin film transistor, characterized in that it contains the dopant diffused from the dopant layer by heating selectively.

According to the present invention, a semiconductor layer having a source region, a drain region, and a channel region, a gate electrode provided on one side of the semiconductor layer, and another side of the semiconductor layer are provided. A channel stopper layer provided on the channel region, and a source electrode and a drain electrode provided in contact with the source region and the drain region, respectively. Is
Exposing the semiconductor layer to a gas phase that includes a dopant and is removed before forming the source and drain electrodes;
Radiation is applied to the semiconductor layer from the other surface side of the semiconductor layer while the radiation of the channel region is blocked by the channel stopper layer to selectively heat the source region and the drain region. Thus, the present invention provides a thin film transistor characterized by containing the dopant diffused from the gas phase.

Further, according to the present invention, a step of forming a semiconductor layer having a source region, a drain region and a channel region, a step of forming a gate electrode on one side of the semiconductor layer, Forming a channel stopper layer on the other surface of the semiconductor layer to cover the channel region; and forming a dopant layer including a dopant on the other surface of the semiconductor layer and on the channel stopper layer. And the step of selectively irradiating the semiconductor region with radiation from the other surface side of the semiconductor layer with the channel stopper layer blocking the irradiation of radiation to the channel region. The step of diffusing the dopant from the dopant layer to the source region and the drain region by heating the dopant, and after diffusing the dopant, And a step of forming a source electrode and a drain electrode respectively in contact with the source region and the drain region after the dopant layer is removed. A method of manufacturing the same is provided.

Further, according to the present invention, a step of forming a semiconductor layer having a source region, a drain region and a channel region, a step of forming a gate electrode on one side of the semiconductor layer, Forming a channel stopper layer covering the channel region on the other surface of the semiconductor layer; exposing the other surface of the semiconductor layer and the upper surface of the channel stopper layer to a gas phase containing dopant. Radiation is applied to the semiconductor layer from the other surface side of the semiconductor layer while the radiation of the channel region is blocked by the channel stopper layer to selectively heat the source region and the drain region. Thereby diffusing the dopant from the vapor phase into the source region and the drain region, removing the vapor phase after diffusing the dopant, and the vapor phase After being removed, the source - source region and source contacts to the drain region - a method of manufacturing the thin film transistor for forming a source electrode and a drain electrode, comprising the is provided.

[0016]

According to the thin film transistor of the present invention, a dopant containing a desired dopant is formed on the source region and the drain region of the semiconductor layer before depositing the source electrode and the drain electrode.
Evaporate the punt layer. Then, the semiconductor layer is irradiated with radiation from the other surface side of the TFT to selectively heat the source region and the drain region. That is, the radiation incident on the channel region of the semiconductor layer is blocked by the channel stopper layer, and the radiation is applied only to the source drain region. Then, the dopant particles are diffused from the dopant layer into the heated source region and the drain region, and the source region and the drain region are selectively doped. When the diffusion is completed, the dopant layer is removed and the source electrode and the drain electrode are deposited on the source region and the drain region, respectively.

Further, according to the thin film transistor of the present invention, the dopant layer deposited as the diffusion source may be in a gas phase containing dopant particles. In other words, the TFT before the source electrode and the drain electrode are vapor-deposited
The pant fine particles or the mist-like compound containing the fine pant fine particles are exposed to the atmosphere, and the source region and the drain region are selectively heated by irradiating with radiation from the other surface side of the TFT. Each region is doped by diffusing dopant fine particles into the source region and the drain region which are heated to a high temperature from the containing atmosphere.

Thus, by using the channel stopper layer as a mask for the channel region, the source and drain regions can be selectively doped. Therefore, there is provided a thin film transistor which can be applied to a self-aligned TFT without requiring an expensive device at the time of doping.

[0019]

Embodiments of the present invention will now be described in detail with reference to the drawings. As shown in FIG. 1, the thin film transistor 1 (hereinafter referred to as TFT1) of the present invention is
For example, it is used as a switching element of an active matrix type liquid crystal display. The TFT 1 is a transparent insulating substrate 2 in consideration of the transmission characteristics of the backlight of the liquid crystal display.
Formed on.

The TFT 1 is arranged so as to cover the gate electrode 4 and the gate electrode 4 having a layer thickness of about 2000 to 3000 angstroms which is arranged on the transparent insulating substrate 2 having a layer thickness of about 1 mm. A gate insulating layer 6 having a layer thickness of about 3500 to 4000 angstroms, a source region 3 and a channel region 5, which are arranged on the upper surface of the gate insulating layer 6.
And a drain region 7, and a semiconductor layer 8 having a layer thickness of about 500 Å, a channel stopper layer 10 arranged on the upper surface of the semiconductor layer 8 at a position where the channel region 5 is masked, and a semiconductor layer 8 A source electrode 12 and a drain electrode 14, which are arranged in contact with the source region 3 and the drain region 7, respectively, and have, for example, an inverted staggered structure.

The drain electrode 14 of each TFT 1 is integrally formed with a signal electrode of a liquid crystal display (not shown), the gate electrode 4 is integrally formed with a scanning electrode of the liquid crystal display, and the source electrode 12 is a liquid crystal display. Connected to the pixel electrode of the container.

When the liquid crystal display is driven by using the TFT 1 thus constructed, first, the voltage Vds is applied from the signal electrode of the liquid crystal display to the drain electrode 14. When the voltage Vds is applied, a minute current (leak current) Ids flows in the semiconductor layer 8 located between the source electrode 12 and the drain electrode 14. In this state (OFF state), when the gate voltage Vg according to the image signal is applied to the gate electrode 4,
Electric charges are attracted to the channel region 5 of the semiconductor layer 8 facing the gate electrode 4, the current resistance is reduced, and the current Ids is increased (ON state). Therefore, the TFT 1 is turned on when the gate voltage Vg is applied to the gate electrode 4, and is turned off when the gate voltage Vg is not applied, and the corresponding pixels are in the display state. Or it is hidden. A TFT of a type in which electrons are attracted into the channel region 5 by applying a positive gate voltage to the gate electrode is an N-channel TFT, and a negative voltage is applied to the gate electrode. A type of TFT in which holes are attracted into the channel region 5 is a P-channel type TFT.

The source region 3 and the drain region 7 of the semiconductor layer 8 serve to reduce the specific resistance of the source region 3 and the drain region 7.
Doped to achieve a good ohmic contact with the contacting electrodes 12, 14. Hereinafter, a method of diffusing and doping a desired dopant into the source and drain regions 3 and 7 will be described.

As shown in FIGS. 2 and 3, when the source and drain regions 3 and 7 are doped, the TF shown in FIG.
Before depositing the source electrode 12 and the drain electrode 14 of T1, a dopant layer 16 is deposited so as to cover the source region 3, the drain region 7 and the channel stopper layer 10.
Sputtering or chemical vapor deposition. The dopant layer 16 contains a desired dopant that is doped in the source region and the drain region. For example, when manufacturing an N-channel TFT, the dopant layer 16 contains an N-type dopant such as phosphorus, arsenic, or antimony, and when manufacturing a P-channel TFT, a dopant such as boron. Includes P-type dopant.

When the dopant layer 16 is vapor-deposited in contact with the source / drain regions 3 and 7, radiation, for example, a laser is irradiated from the upper surface side and / or the lower surface side of the TFT 1, and the source layer is exposed. The drain and drain regions 3 and 7 are selectively heated to raise the temperature. That is, when the radiation is applied from the upper surface side of the TFT 1, the channel stopper layer 10 blocks the radiation incident on the channel region 5 and the channel region 5
To mask. As a result, the source region 3, the drain region 7, and the channel stopper layer 10 are heated, and the dopant is diffused from the source layer 16 to the source region 3, the drain region 7, and the channel stopper layer 10. The source and drain regions 3 and 7 except the channel region 5 are diffused and selectively doped. When the radiation is applied from the lower surface side of the TFT 1, the radiation passes through the transparent insulating substrate 2 and is applied to the semiconductor layer 8. In this case, the gate electrode 4 blocks the radiation incident on the channel region 5 and masks the channel region 5. As a result, the source and drain regions 3,
7 is irradiated with radiation to be selectively heated, and the dopant is diffused from the dopant layer 16 to the source and drain regions 3 and 7, and the source and drain regions except the channel region 5 and the drain region 3, 7 is selectively doped. Therefore, the source and drain regions 3 and 7 can be selectively doped by radiating radiation from the upper surface and / or the lower surface side of the TFT. When the semiconductor layer 8 is formed of amorphous silicon, the source and drain regions 3 and 7 irradiated with radiation are crystallized. As a result of such crystallization or doping, the conductivity of the source and drain regions 3, 7 is increased.

As the above-mentioned radiation, either broad-band beam radiation or narrow-band beam radiation is used, and when broad-band beam radiation is used, it is possible to irradiate the entire display simultaneously. However, with narrow band beam radiation, the beam must be scanned across the display. Broadband beam radiation includes, for example, lamp radiation, and narrow band beam radiation includes, for example, radiation.
There is radiation. For example, the lamp radiation is 2 to 1 cycle.
It is a pulse lamp for about 3 seconds and the laser radiation is about 2
A pulse laser having an intensity of 40 mJ / cm ² and one cycle of about 1 millisecond.

A concrete example of the doping of the source and drain regions 3 and 7 will now be described in detail. Phosphorus-silicate glass (hereinafter referred to as P
(Referred to as SG), P is formed on the upper surface of the semiconductor layer 8.
The TFT 1 including the SG layer is irradiated with radiation from the lower surface side. In this case, the radiation is applied to the entire TFT 1, but the radiation incident on the channel region 5 is applied to the gate electrode 4.
Masked by. Therefore, in the semiconductor layer 8, the source and drain regions 3 and 7 except the channel region 5 are formed.
Only the radiation will be irradiated. Then, the temperature of the source and drain regions 3 and 7 to which the radiation is selectively applied rises, and the source and drain regions 3 and 7 from the PSG layer.
Phosphorus as a dopant is diffused into each region and each region is N-type doped. Further, when the semiconductor layer 8 is formed of amorphous silicon, the source and drain regions 3 and 7 are crystallized by irradiation with radiation. As a result of this crystallization and doping, the conductivity of the semiconductor layer 8 is 10
It becomes about ² to 10 ³ S / cm. When the dope ends,
The PSG layer is removed by etching, and metal electrodes (source electrode and drain electrode) 12 and 14 are deposited on the source and drain regions 3 and 7 to form the TFT 1.

When metal antimony (hereinafter referred to as Sb) is used as the dopant layer 16, the TFT 1 having the Sb layer on the upper surface of the semiconductor layer 8 is described above from the lower surface side or the upper surface side. It is possible to irradiate the same radiation as in the embodiment. When the radiation is applied from the upper surface side of the TFT 1, most of the radiation is absorbed by the Sb layer. When the temperature of the Sb layer is raised by absorption of radiation, the source, the drain regions 3 and 7 and the channel stopper layer 10 which are in contact with the Sb layer are heated. And Sb
Antimony as a dopant is diffused from the layer to the source, the drain regions 3 and 7 and the channel stopper layer 10. However, since the channel region 5 of the semiconductor layer 8 is masked by the channel stopper layer 10, antimony does not diffuse into the channel region 5. Therefore, only the source and drain regions 3 and 7 are selectively N-type doped. Further, when the semiconductor layer 8 is formed of amorphous silicon, the source of
The drain regions 3 and 7 are crystallized. When the doping is completed, the Sb layer is removed by etching, and the source,
Metal electrodes 12 and 14 are deposited on the drain regions 3 and 7,
The TFT1 is formed.

When boron nitride (BN) is used as the dopant layer 16, boron as the dopant is similarly diffused into the source and drain regions 3 and 7, and these regions are P-type. Be dominated.

In addition to the method of diffusing the dopant from the solid dopant layer 16 as described above, there is a method of diffusing the dopant from the liquid phase or the gas phase. Examples of the liquid phase or the gas phase include BBr ₃ , AsCl ₃ , PO
Cl ₃ , B ₂ H ₆ , AsH ₃ , and PH _{3 and the} like. Even when the dopant is diffused from the liquid phase or the gas phase, the source and drain regions 3 and 7 can be doped as in the above-described embodiment.

As described above, the channel stopper layer 10 is formed by providing the dopant layer before the source electrode and the drain electrode are deposited and by doping the source and drain regions 3 and 7. Alternatively, since the gate electrode 4 masks the channel region 5 of the semiconductor layer 8 from radiation, an expensive device for doping the source and drain regions 3 and 7 as in the conventional ion implantation or ion doping. Can be applied to a self-alignment type TFT without requiring.

The present invention is not limited to the above-described embodiments, but various modifications can be made without departing from the scope of the invention. For example, although the TFT having the inverted staggered structure has been described in the above-described embodiments, the TFT may have a staggered structure, a coplanar structure, or an anticoplanar structure.

[0033]

As described above, according to the thin film transistor of the present invention, before the source electrode and the drain electrode are vapor-deposited, the source region, the channel stopper layer, and the drain region are contacted with each other to form a drain. Evaporate the punt layer. Radiation is irradiated from the upper surface side and / or the lower surface side of the TFT to selectively heat the source region and the drain region to diffuse the dopant from the dopant layer to the source region and the drain region. The conductivity is increased by doping each region.

Therefore, the expensive apparatus required for the conventional ion implantation or ion doping is not required, and the manufacturing cost can be reduced. Also,
Since the dopant is diffused by radiating the radiation from the upper surface or the lower surface side of the TFT, it is suitable for a liquid crystal display device having a relatively wide substrate, and is suitable for a self-aligned TFT. There is.

[Brief description of drawings]

FIG. 1 is a sectional view showing a TFT according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a TFT before vapor deposition of a source electrode and a drain electrode of the TFT shown in FIG.

3 is a cross-sectional view showing a state in which a source layer, a channel stopper layer, and a drain region of the TFT of FIG. 2 are contacted to deposit a dopant layer.

[Explanation of symbols]

1 ... Thin film transistor (TFT), 2 ... Transparent insulating substrate,
3 ... Source region, 4 ... Gate electrode, 5 ... Channel region,
7 ... Drain region, 8 ... Semiconductor layer, 10 ... Channel stopper layer, 12 ... Source electrode, 14 ... Drain electrode, 1
6 ... Dopant layer

Claims (14)

[Claims] 1. A semiconductor layer having a source region, a drain region, and a channel region, a gate electrode provided on one side of the semiconductor layer, and on the other side of the semiconductor layer on the channel region. A source electrode and a drain electrode which are provided in contact with the source region and the drain region, respectively, and the source region and the drain region are the drain region. A dopant layer including a punt and removed before forming the source electrode and the drain electrode is formed on the other surface of the semiconductor layer and on the channel stopper layer.
The semiconductor layer is irradiated with radiation from the other surface side of the semiconductor layer in a state where irradiation of the channel region with radiation is blocked by a layer to selectively heat the source region and the drain region. A thin film transistor, characterized in that it contains the dopants diffused from the punt layer. 2. The dopant is phosphorus diffused from phosphorus-silicate glass.
The thin film transistor described in 1. 3. The dopant according to claim 1, wherein the dopant is antimony diffused from metallic antimony.
The thin film transistor described in 1. 4. The thin film transistor according to claim 1, wherein the dopant is boron diffused from boron nitride. 5. The thin film transistor according to claim 1, wherein the dopant is diffused from an n-type or p-type semiconductor. 6. A semiconductor layer having a source region, a drain region, and a channel region, a gate electrode provided on one side of the semiconductor layer, and on the other side of the semiconductor layer on the channel region. A source electrode and a drain electrode which are provided in contact with the source region and the drain region, respectively, and the source region and the drain region are the drain region. The semiconductor layer is exposed to a gas phase containing a punt and removed before forming the source electrode and the drain electrode, and the channel stopper layer blocks the irradiation of radiation to the channel region. The dopant is diffused from the gas phase by irradiating the semiconductor layer with radiation from the other surface side of the layer to selectively heat the source region and the drain region. Thin film transistor characterized in that it. 7. The radiation includes broadband beam radiation or narrow band beam radiation.
Or the thin film transistor described in 6. 8. The thin film transistor according to claim 1, wherein the radiation includes laser radiation or lamp radiation. 9. The thin film transistor according to claim 1, wherein the semiconductor layer is made of amorphous silicon. 10. The thin film transistor according to claim 1, wherein the semiconductor layer is made of crystalline silicon. 11. The thin film transistor according to claim 9, wherein the source region and the drain region of the semiconductor layer absorb the radiation and are crystallized. 12. The thin film transistor according to claim 1, wherein the radiation is applied from an upper surface side and / or a lower surface side of the semiconductor layer. 13. A step of forming a semiconductor layer having a source region, a drain region, and a channel region, a step of forming a gate electrode on one surface side of the semiconductor layer, and another surface of the semiconductor layer on the other surface. A step of forming a channel stopper layer covering the channel region, a step of forming a dopant layer including a dopant on the other surface of the semiconductor layer and on the channel stopper layer, and the channel stopper. By irradiating the semiconductor layer with radiation from the other surface side of the semiconductor layer while selectively blocking the irradiation of the radiation to the channel region by a layer to selectively heat the source region and the drain region; From the dopant layer to the source region and the drain region,
A step of diffusing the punt, a step of diffusing the dopant, and a step of removing the dopant layer, and a step of contacting the source region and the drain region after the dopant layer is removed. And a step of forming a source electrode and a drain electrode. 14. A step of forming a semiconductor layer having a source region, a drain region, and a channel region, a step of forming a gate electrode on one surface side of the semiconductor layer, and another surface of the semiconductor layer on the other surface. Forming a channel stopper layer covering the channel region, exposing the other surface of the semiconductor layer and the upper surface of the channel stopper layer to a vapor phase containing dopant, and From the gas phase by selectively irradiating the source region and the drain region by irradiating the semiconductor layer with radiation from the other surface side of the semiconductor layer in a state where the irradiation of radiation to the channel region is blocked. A step of diffusing the dopant into the source region and the drain region, a step of diffusing the dopant and removing the vapor phase, and a step of removing the vapor phase, And a step of forming a source electrode and a drain electrode which are in contact with the source region and the drain region, respectively.