JPH0695314B2 - Virtual computer system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a virtual computer system capable of efficiently performing input / output interrupt control performed by a virtual computer control program (VMCP).

[Conventional technology]

The virtual computer system is a computer system that is simulated to realize the coexistence of a plurality of operating systems under one computer system. In such a virtual computer system, a virtual computer is realized by a virtual computer control program (VMCP) allocating and simulating the resources of the real computer. A plurality of virtual computers are realized here, and a plurality of operating systems (OS) operate simultaneously in parallel under each of the plurality of virtual computers (VM).

Conventionally, in a virtual computer system, I / O devices (IO devices) connected to a real computer system (host operating system operating system: host system) are dedicated to each OS in IO device units, and I / O interrupts (IO interrupt) The IO interrupt subclass mask of the host system for controlling each OS in units of subclasses (O that runs on each virtual machine
S), the host system IO in this case
The determination of the interrupt subclass mask value is disclosed in JP-A-60-150140.
As described in the official gazette, it was performed as follows. (1) The host system subclass mask is the current running VM
When exclusive to (OS), set the mask value of the subclass mask of the corresponding VM.

(2) When the subclass mask of the host system is occupied by a VM other than the current running VM, the logic of the mask value of the subclass mask of the corresponding VM and the IO interrupt mask value of the PSW (program status word) of the current running VM Set the product. It should be noted that "0" may be set when the delay of the interrupt of the subclass mask does not matter.

[Problems to be Solved by the Invention]

By the way, in the above-mentioned conventional input / output interrupt control of the virtual computer system, the VM on the VM (non-running VM) other than the current running VM is waiting regardless of whether the OS is in the waiting state or not.
If the IO interrupt mask value of is 1 and the IO interrupt subclass mask value is 1, the VMCP has accepted the OS IO interrupt on the VM.

However, if the OS on the VM is not in the waiting state, the VM will be scheduled to become a running VM, and the IO of the OS on the VM will be
The interrupt is ready to be directly reported from hardware to the OS. In this case, VMCP intervenes and the OS of the VM
It is not necessary to accept IO interrupts.

Also, if "0" is set in the host system subclass mask exclusively used by the non-running VM (OS) and the OS is in an IO interrupt wait state, the OS on that VM does not release the wait state and continues to wait forever. It will be. For this reason, there is a problem that the performance of the virtual computer system is extremely deteriorated in some cases.

The present invention has been made to solve the above problems.

An object of the present invention is to improve the method of accepting an IO interrupt with respect to a running VM (OS) and improve the performance of the VM.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems]

In order to achieve the above object, in the present invention, at least one virtual computer is realized under the control of the virtual computer control means, and the input / output for controlling the permission / prohibition of the entire input / output interrupt for each of the virtual computers. An interrupt mask, an input / output interrupt subclass mask for controlling enable / disable of an input / output interrupt for an input / output device exclusively used by the virtual computer, and a wait state bit value storage means for indicating whether the program is in an operating state or a waiting state In the virtual computer system that determines the value of the input / output interrupt subclass mask of the entire system based on the input / output interrupt mask and the input / output interrupt subclass mask of the virtual computer, the virtual computer control means causes the virtual computer to stop running. About computer Queue of I / O interrupt mask value and I / O interrupt subclass mask value of the virtual computer A means for determining an input / output interrupt subclass mask value for the entire system by a logical product with a bit value is provided, and the virtual computer control means receives an input / output interrupt for a virtual computer that is operating and not running. The feature is that it is controlled.

[Action]

According to the above means, the IO interrupt subclass mask of the host system exclusively occupied by the non-running VM is set to the VM value corresponding to the IO interrupt subclass mask of the host system as a mask value.
The logical product of the mask value of the IO subclass mask, the mask value of the IO interrupt mask of the VM, and the bit value of the wait state bit of the VM is set.

As a result, the value of the wait state bit set by the OS is added to the determination of the IO subclass mask value of the host system that is occupied by the non-running VM (OS).
(OS) IO interrupts are accepted by VMCP only when the OS is in the wait state and the IO interrupt mask and subclass mask enable IO interrupts.

Therefore, VMCP can suppress the acceptance of IO interrupts that do not need to be accepted, and can release the wait state when it enters the IO interrupt wait state.

〔Example〕

An embodiment of the present invention will be specifically described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of the main part of a virtual computer system according to an embodiment of the present invention.

In FIG. 1, 1 is a central processing unit (CPU) and 2 is a main memory (MS). Further, 3 is an input / output processing device (IO
P), 4 is an input / output control device (IOC), and 5 is an IO device. 10 is a PSW that stores the program status word (PSW)
A register, 10a is an IO interrupt mask bit (I) that controls all IO interrupts, and 10b is a wait state bit (W) that controls the operation / wait state of the program. Reference numeral 11 denotes an IO interrupt subclass mask register, which is a 32-bit register that holds an IO interrupt subclass mask for controlling enable / disable of an IO interrupt for each IO device. 11a has one I
O Interrupt subclass mask bit. 12 is the VM on the CPU side
/ EX mechanism, IO instruction execution and IO issued from OS
A hardware mechanism that enables interrupts to be reported to the OS without VMCP intervention. 32 is V on the IOP side
It is an M / EX mechanism.

The data processing system is composed of a combination of hardware elements such as a central processing unit 1, a main storage unit 2, an input / output processing unit 3, an input / output control unit 4, and an IO device 5. A host operating system operates using these hardware elements, and an actual computer system (host system) operates. Then, a virtual computer system is configured by simulating the same elements as in this real computer system. The entity that constitutes the virtual computer system is control data for the virtual computer that is set on the main storage device 2.
A virtual computer is realized by the function of a central processing unit that performs data processing using this control data. In FIG. 1,
The virtual computer system realized in this way is displayed in blocks on the blocks of the main storage device 2. That is, in FIG. 1, the block surrounded by the alternate long and short dash line is the main part of the elements constituting the virtual computer system.

As shown in FIG. 1, here, the first virtual machine (VM
1) 24a, a second virtual machine (VM2) 24b, and a third virtual machine (VM3) 24c are realized under the control of a virtual machine control program (VMCP) 20 that controls and manages each virtual machine. Each virtual computer 24a, 24b, 24c has a P
Similar virtual machine (VM) PSW register 25 and virtual machine (VM) IO interrupt subclass mask register corresponding to each of SW register and IO interrupt subclass mass register
26 are provided. Further, in order to manage the input / output control of each virtual machine, the VMCP 20 is provided with an IO interrupt control routine 21, a host IO interrupt subclass mask register 22, and a subclass conversion table 23a, 23b, 23c corresponding to each virtual machine. . The subclass conversion tables 23a, 23b, and 23c include information as to whether or not the individual subclass mask bits 26a of each corresponding VM are exclusive subclass mask bits, and in the case of an exclusive subclass mask, the corresponding host IO interrupt subclass mask register. Of the corresponding bit 22a. The IO interrupt control routine 21 of the VMCP 20 has a subroutine for setting the subclass mask value in the area of the host IO interrupt subclass mask register 22. The respective operating systems OS1 to OS3 operate on the VM1 to VM3 thus configured. The simulation process performed by VMCP is the actual computer system (host system).
It runs on the host OS in.

FIG. 2 is a flowchart showing the setting process of the VMCP IO interrupt subclass mask. This setting process of VMCP20
This is a subroutine in the IO interrupt control routine 21. When the dispatching VM (OS) is switched by time slice control etc., this subroutine is called for the VM dispatched immediately before (VM to be stopped) and for the VM dispatched next (VM to run). It As described in detail below, this subroutine uses the VMCP host IO to set the subclass mask value of the subclass mask (dedicated subclass mask) assigned for interrupt control of the VM to be stopped and the VM to be run.
A process for setting the corresponding subclass mask of the interrupt subclass mask register 22 is performed. In the case of a VM to be stopped, the I bit and W bit of the PSW concerned are involved in the determination of this subclass mask value. After the setting processing for the VM to be stopped and the VM to be run is completed, the contents of the host IO interrupt submask register 22 are set in the IO interrupt subclass mask register 11 of the central processing unit 1, and the PSW register 10 of the central processing unit 1 is set. The virtual machine PSW register 25 of the VM to be stopped is set, the virtual machine PSW register 25 of the VM to be run is set to the PSW register 10 of the central processing unit 1, and the VM (OS) to be run is dispatched.

Next, the process of setting the subclass mask value in the area of the host IO interrupt subclass mask register 22 will be described with reference to FIG. First, in step 60, it is determined whether the VM is a running VM (running VM) or a VM to be stopped.
If it is not, the process proceeds to step 61, and in order to determine the subclass mask value to be set in the host IO interrupt subclass mask register 22, the variable T is set to I of the virtual machine PSW register 25.
Sets the logical product of the bit and the W bit. On the other hand, when the determination in step 60 is the traveling VM, the process proceeds to step 62 and the variable T is set to "1". This process is the host
This is a process for not using the values of the I bit and the W bit of the virtual computer PSW register 25 to determine the subclass mask value set in the IO interrupt submask register 22.

Next, in step 63, the exclusive subclass mask is searched from the subclass mask return table 23a for the VM. As a result, the corresponding bit number VDSN (26a) of the virtual machine IO interrupt subclass mask register 26 is obtained.
In the next step 64, the search result of step 63 is judged, and if the exclusive subclass mask is not found, the process is terminated and the process returns to the caller. Meanwhile, step 64
If the exclusive subclass mask is found by the determination of the search result of, in the next step 65, the bit number RDSN (22a) of the exclusive subclass mask of the host corresponding to the bit number VDSN of the exclusive subclass mask of VM is set to the subclass of the VM. It is obtained from the mask conversion table 23a.

In the next step 66, the logical product A of the mask value mi of the corresponding bit number VDSN (26a) of the virtual computer IO interrupt subclass mask register 26 and the variable T set in step 61 or step 62 is taken. Then, in step 67, the logical product A obtained in step 66 is used as the corresponding bit number RD of the area of the host IO interrupt subclass mask register 22.
Set as a mask value for SN (22a). Then, the process returns to step 63 again, and the processing from step 63 is repeated.

In this way, the process of setting the subclass mask value in the area of the host IO interrupt subclass mask register 22 is performed. Generally, in a virtual machine system, only a small part operates in a state in which IO interrupts are prohibited, and when the OS is not in a waiting state, it normally operates in a state in which IO interrupts are permitted. Therefore, when the OS is not in the waiting state,
When a non-running VM is set due to time slice control, most of the IO interrupt mask value and IO subclass mask value are both "1". According to the input / output control method of this embodiment, it is possible to directly report an IO interrupt to the non-running VM (OS) in this state from the hardware (IO device) to the virtual computer without VMCP intervention. it can. Therefore, the VMCP does not need to operate only for reporting this IO interrupt, and the performance of the virtual computer system in which a plurality of virtual computers operate improves.

The present invention has been specifically described above based on the embodiments,
It is needless to say that the present invention is not limited to the above-mentioned embodiments and can be variously modified without departing from the scope of the invention.

〔The invention's effect〕

As described above, according to the present invention, the non-running VM (O
By adding the value of the wait state bit set by the OS to the determination of the host system's IO subclass mask value that S) occupies, non-running VM (OS) IO interrupts VMCP accepts IO interrupts only when the interrupt mask and subclass mask allow IO interrupts, and VMCP can suppress the acceptance of IO interrupts that need not be accepted. Therefore, the non-running VM (OS) IO interrupt can be directly sent from the hardware without VMCP intervention.
The process of reporting to the (OS) can be performed, and the VMCP simulation process, which need not be performed, can be omitted, and the performance of the virtual computer system is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a main part of a virtual computer system according to an embodiment of the present invention, and FIG. 2 is a flow chart showing a setting process of an IO interrupt subclass mask of VMCP. In the figure, 1 ... Central processing unit, 2 ... Main memory unit, 3 ...
IO processing device, 4 ... IO control device, 5 ... IO device, 10
...... PSW register, 10a …… IO interrupt mask bit, 10b
...... Wait status bit, 11 ...... IO interrupt subclass mask register, 11a …… IO interrupt subclass mask bit, 12,
32 …… VM / EX mechanism.

Claims (1)

[Claims] 1. An I / O interrupt mask that realizes at least one virtual computer under the control of a virtual computer control unit, and each of the virtual computers controls permission / prohibition of all I / O interrupts, and the virtual computer. An input / output interrupt subclass mask for controlling permission / prohibition of input / output interrupts for an input / output device exclusively owned by a computer, and a wait state bit value storage means for indicating whether a program is in an operating state or a waiting state are provided. In a virtual computer system that determines the value of the input / output interrupt subclass mask of the entire system based on the input / output interrupt mask and the input / output interrupt subclass mask, the virtual computer control means determines the virtual computer of the virtual computer to stop running. System by the logical product of the I / O interrupt mask value and the I / O interrupt subclass mask value wait state bit value A means for determining the overall input / output interrupt subclass mask value is provided, and the virtual computer control means is prevented from accepting an input / output interrupt for an operating and non-running virtual computer. And a virtual computer system.