JPH0693637B2 - Diversity synthesis circuit - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a diversity combining circuit in a heterodyne receiver.

(Prior Art and Its Problems) Conventionally, an equal gain combining method, a selective gain combining method, and a maximum ratio combining method have been used as the combining of signal waves in diversity reception. Consider this as an example in which it is used for polarization diversity in optical heterodyne reception. The ratio of one specific polarized wave output to the sum of the two orthogonal polarized wave outputs of the output signal light is defined as the polarization separation ratio α. In the equal gain combining method and the selective gain combining method, depending on the polarization separation ratio α, the signal-to-noise ratio S / N is deteriorated by 3 dB at the maximum as shown in FIG. In order to suppress this deterioration, the maximum ratio combining method (shown in FIG. 1) is used, or the S / N with the better S / N among the selective combining method (shown in FIG. 1) and the equal gain combining method (shown in FIG. 1). Either one of the methods (hereinafter, referred to as the kirikae synthesis method) is adopted.

FIG. 2 shows a conventional embodiment of a circuit for performing the maximum ratio combining method. The signal input from the signal input terminal 4a is branched by the branch circuit 11a. The average power is output by passing one output of the branch circuit through the rectifier 2a and the low-pass filter 3a. By inputting this output to the variable gain amplifier 1a, the other output of the branch circuit 11a is amplified in proportion to the output voltage of the low pass filter 3a. Similarly, the signal at the other signal input terminal 4b is amplified by the variable gain amplifier 16 under the control of the rectifier 2a and the low pass filter 3a, and then added by the adder 10.
Therefore, the maximum ratio combining diversity is performed by adding the output voltages of the variable gain amplifiers 1a and 1b. Also,
In the switching synthesis method, the signal-to-noise ratio of the output of the amplifier 1a, the output of the amplifier 1b, and the output of the adder 5 is set while the amplification factors of the amplifiers 1a and 1b are fixed in FIG.
A switch was used to select the best S / N by comparing the outputs of the low-pass filters 3a and 3b. The configuration described above has a drawback in that the circuit configuration of the variable gain amplifier or switch becomes complicated.

(Object of the Invention) An object of the present invention is to provide a diversity combining circuit with a simple circuit configuration, which can suppress deterioration of the signal-to-noise ratio S / N well in heterodyne and homodyne detection reception.

(Features of the Invention) The present invention will be described in detail below.

As shown in FIG. 3, the present invention is most characterized in that the variable gain circuits 1a and 1b of FIG. 2 are constructed by utilizing the nonlinearity of the output voltage with respect to the input voltage of the diode element. Specifically, in FIG. 3, when the input signal power is small, the bias voltage in FIG. 3 is small as V _D , and when the input signal power is large, the bias voltage is as V _{E in} FIG. It is characterized in that a feedforward circuit is configured so as to be large, and a variable gain circuit is configured.

In the prior art, as described above, a simple circuit including only one diode element does not constitute a variable gain circuit but uses a transistor element or the like, which makes the circuit configuration complicated.

[Embodiment 1] FIG. 4 shows a first embodiment corresponding to claim (1) of the present invention. The output signal subjected to synchronous detection or envelope detection enters from the signal input terminal 4a. The signal is split into two, one of which is rectified by the rectifier 2a to detect the average signal power, and the low-pass filter 3a extracts only the low-frequency component, and the output voltage thereof is amplified by the amplifier 7a with offset. The offset output voltage is applied to the diode 6a via the coil 8a. At this time, the diode 6a has a non-linearity as shown in FIG. 3 between the input voltage and the output current.
Here, if the characteristic that the ratio of the output current fluctuation to the input voltage fluctuation is output in proportion to the average input voltage is used,
In the figure, the signal input / output gain of the diode 6a varies in proportion to the bias voltage of the output of the amplifier 7a with respect to the diode 6a. Here, as shown in FIG. 4, the bias voltage is the output of the amplifier with offset 7a and the diode 6 via the coils 8a and 8b.
When added to a, the amplitude of the output current of the diode 6a (however, the offset voltage of the amplifiers 7a and 7b is zero at this time) is proportional to the square of the amplitude of the voltage at the signal input voltage 4a. Since the same operation is performed for the input and output of 6b, the output of the adder 10 is the maximum ratio-combined one. Specifically, in FIG. 3, the bias voltage is
When it is small like V _D , output current G for input signal E
When the bias voltage is large like V _E , the amplitude ratio of the output current H to the input signal F is large. Therefore, by using this circuit, maximum ratio combining diversity reception becomes possible.

When the nonlinearity of the diode as shown in FIG. 5 is used, when the bias voltage V _A is small, the output is as shown by the output waveform C with respect to the input waveform A of FIG. Does not appear. In contrast, when a large bias voltage V _B is the input waveform B of FIG. 4, the output waveform D exits large. Here, the V _C point, which is the output on / off threshold value, becomes the bias point of the weaker input signal at the polarization separation ratio α = 0.147. For input signals above that, the bias voltage is higher than V _C. The gain and the offset voltage of the amplifiers 7a and 7b are set so as to make the bias voltage smaller than V _C when the bias voltage is larger than that. With this configuration, 2
For the two signal inputs 4a and 4b, the combined signal output 5 is
The S / N in the switching method can be obtained.

As described above, the approximation of two types of diode characteristics (see FIGS. 3 and 5).
Figure) was performed. The relationship between the output current of the diode and the applied voltage can be approximated by the non-linear characteristic shown in FIG. 3 in the range where the voltage applied to the diode is up to several times the threshold voltage of the diode. Further, considering a range sufficiently larger than the threshold voltage of the diode, the nonlinear characteristic shown in FIG. 5 can be approximated. On the other hand, when the load connected to the output side of the diode is large, the applied voltage range to the diode remains small, and when the load connected to the output side of the diode is small, the applied voltage range to the diode is small. Covers a large range. Therefore, depending on the size of the load connected in series with the diode, it is possible to use either the one shown in FIG.
The operation shown in the figure is performed. As is clear from this result, good diversity combining can be performed by using the diode, and the diversity combining circuit can be configured with a simpler circuit configuration than the conventional one.

[Embodiment 2] FIG. 6 shows a second embodiment corresponding to claim (2) of the present invention. The intermediate frequency band output subjected to the heterodyne detection is input to the signal input terminal 4a. Here, the envelope detection of the ASK signal is assumed. Similar to the first embodiment, this output is branched by the branch circuit 11a, one of them is rectified, and a low frequency component voltage is applied to the diode 6a, as in the first embodiment. Here, the rectified output L is output when the bias voltage is large as in the seventh as shown in the illustration is not output when the bias voltage for the input I is low as V _F (output K), the input J . Therefore,
When the signal input is small, the bias voltage is lowered to not output the rectified output. When the signal input is large, the bias voltage is raised to output the rectified output, and the rectified output is switched according to the size of the signal input. By passing such a rectified output with a switch through a low-pass filter and then adding them together by the adder 10, a combined output in the baseband can be obtained at the output terminal 5. In this way, by also using the detector of the intermediate frequency signal as the variable gain circuit,
Diversity combining can be performed with a circuit configuration simpler than the conventional one.

[Embodiment 3] FIG. 6 shows the case of the heterodyne ASK envelope detection, but the scope of claim (2) can also be applied to the case of the synchronous detection. FIG. 8 shows an embodiment of heterodyne PSK synchronous detection according to the second invention of the present application based on this principle. The signal is
Input from the input terminal 4a. After the signal is branched by the branch circuit 11a, one of them passes through the hybrid circuit 12a and the local oscillator 13
Is mixed with the output of both, and both outputs are capacitors 9a and 9b, respectively.
And is connected to the terminals of the diodes 6a and 6b. Here, in the hybrid circuit, the intermediate frequency angular frequency of the input signal is w, the time is t, the input signal voltage is A (t) cos (wt),
Letting the input station light emission voltage be Bcos (wt), both outputs are C [A (t) cos (w (t-φ) + Bcos (w (t-
φ))], C [A (t) cos (w (t−φ) −Bcos (w
(T-φ))] (where C is a coefficient that changes depending on the bias voltage of the diode, and φ is the delay time difference between the input and output of the hybrid circuit). In this case, the output voltage of the multiplication circuit by the diode connected to the hybrid circuit output side is {C [A (t) cos (w
(T−φ) + Bcos (w (t−φ))]} ² − {C [A
(T) cos (w (t−φ) −Bcos (w (t−φ))]}
² = 8 CBA (t) [1 + cos (2w (t−φ))].
The low-pass filter allows only the low-frequency component to pass, allowing 8CBA of the baseband output component during synchronous detection.
(T) appears at the output of the low pass filter 3c. Here, in the same manner as described above, the output obtained by rectifying and smoothing the other output of the branch circuit 11a is amplified by the offset amplifier 7a and added with an offset, and then biased to the diode 6c. Different baseband conversion circuits can be created depending on the input signal power. The same operation is performed for the input of the input terminal 4b. By synthesizing the outputs of the low-pass filters 3c and 3d of these circuits by the adder 10, it is possible to perform switching synthesis as in the first and second embodiments. As described above, even at the time of synchronous detection, the detector for the intermediate frequency signal is also used as the variable gain circuit, so that diversity combining can be performed with a circuit configuration simpler than the conventional one.

So far, we have described two signal inputs.
The same can be applied to three or more signal inputs.

(Effect of the Invention) As described in detail above, according to the present invention, by using the nonlinearity of the diode without using the variable amplifier, the maximum ratio combining diversity and the switching combining diversity of high performance can be achieved with a simple circuit configuration. It can be performed. Further, as a matter of course, it can be applied to various diversity techniques in the wireless transmission system.

[Brief description of drawings]

Fig. 1 shows the input polarization separation ratio of various diversity systems.
S / N deterioration characteristic diagram, FIG. 2 is a block diagram showing a configuration example of a conventional diversity circuit, FIG. 3 is a characteristic diagram showing gain variation due to a bias voltage applied to a diode used in the present invention, FIG. Is a block diagram showing a first embodiment of the present invention, FIG. 5 is an operation characteristic example diagram of the embodiment of FIG. 4, FIG. 6 is a block diagram showing a second embodiment of the present invention, and FIG. FIG. 8 is an example of operational characteristics of the embodiment shown in FIG. 6, and FIG. 8 is a block diagram showing a third embodiment of the present invention. 1a, 1b …… variable gain amplifier, 2a, 2b …… rectifier, 3a, 3b, 3
c, 3d …… Low pass filter, 4a, 4b …… Input terminals, 5 ...
… Output terminals, 6a, 6b …… Diodes, 7a, 7b …… Amplifier with offset, 8a, 8b, 8c, 8d …… Coils, 9a, 9b, 9c, 9d, 9e,
9f ... Capacitor, 10 ... Adder, 11a, 11b, 11c ... Branch circuit, 12a, 12b ... Hybrid circuit, 13 ... Local oscillator.

Claims (2)

[Claims] 1. A plurality of receiving circuits, a bias circuit for generating an output voltage as a function of an average output power of each receiving circuit, a gain corresponding to the output of each receiving circuit, and a gain corresponding to the bias circuit output. The gain variable circuit includes an attenuation variable gain variable circuit and a synthesis circuit that synthesizes respective outputs of the gain variable circuit. The gain variable circuit includes two capacitors arranged in series at both ends of the diode, and the diode and the two capacitors. A connection point to one of the capacitors of the diode is connected to the output of the bias circuit via a coil, and a connection point of the diode and the other of the two capacitors is grounded via a coil, The gain adjustment of the variable gain circuit is configured to be performed by the non-linearity of the diode and the offset adjustment of the input signal using the output of the bias circuit,
And, as the diode, using the diode used in the detector of the intermediate frequency signal in the heterodyne receiver,
By using the intermediate frequency signal as the input signal,
A diversity combining circuit characterized in that the detector is configured to be used also as the gain variable circuit. 2. A plurality of receiving circuits, a bias circuit for generating an output voltage that is a function of an average output power of each of the receiving circuits, an oscillator that outputs a local oscillation output for synchronous detection, and an output of each of the receiving circuits. On the other hand, a gain variable circuit that is variable in gain and attenuation corresponding to the output of the bias circuit, and a combining circuit that combines the respective outputs of the gain variable circuit, and the gain variable circuit has two diodes connected in series. Two capacitors are arranged in series at both ends, and a connection point between the two series-connected diodes and one of the two capacitors is connected to the output of the bias circuit via a coil, and
A connection point between the two series-connected diodes and the other of the two capacitors is grounded via a coil, and a connection point between the two series-connected diodes is connected to the synthesis circuit via a low-pass filter, and The synchronous detection by the local oscillation output for synchronous detection with respect to the output of each receiving circuit is
A variable gain circuit, which has a hybrid circuit for providing a combined output of the outputs of the receiving circuits and the local oscillation output to the open ends of the two capacitors as is the case with the series connected diodes. A diversity combining circuit, wherein the gain of the circuit is adjusted by adjusting the non-linearity of the diode and the offset of the input signal using the output of the bias circuit.