JPH0650794Y2 - Electronic timepiece circuit board and electronic timepiece - Google Patents
Electronic timepiece circuit board and electronic timepieceInfo
- Publication number
- JPH0650794Y2 JPH0650794Y2 JP13043189U JP13043189U JPH0650794Y2 JP H0650794 Y2 JPH0650794 Y2 JP H0650794Y2 JP 13043189 U JP13043189 U JP 13043189U JP 13043189 U JP13043189 U JP 13043189U JP H0650794 Y2 JPH0650794 Y2 JP H0650794Y2
- Authority
- JP
- Japan
- Prior art keywords
- electronic timepiece
- circuit board
- change
- wiring patterns
- crystal unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000013078 crystal Substances 0.000 claims description 17
- 238000000465 moulding Methods 0.000 description 5
- 239000003795 chemical substances by application Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
- Structure Of Printed Boards (AREA)
Description
【考案の詳細な説明】 [産業上の利用分野] 本考案は、電子時計用回路基板の水晶振動子用配線パタ
ーンのレイアウトに関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a layout of a wiring pattern for a crystal unit of a circuit board for an electronic timepiece.
[従来の技術] 従来の電子時計用回路基板に於いては、第5図に一例を
示したように、ICチップ1と水晶振動子2を接続するた
めの2本の配線パターンは、お互いがほぼ平行に隣接し
て配置されており、両パターンの間には空隙部はなかっ
た。[Prior Art] In a conventional electronic timepiece circuit board, two wiring patterns for connecting the IC chip 1 and the crystal unit 2 are connected to each other as shown in FIG. They were arranged almost parallel to each other and there was no space between both patterns.
[考案が解決しようとする課題] しかし前述の回路基板に於いては、水晶振動子用の配線
パターンが隣接しているため、回路基板に配線パターン
を形成する際に銅箔を接着するための接着剤や、回路基
板へのICチップの固定力を高めるためのモールド剤が誘
電体となり、両配線パターンの間に比較的大きな浮遊容
量が形成されてしまい、湿度変化に伴う浮遊容量値の変
化に起因する歩度変化量が大きくなるという問題点を有
していた。このときの歩度変化量は配線パターンの長さ
によっても異なるが、温度20℃で湿度を40%から90%に
変化した場合0.05〜0.07sec/day程度となり、年差10秒
といった高精度時計にとっては致命的な値になってしま
う。[Problems to be Solved by the Invention] However, in the above-mentioned circuit board, since the wiring patterns for the crystal unit are adjacent to each other, it is necessary to bond the copper foil when the wiring pattern is formed on the circuit board. The adhesive and the molding agent to increase the fixing strength of the IC chip to the circuit board become a dielectric, and a relatively large stray capacitance is formed between both wiring patterns. However, there is a problem that the rate of change in the rate due to is large. The rate of change at this time varies depending on the length of the wiring pattern, but when the humidity is changed from 40% to 90% at a temperature of 20 ° C, it will be about 0.05 to 0.07 sec / day, and for high-precision watches with a 10-year difference, Becomes a fatal value.
本考案は上述の問題点を解決するためのもので、その目
的は、湿度変化に伴う浮遊容量値の変化に起因する歩度
変化を抑え、年差10秒といった高精度時計の精度保証率
を高めることにある。The present invention is intended to solve the above-mentioned problems, and its purpose is to suppress the rate change caused by the change of the stray capacitance value due to the change of humidity and increase the accuracy guarantee rate of a high-precision watch such as 10 seconds per year. Especially.
[課題を解決するための手段] 本考案の電子時計用回転基板は、前述の課題を解決する
ため、水晶振動子用の2本の配線パターンの間に、該パ
ターンにほぼ沿った長穴またはスリットを設けている。[Means for Solving the Problems] In order to solve the above-mentioned problems, the rotating board for an electronic timepiece according to the present invention is provided between two wiring patterns for a crystal oscillator, and has a long hole or a long hole substantially along the pattern. A slit is provided.
[作用] 本考案の上記構成によれば、水晶振動子用の2本の配線
パターン間に形成される浮遊容量の誘電体が空気になる
ため、浮遊容量値を小さくすることができ、結果として
湿度変化に伴う浮遊容量値の変化に起因する歩度変化量
が小さくなる。[Operation] According to the above configuration of the present invention, since the dielectric of the stray capacitance formed between the two wiring patterns for the crystal unit becomes air, the stray capacitance value can be reduced, and as a result, The rate change rate due to the change in the stray capacitance value due to the change in humidity becomes small.
[実施例] 以下、実施例により本考案を詳細に説明する。本考案の
一実施例によるアナログウォッチ用回路ブロックの平面
図を第1図に断面図を第2図に示す。第1図及び第2図
に於いて1は1a部に内蔵している半導体温度センサーの
情報に基づいて水晶振動子2の二次温度特性を補償する
機能を持つアナログ電子時計用のCMOS−ICチップ、2は
32768Hzで発振し二次温度特性を有する音叉形水晶振動
子、3はフレキシブルテープに接着された銅箔からエッ
チングにより形成した配線パターンを備えた回路基板で
あり、ICチップ1はフェイスダウンボンディングで、ま
た水晶振動子2ははんだ付けで回路基板3に装着されて
いる。またICチップ1の回路基板3への固定力を高める
ために、穴3dよりエポキシ系のモールド剤4が流し込ま
れている。また回路基板3の各配線パターン間には、銅
箔を接着するための接着剤や、ICチップ装着部よりはみ
出したモールド剤4によって、浮遊容量が形成されてい
る。[Examples] Hereinafter, the present invention will be described in detail with reference to Examples. A plan view of a circuit block for an analog watch according to an embodiment of the present invention is shown in FIG. 1, and a sectional view thereof is shown in FIG. In FIGS. 1 and 2, reference numeral 1 is a CMOS-IC for an analog electronic timepiece having a function of compensating for the secondary temperature characteristic of the crystal unit 2 based on the information of the semiconductor temperature sensor incorporated in the 1a section. Chip, 2
A tuning fork crystal unit that oscillates at 32768Hz and has a secondary temperature characteristic, 3 is a circuit board having a wiring pattern formed by etching a copper foil adhered to a flexible tape, and IC chip 1 is face-down bonding. The crystal unit 2 is mounted on the circuit board 3 by soldering. Further, in order to increase the fixing force of the IC chip 1 to the circuit board 3, an epoxy type molding compound 4 is poured from the hole 3d. Floating capacitance is formed between the wiring patterns of the circuit board 3 by an adhesive agent for adhering the copper foil or the molding agent 4 protruding from the IC chip mounting portion.
第1図に示したように、本実施例の回路基板3は、水晶
振動子用の2本の配線パターン3a及び3bの間に両配線パ
ターンに平行な穴3cを設けている。このため、両パター
ン間に接着剤やモールド剤により形成される浮遊容量値
が小さくなり、湿度変化に伴う浮遊容量値の変化に起因
する歩度変化が小さくなる。As shown in FIG. 1, the circuit board 3 of this embodiment is provided with a hole 3c parallel to both wiring patterns between two wiring patterns 3a and 3b for a crystal unit. Therefore, the stray capacitance value formed by the adhesive or the molding agent between both patterns becomes small, and the rate change due to the change in the stray capacitance value due to the humidity change becomes small.
第3図に、第1図の回路ブロックAと第5図の回路ブロ
ックBの20℃中に於ける歩度の湿度特性を示す。FIG. 3 shows the humidity characteristics of the rate of the circuit block A of FIG. 1 and the circuit block B of FIG. 5 at 20 ° C.
第3図から明らかなように、回路基板3の水晶振動子用
の2本の配線パターン3aと3bの間に穴3cを設けることに
より、湿度変化により生じる歩度変化を1/2以下にする
ことができる。As is apparent from FIG. 3, by providing the hole 3c between the two wiring patterns 3a and 3b for the crystal unit of the circuit board 3, the rate change caused by the humidity change can be reduced to 1/2 or less. You can
第4図に本考案の電子時計用回路ブロックの他の実施例
を示す。第4図の実施例に於いては、水晶振動子用の2
本の配線パターン3aと3bの間にスリット3eに設けてい
る。この場合には2本の配線パターン3aと3bの間の空隙
部が増すため、第1図よりもさらに湿度特性が向上す
る。FIG. 4 shows another embodiment of the circuit block for an electronic timepiece according to the present invention. In the embodiment shown in FIG. 4, 2 for the crystal unit is used.
The slit 3e is provided between the book wiring patterns 3a and 3b. In this case, since the space between the two wiring patterns 3a and 3b is increased, the humidity characteristic is further improved as compared with FIG.
[考案の効果] 以上述べたように本考案の回路基板は、水晶振動子用の
2本の配線パターンの間に該配線パターンにほぼ沿った
長穴またはスリットを設けているため、両配線パターン
間に形成される浮遊容量値が小さくなるため、湿度変化
に伴う浮遊容量値の変化に起因する歩度変化を少なくす
ることができ、年差10秒といった高精度時計の精度保証
率を高めることができる。[Effects of the Invention] As described above, the circuit board of the present invention has the elongated holes or slits substantially along the wiring pattern between the two wiring patterns for the crystal unit, so that both wiring patterns are provided. Since the stray capacitance value formed between them can be reduced, it is possible to reduce the rate change due to the change in stray capacitance value due to humidity change, and increase the accuracy guarantee rate of high precision watches such as 10 seconds per year. it can.
また、本考案によれば水晶振動子用の2本の配線パター
ンが多少長くなっても、湿度変化に伴う歩度変化を少な
くすることができるため、水晶振動子とICチップの平面
レイアウト上の自由度が格段に向上し、小型の高精度電
子時計が可能となる。Further, according to the present invention, even if the two wiring patterns for the crystal unit are made slightly longer, the rate change due to the humidity change can be reduced, so that the planar layout of the crystal unit and the IC chip can be freely set. The degree is greatly improved, and a compact high-precision electronic timepiece becomes possible.
尚、実施例では穴3cまたはスリット3eを配線パターン3a
及び3bと平行に設けているが、穴3cまたはスリット3eは
3aか3bの配線パターンにほぼ沿っていれば実施例と同様
の効果を得ることができる。In the embodiment, the hole 3c or the slit 3e is formed in the wiring pattern 3a.
And 3b, but the holes 3c or slits 3e are
The effect similar to that of the embodiment can be obtained as long as it is substantially along the wiring pattern of 3a or 3b.
第1図は本考案の電子時計用回路ブロックの一実施例を
示す平面図。 第2図は第1図の断面図。 第3図は第1図の回路ブロックAと第4図の回路ブロッ
クBの歩度の湿度特性を示すグラフ。 第4図は本考案の電子時計用回路ブロックの他の実施例
を示す平面図。 第5図は従来の電子時計用回路ブロックの実施例を示す
平面図。 1…ICチップ 2…水晶振動子 3…フレキシブル回路基板 3a,3b…水晶振動子用配線パターン 3c…回路基板3に設けられた穴 4…モールド剤FIG. 1 is a plan view showing an embodiment of a circuit block for an electronic timepiece according to the present invention. FIG. 2 is a sectional view of FIG. FIG. 3 is a graph showing rate humidity characteristics of the circuit block A of FIG. 1 and the circuit block B of FIG. FIG. 4 is a plan view showing another embodiment of the electronic watch circuit block of the present invention. FIG. 5 is a plan view showing an embodiment of a conventional electronic timepiece circuit block. 1 ... IC chip 2 ... Crystal oscillator 3 ... Flexible circuit board 3a, 3b ... Wiring pattern for crystal oscillator 3c ... Hole provided in circuit board 3 ... Molding agent
Claims (2)
に、該パターンにほぼ沿った長穴またはスリットを設け
たことを特徴とする電子時計用回路基板。1. A circuit board for an electronic timepiece, characterized in that an elongated hole or a slit substantially along the pattern is provided between two wiring patterns for a crystal oscillator.
とを特徴とする電子時計。2. An electronic timepiece comprising the electronic timepiece circuit board according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13043189U JPH0650794Y2 (en) | 1989-11-08 | 1989-11-08 | Electronic timepiece circuit board and electronic timepiece |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13043189U JPH0650794Y2 (en) | 1989-11-08 | 1989-11-08 | Electronic timepiece circuit board and electronic timepiece |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0370396U JPH0370396U (en) | 1991-07-15 |
| JPH0650794Y2 true JPH0650794Y2 (en) | 1994-12-21 |
Family
ID=31678011
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13043189U Expired - Lifetime JPH0650794Y2 (en) | 1989-11-08 | 1989-11-08 | Electronic timepiece circuit board and electronic timepiece |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0650794Y2 (en) |
-
1989
- 1989-11-08 JP JP13043189U patent/JPH0650794Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0370396U (en) | 1991-07-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0650794Y2 (en) | Electronic timepiece circuit board and electronic timepiece | |
| JPH0729514Y2 (en) | Electronic timepiece circuit board and electronic timepiece | |
| JPS58188684U (en) | electronic display device | |
| JPH08316769A (en) | Surface mount type piezoelectric component | |
| JPH0743673Y2 (en) | Electronic clock | |
| JPH0233392Y2 (en) | ||
| CH615313B (en) | PROCESS FOR MANUFACTURING AN ELECTRONIC CLOCK PART CONSTITUENT, IN PARTICULAR A BRACELET WATCH, AND AN ELECTRONIC CLOCK PART CONSTITUENT RESULTING FROM THIS PROCESS. | |
| JPH0799413A (en) | Crystal oscillator, manufacturing method thereof, and oscillation frequency adjusting method | |
| JPH0743671Y2 (en) | Electronic clock | |
| JPS6039831Y2 (en) | Terminal structure for rate adjustment of electronic clocks | |
| JPS584795B2 (en) | densidokeinioceltokeikiban | |
| JPS60144965A (en) | Hybrid integrated circuit | |
| JPH0540474Y2 (en) | ||
| JPS58111788A (en) | clock | |
| JPH10190355A (en) | Package for piezoelectric device | |
| JPS59109180U (en) | Circuit board for watches | |
| JPH0666121U (en) | Piezoelectric oscillator | |
| JPS59155583U (en) | Structure of electronic clock | |
| JPS598067B2 (en) | Manufacturing method of semiconductor device | |
| JPS592177U (en) | Circuit mounting structure of electronic clock | |
| JPS58191984A (en) | Circuit device for electronic timepiece | |
| JPS59121910U (en) | Electronic watch antenna device | |
| JPS5878526U (en) | switch device | |
| JPS58186787U (en) | Stator structure of clock motor | |
| JPS60120389U (en) | Protection devices for integrated circuits in watches, etc. |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |