JPH0650786Y2 - IC test equipment - Google Patents

Description

[Detailed Description of the Invention] "Industrial Application Field" The present invention relates to an IC tester for determining the quality of an IC (semiconductor integrated circuit).

“Prior art” IC tests are roughly divided into functional tests and DC tests.

The functional test is a test to see if the IC can normally perform a predetermined operation, and the DC test is a test to see if the DC characteristic of each terminal of the IC is within the desired target range.

The test targeted by this device is a functional test. In particular, in the functional test, it is checked whether or not the output having the target rising and falling speeds can be obtained in the state where the capacitive load is connected to the output terminal of the IC. This is a device relating to a test device for testing.

FIG. 3 shows a conventional IC test device. In the figure, 1 indicates the IC under test. The IC 1 to be tested is mounted on the connection means 3 provided on the performance board 2 and connected to the test apparatus 4.

Here, the test apparatus 4 shows only a portion connected to one terminal 1A of the IC under test 1. Further, the internal structure thereof shows only a part necessary for explaining the present invention.

That is, the drive circuit 5 that gives a test pattern signal to the IC under test 1 and the level comparator 6 that determines whether the drive output signal has a normal voltage level when the terminal of the IC under test 1 is an input output switching terminal. And the IC1 under test flows and draws a normal current, and the IC1 under test is operating normally, the outflow current source 7 and the suction current source 8 for supplying a current to the IC1 under test, and these outflow currents. The current I _p of the outflow current source 7 is applied to the switches 9A and 9B connected between the source 7 and the suction current source 8 and the terminals of the IC under test 1 or the suction current source 8
Current switching circuit 11 that switches whether to draw the suction current I _M
And a voltage source 12 that supplies a voltage as a boundary at which the state of the current switching circuit 11 is switched.

That is, the part consisting of the constant current sources 7 and 8, the switches 9A and 9B, the current switching circuit 11, and the voltage source 12 is called program load, and the current value preset in the constant current sources 7 and 8 is the IC 1 under test. It is used to test whether or not it flows to the output terminal of.

The test method will be briefly described.

First, the voltage VT of the voltage source 12 is set to the center voltage value of the logic waveform output to the output terminal of the IC under test 1, and the switches 9A and 9B are turned on.

If the output terminal of the IC1 under test outputs H logic in this state, the voltage of the terminal 1A is biased to the positive side of VT. As a result, the diode D ₂ of the current switching circuit 11
D ₃ is turned on, the terminal 1A of the test IC1 sucks current I _M from the output terminal is connected to a suction current source 8. At this time, the constant current I _p flowing through the outflow current source 7 flows into the voltage source 12 through the diode D ₃ .

When the terminal 1A of the IC under test 1 outputs L logic, the diodes D ₁ and D ₄ are turned on and the current I _p flowing through the outflow current source 7 is turned on.
Flows into the terminal 1A of IC1 under test, and at this time the suction current source 8
The current I _M flowing through is provided by the voltage source 12.

In this way, the direction of the current is switched according to the output state of the terminal 1A of the IC under test 1, and it is tested whether or not the specified current can be taken out from the IC under test in the operating state.

On the other hand, an output characteristic test for testing whether or not the rising and falling speeds of the output signal are higher than a predetermined speed is performed as follows.

At this time, the switches 9A and 9B are turned off and the current switching circuit 11
All of the diodes D _{1 to} D ₄ forming the above are turned off. Instead, the switch 13 is set to ON, the resistive load 14 is connected, and the terminal of the IC under test 1 has a predetermined impedance, for example, 5
Terminate with 0Ω.

In this state, a signal is output from the terminal 1A, the signal waveform is taken into the level comparator 6, the rising and falling speeds of the waveform are measured, and it is tested whether the speed is within the normal range. When the terminal 1A is an input / output terminal, the terminal 1A is controlled to the input state, the signal is input from the drive circuit 5 in this state, the terminal 1A is controlled to the output state, and the response signal is taken out.
The response signal is taken into the level comparator 6 and the rising and falling speeds of the waveform are measured.

When testing the output characteristics, a capacitive load 15 may be connected to the terminal 1A of the IC under test 1. That is, it is tested whether or not the rising and falling speeds of the output waveform are maintained at the prescribed speed or higher even when the capacitive load 15 is connected.

“Problems to be solved by the device” The conventional capacitive load 15 is mounted on the performance board 2. Capacitive load attached to performance board 2
15 can not be removed freely, so capacity load
It is not possible to test the output characteristics without the capacitive load 15 using the performance board 2 with the 15 installed.

To test the output characteristics without the capacitive load 15, a performance board without the capacitive load 15 must be prepared, and the performance board must be replaced for testing.

Furthermore, if you want to change the capacitance value of the capacitance load 15 for testing, you must prepare a performance board to which the capacitance load 15 with various capacitance values is connected.

For this reason, conventionally, there is a drawback that it takes a lot of time and effort to test the output characteristics with and without the capacitive load 15 connected.

Also, since the capacitive load 15 is connected in the middle of the signal path on the performance board 2, signal reflection or the like occurs at the connection point of the capacitive load 15, and the waveform output from the terminal 1A is distorted. Therefore, there is a drawback that the rising and falling speeds cannot be accurately measured.

"Means for solving the problem" In this invention, the output terminal is connected to the IC1 under test on one current output terminal side of the current switching circuit constituting the program load, and the capacitive load is connected to the other current output terminal side. To do.

By connecting the capacitive load to the terminal of the IC under test via the current switching circuit in this way, this current switching circuit can be used as a switch, and the capacitive load is connected to the terminal of the IC under test as necessary. It is possible to control to the separated state and the separated state.

Further, the program load is a circuit existing on the test equipment side. Since the test apparatus has a relatively empty space, a plurality of capacitive loads can be provided, and a switching circuit for selectively connecting the plurality of capacitive loads to the circuit can be provided.

Therefore, according to this invention, the state where the capacitive load is not connected,
The output characteristics with the capacitive load connected can be easily tested. Further, according to this invention, it is possible to test by changing the capacitance value of the capacitive load.

Further, according to this invention, since the capacitive load is connected to the terminal side of the IC under test as viewed from the terminal, the rate of giving distortion to the signal output from the IC under test is small.

Therefore, the measurement error of the rising and falling speeds due to the waveform distortion can be reduced.

"Embodiment" FIG. 1 shows an embodiment of the present invention. In FIG. 1, parts corresponding to those in FIG. 3 are designated by the same reference numerals.

In this invention, one switching terminal 11A of the current switching circuit 11 which constitutes the programmable load is connected to the terminal 1A of the IC1 under test.
Is connected to the IC connection terminal 4A under test, and the other switching terminal 11B is connected to the capacitive load 15. Further, a capacity switching circuit 16 is provided as needed. In this example, the capacity switching circuit 16 has two capacities 16A and 16B and two capacities 16A and 16B for switching terminals 11A and 16B.
It can be configured by switches 17A and 17B connected to B.

Further, in this example, a switch 18 is provided between the switching terminal 11B of the current switching circuit 11 and the voltage source 12, and the switch 18 allows the voltage source 12 to be disconnected from the current switching circuit 11 as needed. There is.

According to the configuration of this invention, the switch 18 is turned on, the DC voltage VT having the center value of the waveform output from the terminal 1A of the IC under test 1 is applied to the current switching circuit 11, and the switches 9A and 9B are turned on. Then, the current input / output characteristic using the program load can be tested as in the conventional case.

That is, it is possible to test whether or not the regulated current can be taken out when the terminal 1A is H logic and L logic.

On the other hand, by setting the switch 18 to OFF and the switch 13 to ON, the terminating resistor 14 is connected, and the IC under test 1
It will be in the state of receiving the output of. In this state, switch 9A
Each diode of current switching circuit 11 if 9B is on
Since D _{1 to} D ₄ are all on, terminal 1A has a capacitive load of 15
And the state in which the capacitance switching circuit 16 is connected is maintained.

Therefore, by outputting a signal from the IC under test, the output signal of the IC under test can be received by the terminating resistor 14, and this voltage signal is taken in by the level comparator 6 to determine its rising and falling speeds. When the terminal 1A is an input / output terminal, the switches 9A and 9B are turned off and all the diodes D _{1 to} D ₄ forming the current switching circuit 11 are turned off when a signal is input from the drive circuit 5. Capacity load 15
Also, the capacitance switching circuit 16 can be separated from the terminal 1A, and the switch 9 is synchronized with the operation of the terminal 1A as an output terminal.
Just turn on A and 9B. Further, even when the terminal 1A operates as an output terminal, the capacitance load 15 and the capacitance switching circuit 16 can be separated from the terminal 1A by turning off the switches 9A and 9B. Therefore, the output characteristics for various capacitance values with no capacitive load, with capacitive load 15, with capacitors 15 and 16A, and with all capacitors 15, 16A and 16B. Can be tested.

FIG. 2 shows a concrete embodiment of this invention. In the figure, 21 is a part that constitutes the switch 9A and the constant current circuit 7, and 22 is a switch.
9B and the part that constitutes the constant current circuit 8.

That is, the transistors Q ₁ , Q ₂ and Q ₃ , Q ₄ are connected in a differential operation, and when the transistors Q ₂ and Q ₄ are on, the current switching circuit 11 is on and the transistors Q ₁ and Q ₃ are on. At this time, the current switching circuit 11 is turned off. Transistor Q ₁
The on / off operation of ~ Q ₄ is performed by the logic signal given to the input terminal 23, and the transistors Q ₁ and Q ₂ are synchronized with the switching of the terminal 1A of the IC under test 1 between the input terminal state and the output terminal state. And Q ₃ and Q ₄ are turned on and off differentially with respect to each other
It is possible to control the state in which 1A, the capacitive load 15 and the capacitance switching circuit 16 are connected to the terminal 1A and the state in which they are disconnected.

In the capacitance switching circuit 16, the transistors Q ₅ and Q ₆ can be turned on by applying an H logic signal to the input terminals 18A and 18B. By turning on the transistors Q ₅ and Q ₆ , the switches 17A and 17B are turned on, and the capacitors 16A and 16B can be added to the capacitive load 15.

“Effect of Device” As described above, according to the device, the capacitive load 15 can be connected to the terminal of the IC under test 1 and disconnected as necessary. Therefore, the output characteristics with and without the capacitive load 15 can be easily tested.

Since the capacitance switching circuit 16 is added, the capacitance value of the load capacitance 15 can be changed, and the output characteristics of various load capacitances can be tested.

Further, in the present invention, since the capacitive load 15 and the capacitance switching circuit 16 are connected to the terminal side away from the IC under test 1, the waveform output is not given to the signal output from the IC under test 1.

Therefore, the waveform distortion is not added to cause an error in the measured values of the rising and falling speeds of the signal, and a highly reliable test can be performed.

In addition, although the case where the diode switch is used as the switches 17A and 17B of the capacitance switching circuit 16 has been described above, a switch element such as a transistor or a FET may be used instead.

[Brief description of drawings]

FIG. 1 is a connection diagram for explaining one embodiment of the present invention,
FIG. 2 is a connection diagram for explaining a concrete embodiment of the present invention, and FIG. 3 is a connection diagram for explaining a conventional technique. 1: IC under test, 1A: IC1 terminal under test, 2: Performance board, 3: Connection means, 4: Test equipment, 4A: IC connection terminal under test, 5: Driving circuit, 6: Level comparator, 7: Outflow current source, 8: suction current source, 9A, 9B: switch, 11: current switching circuit, 11A, 11
B: switching terminal, 12: voltage source, 15: capacitive load, 16: capacitive switching circuit.

Claims (1)

[Scope of utility model registration request] 1. A. Outflow current source for flowing out a constant current and suction current source for sucking a constant current; B. Current switching which is connected between this outflow current source and the suction current source and is constituted by a diode bridge. A circuit, C. a switch that connects and disconnects this current switching circuit with the outflow current source and the suction current source, and D. a device under test connected to one switching terminal of the current switching circuit.
An IC tester consisting of an IC connection terminal and E. a capacitive load connected to the other switching terminal of the current switching circuit above.