JPH0644351B2 - Information recording / reproducing device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to recording or reproducing information by a signal converting means on a disk-shaped record carrier having a track on which information is recorded or a spiral track for recording. Information recording / reproducing apparatus.

2. Description of the Related Art A conventional optical information recording / reproducing apparatus is disclosed in, for example, Japanese Patent Laid-Open No. 59-11547.

Recently, a disk was formed using a photosensitive recording material as a high-density recording technology, the disk was rotated, and light of a laser or the like was focused on the minute diameter of 1 μmφ or less to irradiate the disk with unevenness. Recording or reproducing a signal with high density is performed as a hole shape or a change in shading.

For example, an optical video disc is well known as a device for reproducing a high-density recorded signal in advance in the above techniques.

Further, in the apparatus for making a master disc of a video disc, the above technique for recording the signal is used.

Further, as the target of the recording signal, a video signal, an audio signal, a digital signal, etc. are considered.

In the optical recording / reproducing apparatus, recording of a signal is performed by irradiating a recording thin film on the disk with a laser beam to melt and evaporate a light irradiation portion of the thin film or change reflectance or transmittance of the thin film. Is performed. That is, it is common practice to use the energy of laser light to change the optical characteristics of the recording material.

In order to perform high track density recording on the optical recording disk, a guide track having a groove structure is provided in advance, and a signal is recorded while performing tracking control on the guide track. The guide track reduces the positional deviation of the recording light beam due to the vibration of the device, and enables signal recording to any place on the optical recording disk.

Further, by recording an address peculiar to each track at the time of cutting the master disc of the optical recording disc, it becomes possible to randomly search any of all tracks of the optical recording disc.

The guide track is selected depending on the content of information to be recorded or a signal, but is generally formed in a spiral shape or a concentric shape with respect to the center of the disk.

In terms of track density, spiral tracks are more advantageous than concentric tracks in this track configuration. This is because the continuous feed spiral track generates less vibrations due to the track feed compared to the concentric circle track that the master disc cutting machine has the intermittent feed accuracy, and the play of the feed screw mechanism is less affected. .

However, unlike the case of the concentric track in the optical recording disc of the spiral track, since it is one continuous track on the optical recording disk, it is possible to keep the optical head on the track of the predetermined address compared to the concentric track. It's difficult to do. In order to concentrically track tracks at the same address of the spiral track, it is necessary to forcibly skip the aperture light of the optical head to one track. At this time, when the optical head detects a signal (hereinafter referred to as an index signal) indicating a rotational position provided in advance on the track in the tracking state, a jumping signal having a predetermined amplitude is applied from the outside to perform optical recording. It was shaken in the radial direction of the disc, and when the guide track was disengaged and the next guide track was applied, the brake was applied and the still-played track was replayed again.

However, in the above-mentioned configuration, when the index portion previously provided on the track is scratched or soiled, the reproduced signal causes dropout and the index signal cannot be detected. Then, since the track has a spiral shape, the optical head reproduces the next track, and the still operation becomes impossible.

In view of the above point, the present invention has an object to provide an information recording / reproducing apparatus capable of continuously recording or reproducing a track of a predetermined address on a record carrier having a spiral track.

Means for Solving the Problems The present invention provides a disc-shaped record carrier in which a rotational position signal indicating a rotational position is recorded on a track of recorded signals or a spiral track for recording signals. Rotating means for rotating the record carrier, signal converting means for reproducing or recording a track on the record carrier,
Detecting means for detecting a rotational position signal from the output signal of the signal converting means, storage means for storing the output signal of the detecting means in association with the rotational position of the record carrier, and count for counting the signals stored in the storing means. And an information recording / reproducing apparatus having means.

Operation According to the present invention, while the record carrier makes one rotation by the rotating means, the output signal of the detecting means stored in the storing means is counted by the counting means, and the output of the counting means is other than "1". It is designed to notify the user when it happens.

Embodiments The present invention will be described in detail below with reference to the drawings.

FIG. 9 shows an example of track jumping according to the present invention.
Is a track 2 composed of spiral tracks A, B and C from the inner circumference to the outer circumference, and sector areas S _{1 to} S ₃₂ for recording information, and an index mark area showing the switching of track addresses (one rotation signal). The record carrier is provided with IDMs, sector marks for separating each sector area, and sector mark address areas SNAD _{1 to} SMAD ₃₂ indicating track addresses in advance.

An optical head 3 reproduces a track of the address signal A while tracking the track.

The optical head 3 reproduces the index mark IDM part,
As soon as the index mark is detected, the optical head 3 moves at high speed in the inner diameter direction of the record carrier 1. That is, it is a pattern of a still operation in which jumping is performed by an amount corresponding to one track and the track at the predetermined address A is continuously reproduced.

FIG. 8 is a block diagram of an embodiment of the jumping control system described above. The record carrier 1 is rotated by a motor 4. The reproduction signal obtained from the optical head 3 is amplified by the head amplifier 5, demodulated by the address signal reproduction circuit 6 and taken into the information processing control device 7.

The output of the head amplifier 5 is input to the index mark detection circuit 8. A position detecting element 9 is attached to the motor 4 and detects one pulse signal when the record carrier 1 makes one revolution. This output signal is inputted to the index mark detecting circuit 8. The index signal b detected by the index mark detection circuit 8 is input to the jumping start circuit 10.

When the still command signal a is input from the information processing control device 7, the jumping starting circuit 10 generates a pulse in synchronization with the index mark signal b. This pulse excites the tracking drive coil 12 of the optical head 3 by the optical head drive circuit 11 to move the light beam output of the optical head 3 in the inner diameter direction of the record carrier 1 by one track.

FIG. 1 shows a specific example of the index mark detection circuit 8 shown in FIG. A pulse width detection circuit 13 detects the pulse width of the signal c input from the head amplifier 5 in FIG.
Reference numeral 14 is a counter for counting the number of pulses of the output signal of the pulse width detection circuit 13, 15 is a counter for counting the pulse width of the output signal of the pulse width detection circuit 13, and clears the counter 14 when the count value exceeds a predetermined value. Is connected to the reset terminal of the counter 14.

Reference numeral 16 is a pulse generation circuit that generates a pulse based on the output signal of the counter 14, and the pulse generated by the pulse generation circuit 16 is input to the delay circuit 17 and simultaneously input to the pulse interpolation circuit 18. The delay circuit 17 delays the input signal, and the delayed output signal is transmitted to the memory 19 and the pulse interpolation circuit 18. The output signal b of the pulse interpolation circuit 18 is transmitted to the jumping starting circuit 10 shown in FIG.

Reference numeral 20 denotes a signal e input as a write start command for the memory 19 from the information processing control device 7 in FIG. 8 and an output signal d from the position detecting element 9 in FIG. Memory 1 with digitized signal
It is input to the memory 19 by a gate circuit for creating the write signal of 9. The output signal of the comparison circuit 22 is pulse-shaped by the pulse generation circuit 23 and input to the reset terminal of the counter 24 and the counter 31, respectively. The counter 24 counts the clock signal f input from the information processing control device 7 in FIG. 8 and inputs this count value to the memory 19. The memory 19 is a counter 24
The signal input from the GUT circuit 2 is used as an address value.
Based on the command signal of 0, the signal of the delay circuit 17 is stored, or the stored signal i of the delay circuit 17 is stored in the pulse interpolation circuit.
Input to 18 and counter 31, respectively. The counter 31 counts the signals of the memory 19 and transmits the resulting signal j to the information processing control device 7 in FIG.

FIG. 2 shows a concrete example of the pulse interpolation circuit 18 shown in FIG. Reference numeral 25 is a flip-flop, the signal i output from the memory 19 of FIG. 1 is input to the D terminal, and the Q output is transmitted to the D terminal of the flip-flop 26 and one of the AND circuits 29, respectively. The output of the flip-flop 25 is connected to one of the NAND circuits 27. The Q output of the flip-flop 26 is connected to the other of the NAND circuits 27, and the output of the NAND circuit 27 is connected to the reset terminal of the flip-flop 28. The D terminal of the flip-flop 28 is connected to the power supply VDD, and the output signal g of the bolus generation circuit 16 of FIG. 1 is input to the clock terminal c. The output of the flip-flop 28 is input to the other of the AND circuits 29, and the AND circuit 2
The output of 9 is input to one side of the OR circuit 30, and the output signal h of the delay circuit 17 of FIG. 1 is input to the other side of the OR circuit 30. The output signal b of the OR circuit 30 is transmitted to the jumping start circuit 10 of FIG. 8 as the output signal of the index mark detection circuit 8 of FIG.

FIG. 3 shows a concrete example of the counter 31 shown in FIG.
Reference numeral 32 denotes a flip-flop, the signal i read from the memory 19 of FIG. 1 is input to the T terminal, and the Q output is the T input terminal of the flip-flop 33 and the flip-flop 3.
7 D input terminals. The Q output of the flip-flop 33 is input to the C input terminal of the flip-flop 34, and the output of the flip-flop 34 is the AND circuit 35.
In addition, the Q output of the flip-flop 37 is output to the AND circuit 35, and the output of the AND circuit 35 is D of the flip-flop 38.
Each is connected to the input terminal. The signal R output from the pulse generation circuit 23 of FIG. 1 is supplied to the inverter 36 and the C input terminal of the flip-flop 37, and the inverter 3
The output of 6 is the R of each of the flip-flops 32 and 33.
It is connected to the input terminal.

The signal j of the Q output of the flip-flop 38 is connected to the information processing control device 7 of FIG. 8, and the D input terminal of the flip-flop 34 is connected to the power supply V _CC .

The operation of the information recording / reproducing apparatus of this embodiment configured as described above will be described below.

In the reproduction state in which the signal recorded on the record carrier 1 is reproduced by the optical head 3, the information processing control device 7 of FIG. 8 first outputs a memory writing start command signal e to the index mark detection circuit 8. The gate circuit 20 is
The output signal d of the position detecting element 9, which generates one pulse when the record carrier 1 makes one rotation, is stored in the memory while the first pulse and the second pulse are input through the amplifier 21 and the comparison circuit 22. The logic “1” is output to 19. Then, the memory 19 enters the write state and stores the output signal of the delay circuit 17.

Here, a method of detecting the index mark will be described. The optical head 3 is the record carrier 1 index area (iD
When M) is reproduced, the signal is reproduced according to the unevenness of the index area, and after being amplified by the head amplifier 5,
FIG. 1 is input to the pulse width detection circuit 13. The pulse width detection circuit 13 detects the width of the input pulse, and outputs the pulse if it is equal to the pulse width of the index mark,
If they are not equal, no pulse is output. The pulse generated by the pulse width detection circuit 13 is counted by the counter 14, and the counter 14 transmits a signal to the pulse generation circuit 16 when a predetermined number of pulses are continuously input, and the pulse generation circuit 16 generates an index mark pulse. To do. When the pulse of the output signal of the pulse width detection circuit 13 is defective, the counter 14 is reset by the output signal of the counter 15. Therefore, the index mark can be detected from the signal reproduced from the record carrier 1.

The signal generated by the pulse generation circuit 16 is delayed by the delay circuit 17 and stored in the memory 19.

Therefore, the memory 19 stores the signal obtained by reproducing the record carrier 1 and delaying the index pulse for one rotation of the record carrier 1 in relation to the signal obtained from the position detection element 9. become. The operation waveforms of the respective parts at this time are shown in FIG. 4, where (1) is the output waveform of the head amplifier 5 of FIG. 8, (2) is the output waveform of the counter 14 of FIG. 1, and (3) is the pulse generation circuit 16 of FIG. Output waveform, (4) output waveform of delay circuit 17, (5) output waveform of amplifier 21, (6) comparison circuit 22
Output waveform, (7) is the output waveform of the pulse generation circuit 23, (8)
Is the output command signal of the information processing control device 7 of FIG. 8, and (9) is the output waveform of the gate circuit 20.

After being stored in the memory 19 in this way, the index mark which is the output signal of the head amplifier 5 in FIG.
When SM ₁ ′ is defective, the flip-flop 28 is not set and the output remains the logic “1”, and the signal i read from the memory 19 of FIG. 1 is the flip-flop 25, the AND circuit 29, It is output to b via the OR circuit 30. The operation waveforms of each part at this time are shown in FIG.
(1) is the output waveform of the head amplifier 5 of FIG. 8, (2) is the output waveform of the counter 14 of FIG. 1, (3) is the output waveform of the pulse generation circuit 16, and (4) is the output waveform of the delay circuit 17. , (5) is the output waveform of the Q terminal of the flip-flop 25 in FIG. 2, (6) is the output waveform of the terminal of the flip-flop 28, and (7) is the NA.
The output signal of the ND circuit 27, (8) is the output signal of the AND circuit 29, and (9) is the output signal of the OR circuit 30.

Therefore, the jumping starting circuit 10 shown in FIG. 8 is obtained by interpolating the index signal with the signal output from the memory 19 and inputting it.

In the above description, the signal of the pulse generation circuit 16 is changed to the delay circuit 1
It is stored in the memory 19 after being delayed by 7 and operates so as to interpolate only when the index signal is defective. However, when the index signal is stored in the memory 19, the pulse width detection circuit 13, the counter 14, the counter 14,
15. If an index mark is not detected by the index detecting means composed of the pulse generating circuit 16, or if the index detecting means erroneously detects two or more pulses due to noise or the like, the accurate still operation cannot be performed. To prevent this, the record carrier 1
When a signal is stored in the memory 19 during one rotation of, the signal to be stored, that is, the output signal of the delay circuit 17 may be counted. First, the operation of the index detecting means for erroneously detecting two pulses will be described. When the memory 19 is stored, the signal of the delay circuit 17 is transmitted through the memory 19 to the T input of the flip funnel 32 of FIG. It is input to the terminal. When the first index mark is detected and input to the flip-flop 32 via the delay circuit 17 and the memory 19, the flip-flop 32 is set and the Q output becomes the logic "1". When an erroneous second index mark is detected thereafter, the delay circuit 1
7, the data is input to the flip-flop 32 via the memory 19, the Q output of the flip-flop 32 changes from logic "1" to "0", and this signal is input to the T input terminal of the flip-flop 33. The flip-flop 33 sets the Q output to the logic "1" when the signal at the T input terminal becomes the logic "0". Since the Q output of the flip-flop 33 is input to the C input terminal of the flip-flop 34, the flip-flop 34 changes its output from the logic "1" to "0" at the same time that the C input terminal becomes the logic "1". When the output of the flip-flop 34 becomes logic "0", the AND circuit 35
Output becomes a logic "0", and the AND circuit 35 inputs the logic "0" to the information processing control device 7.

When the motor 4 rotates and the position detecting element 9 detects the position signal and is input to the amplifier 21, the comparison circuit 22, and the pulse generation circuit 23, the pulse generation circuit 23 generates the pulse signal R and the C input terminal of the flip-flop 37. To enter. Since the flip-flop 37 latches the level of the D input terminal when the signal input to the C input terminal becomes the logical "1", the Q output becomes the logical "0".

As a result, the signal j of the AND circuit 35 continues to be in the state of logic "0", so that the information processing control device 7 detects that it is in an abnormal state. An operation waveform diagram of each part of the above operation is shown in FIG. 6, where (1) is the output waveform of the comparison circuit 22, (2) is the output waveform of the pulse generation circuit 23, (3) is the output waveform of the delay circuit 17,
(4) is the output waveform of the flip-flop 32, (5) is the output waveform of the flip-flop 33, (6) is the flip-flop 37
Is the output waveform of the AND circuit, and (7) is the output waveform of the AND circuit 35.

Next, the operation when the signal of the delay circuit 17 is stored in the memory 19 and the index detection means does not detect the index mark due to dropout will be described. When the information processing control device 7 of FIG. 8 outputs a memory write start command e to the gate circuit 20 of the index mark detection circuit 8, the gate circuit 20 outputs the output of the position detection element 9 via the amplification circuit 21 and the comparison circuit 22. When input, it outputs logic "1" to the memory 19 and the memory 1
9 is set to the writing state. After that, the motor 4 rotates and 1
The output of the position detecting element 9 after the rotation is transmitted to the gate circuit 20 and the pulse generating circuit 23 via the amplifier circuit 21 and the comparing circuit 22. The gate circuit 20 outputs a logic "0" to the memory 19, and the memory 19 stops the writing state. The signal R of the pulse generation circuit 23 is input to the C input terminal of the flip-flop 37,
Latches the state of the D input terminal when the C input terminal rises. Since the D input terminal is logic "0", the Q output of the flip-flop 37 is logic "O", and this output is input to the information processing control device 7 via the AND circuit 35. The operation waveform diagram of each part of the above operation is shown in FIG.
(1) is a signal e input to the gate circuit 20 from the information processing controller 7, (2) is an output waveform of the comparison circuit 22, (3) is an output waveform of the pulse circuit, and (4) is a gate circuit. 20 is an output waveform, (5) is an output waveform of the Q output terminal of the flip-flop 37, and (6) is an output waveform of the AND circuit 35.

As described above, when the logic “0” is input to the information processing control device 7 from the AND circuit 35, the information processing control device 7 detects an abnormality and stops this device or turns on the lamp, Or, re-store it in the memory.

As described above, according to the present invention, when the reproduced index signal is stored in the memory provided for interpolating when the reproduced index signal is defective due to dust or dirt on the record carrier, the reproduced index signal is If there is a defect, or if two or more are detected, an abnormal condition is notified, or the memory is re-executed, so that even if the index signal is defective, interpolation can be accurately performed and the still operation is more stable. It can be done and the effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of an index mark detection circuit of an information recording / reproducing apparatus of an embodiment of the present invention, FIG. 2 is a circuit diagram showing a concrete example of a pulse interpolation circuit, and FIG. 3 is a circuit showing a concrete example of a counter. FIG. 4, FIG. 5, FIG. 5, FIG. 6, and FIG. 7 are operation waveform diagrams necessary for explaining the present invention, and FIG.
FIG. 9 is a block diagram showing an embodiment of a jumping control system, and FIG. 9 is a diagram for explaining a track jump operation. 8 ... Index mark detection circuit, 9 ... Position detection element, 19 ... Memory, 20 ... Gate circuit, 23 ...
Pulse generation circuit, 24 ... Counter, 31 ... Counter, 32, 33, 34, 37 ... Flip-flop,
35 ... AND circuit, 36 ... Inverter.

Claims (2)

[Claims] 1. A disk-shaped record carrier on which a rotational position signal indicating a rotational position is recorded on a track of a recorded signal or a spiral track for recording the signal, and a rotating means for rotating the record carrier. A signal converting means for reproducing or recording on the track, a detecting means for detecting a rotational position signal from an output signal of the signal converting means, and an output signal of the detecting means and a rotational position of the record carrier for the rotating means. Storage means for storing in association with a pulse signal for each one rotation, and when the detection means does not detect a rotation position signal during one rotation of the record carrier, the rotation position is stored by the signal stored in the storage means. An information recording / reproducing apparatus characterized by interpolating a signal. 2. The memory means counts the number of times of storing the output signal of the detecting means during one rotation of the record carrier, and when the count number is other than 1, it is judged that the memory is abnormal. The information recording / reproducing apparatus according to claim 1, wherein a re-storing operation is performed or an abnormal state is notified.