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JPH0626201B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JPH0626201B2
JPH0626201B2 JP62259998A JP25999887A JPH0626201B2 JP H0626201 B2 JPH0626201 B2 JP H0626201B2 JP 62259998 A JP62259998 A JP 62259998A JP 25999887 A JP25999887 A JP 25999887A JP H0626201 B2 JPH0626201 B2 JP H0626201B2
Authority
JP
Japan
Prior art keywords
resist layer
ion implantation
substrate
resist
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62259998A
Other languages
Japanese (ja)
Other versions
JPH01101633A (en
Inventor
修三 藤村
順一 今野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62259998A priority Critical patent/JPH0626201B2/en
Priority to US07/243,907 priority patent/US4861732A/en
Priority to EP88115352A priority patent/EP0311817B1/en
Priority to DE3851029T priority patent/DE3851029T2/en
Priority to KR1019880013427A priority patent/KR920003310B1/en
Publication of JPH01101633A publication Critical patent/JPH01101633A/en
Publication of JPH0626201B2 publication Critical patent/JPH0626201B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • G03F7/422Stripping or agents therefor using liquids only
    • G03F7/425Stripping or agents therefor using liquids only containing mineral alkaline compounds; containing organic basic compounds, e.g. quaternary ammonium compounds; containing heterocyclic basic compounds containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/3115Doping the insulating layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/083Ion implantation, general

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Weting (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Description

【発明の詳細な説明】 〔概要〕 本発明はレジスト層をマスクとしてイオン注入する工程
を有する半導体装置の製造方法に関し、 イオン注入後不要となったレジスト層を除去した後基板
上に残されるレジスト剥離残渣を少なくすることを目的
とし、 レジスト層の除去にあたり、まずイオン注入中にレジス
ト層表面に付着した無機汚染物をエッチングして除去
し、しかる後、プラズマを照射してレジスト層を分解し
て除去するようにしたものである。
DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a method for manufacturing a semiconductor device having a step of ion-implanting using a resist layer as a mask, which is a resist left on a substrate after removing an unnecessary resist layer after ion-implantation. In order to reduce the amount of peeling residue, when removing the resist layer, first, the inorganic contaminants adhering to the resist layer surface during ion implantation are removed by etching, and then plasma is irradiated to decompose the resist layer. It is designed to be removed.

〔産業上の利用分野〕[Industrial application field]

本発明は、半導体装置の製造方法に係り、特にイオン注
入の工程でマスクとして用いたレジスト層を除去する方
法に関する。
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for removing a resist layer used as a mask in an ion implantation process.

近年、半導体集積回路(IC)の高密度化・高集積化に
伴って、その構成要素たる半導体素子や配線構造の微細
化が進められた結果、その最小部分の寸法が1μm以下
のものが実用化されるに至っている。この微細化に伴
い、製造工程におけるミクロンオーダーの微細なゴミな
どの付着物や汚染物の量の多少が、ICの製造歩留りを
左右するようになってきたため、各工程において付着物
・残渣・汚染物などを極力少なくすることが要求されて
いる。
In recent years, as semiconductor integrated circuits (ICs) have become higher in density and higher in integration, miniaturization of semiconductor elements and wiring structures as constituent elements has been advanced. As a result, those having a minimum part size of 1 μm or less are practical. It has been converted to. Along with this miniaturization, the amount of adhered substances such as micron-sized dust and contaminants in the manufacturing process has come to influence the manufacturing yield of ICs. It is required to reduce the number of things as much as possible.

イオン注入による不純物導入の工程においても、イオン
注入中の汚染を少なくするだけでなく、その後のイオン
注入のマスクを除去する工程においてもその残渣を少な
くすることが求められている。
In the step of introducing impurities by ion implantation, it is required not only to reduce the contamination during the ion implantation but also to reduce the residue thereof in the step of removing the mask for the subsequent ion implantation.

〔従来の技術〕[Conventional technology]

イオン注入法では、他の不純物導入法−例えば熱拡散法
−のようにマスクをつけた基板を高温に熱する必要がな
いので、そのマスクにフォトレジストなどの有機レジス
ト層を用いることが広く行われている。
In the ion implantation method, since it is not necessary to heat the masked substrate to a high temperature unlike other impurity introduction methods such as thermal diffusion method, it is widely used to use an organic resist layer such as photoresist for the mask. It is being appreciated.

イオン注入後、不要となったレジスト層のマスクを除去
しなくてはならないが、イオン注入されたレジスト層は
その一部が炭化するなどして剥離しにくくなることが知
られている。(Kelvin J.Orvek and Craig Huffman;
“CARBONIZED LAYERFORMATION IN ION IMPLANTED PHOTO
RESIST MASKS”,Nuclear Instruments and Methods in
physics Research B7/8(1985) 501-506.) レジスト剥離液を用いるウェット法では、炭化したレジ
ストを除去することができないので、イオン注入後のレ
ジスト層の剥離には、一般に、酸素(O2)プラズマを
照射して有機物のレジストのみならずレジストが炭化し
て出来た炭素をも酸化して除去するO2プラズマ・アッ
シング法が用いられている。
After the ion implantation, it is necessary to remove the mask of the resist layer that has become unnecessary, but it is known that the ion-implanted resist layer is less likely to be peeled off because it is partially carbonized. (Kelvin J. Orvek and Craig Huffman;
"CARBONIZED LAYERFORMATION IN ION IMPLANTED PHOTO
RESIST MASKS ”, Nuclear Instruments and Methods in
physics Research B7 / 8 (1985) 501-506.) Since the carbonized resist cannot be removed by the wet method using a resist stripping solution, generally, oxygen (O 2 The O 2 plasma ashing method is used to oxidize and remove not only the organic resist but also carbon produced by carbonization of the resist by irradiating plasma.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

2プラズマ・アッシングにより、確かに、炭化したレ
ジストをも除去できるのであるが、ホウ素(B)や砒素
(As)のイオンを、ドーズ量が1x1014/cm2以上と高
濃度にイオン注入した場合は、O2プラズマ・アッシン
グによっても多量のレジスト剥離残渣を生ずるという問
題点があった。
Although it is possible to remove carbonized resist by O 2 plasma ashing, boron (B) and arsenic (As) ions are ion-implanted at a high concentration of 1 × 10 14 / cm 2 or more. In this case, there is a problem that a large amount of resist peeling residue is generated even by O 2 plasma ashing.

アルゴン(Ar)をイオン注入した場合は残渣が少ないこ
とから、この原因の一つは、マスクに打ち込まれた不純
物自身がO2プラズマ・アッシング時に酸化されて不揮
発性の酸化物をつくるためであろうと考えられる そこでBやAsをも揮発性の水素化合物にして除去すべ
く、酸素は含まずに水素を含有するプラズマ−例えば窒
素・水素混合ガスプラズマなど−を用いる方法が開発さ
れた。
One of the causes for this is that the impurities themselves implanted in the mask are oxidized during O 2 plasma ashing to form a non-volatile oxide, because the residue is small when argon (Ar) is ion-implanted. Therefore, in order to remove B and As also as volatile hydrogen compounds, a method using a plasma containing hydrogen but not oxygen, such as a nitrogen-hydrogen mixed gas plasma, has been developed.

この方法によって、BやAsを高濃度イオン注入した場合
でも、レジスト剥離残渣をArのイオン注入の時と同程度
にまで減少させることができるようになったが、しかし
ながら、なおその大きさが1μm以上の残渣が1cm2
たり〜104個残ってしまうという問題があった。
By this method, even when high-concentration ion implantation of B or As is performed, the resist stripping residue can be reduced to the same level as in the case of Ar ion implantation. However, the size is still 1 μm. There was a problem that the above-mentioned residue remained at about 10 4 per 1 cm 2 .

このような残渣が何であるのかについては、今まで知ら
れていなかった。そこで、レジスト層マスクを有するシ
リコン(Si)基板にArイオンを1x1017/cm2イオン注
入したのちO2プラズマを照射してレジスト層を除去し
た後にSi基板上に残って残渣を、オージェ電子分光(A
ES)法で分析したところ、第2図に示したごとく、残
渣にC,Al,Al2O3 が含まれていることがわかった。
Until now, it was unknown what such residues were. Therefore, after implanting 1 × 10 17 / cm 2 Ar ions into a silicon (Si) substrate having a resist layer mask and irradiating O 2 plasma to remove the resist layer, the residue remaining on the Si substrate is removed by Auger electron spectroscopy. (A
When analyzed by the ES method, it was found that the residue contained C, Al and Al 2 O 3 , as shown in FIG.

残渣を生じるAl,Al2O3 が工程のどの段階で入ってくる
のかが、次ぎの問題であるが、レジスト層を付けただけ
の状態でO2プラズマ・アッシングした場合は、残渣の数
は、1cm2あたり〜102個のオーダーで、イオン注入した
ときの1/100 程度であるから、Al,Al2O3 がレジスト
に起因するとは到底考えられない。
The next issue is which stage of the process where Al and Al 2 O 3 that generate residues enter, but when O 2 plasma ashing is performed only with the resist layer, the number of residues is , 1 cm 2 per 10 two orders, because it is about 1/100 when the ion implantation, Al, Al 2 O 3 is not considered hardly has to be due to the resist.

さて、酸素を〜1x1018/cm2程度イオン注入した時、
イオン注入装置の構成材料であるAlが加速イオンによっ
てスパッタされ、基板にAlが付着するという報告があ
る。(S.Nakashima,I.Kawashima and K.Izumi ;“AN A
NALYSYS OF CONTAMINATION IN HIGH-DOSE OXYGEN ION I
MPLANTATION AND A CONTAMINATION-PROOF TECHNIQU
E”,Proc,9th Symp.on ISIAT'85 (1985)203-206.) そこで、シリコン基板にArイオンを1x1017/cm2イオ
ン注入して、その前後でAES分析を行いAESスペク
トルを比較してみた。第3図(a)のごとくイオン注入
前では、基板の表面にSi,C,Oしか検出されないの
に、イオン注入後の表面には、Alが検出された(第3
(b))。なお、Alのほかに、PとAsが検出されたが、
これは、この実験にさきだって同じ装置をPやAsなどの
イオン注入に使用したため、イオン注入装置内部がこれ
らによって汚染されたことに起因するものと考えられ
る。
Now, when oxygen is ion-implanted at about 1 × 10 18 / cm 2 ,
It has been reported that Al, which is a constituent material of the ion implanter, is sputtered by accelerated ions and Al adheres to the substrate. (S.Nakashima, I.Kawashima and K.Izumi ; “AN A
NALYSYS OF CONTAMINATION IN HIGH-DOSE OXYGEN ION I
MPLANTATION AND A CONTAMINATION-PROOF TECHNIQU
E ”, Proc, 9th Symp.on ISIAT'85 (1985) 203-206.) Therefore, Ar ions were implanted into a silicon substrate at 1 × 10 17 / cm 2 and AES analysis was performed before and after that, and AES spectra were compared. As shown in Fig. 3 (a), before the ion implantation, only Si, C, and O were detected on the surface of the substrate, but Al was detected on the surface after the ion implantation (the third).
(B)). In addition to Al, P and As were detected,
It is considered that this is because the same device was used for ion implantation of P, As, etc. before this experiment, and the inside of the ion implantation device was contaminated by these.

また、レジスト層を付けたシリコン基板についてArのイ
オン注入の前後でレジスト層の表面をX線光電子分光
(XPS)法によって分析したところ、この場合もやは
り、イオン注入前のレジスト層の表面にはAlは検出され
なかったが、イオン注入後のレジスト層の表面では、第
4図(a)ならびに(b)に示すごとく、Alが検出され
た。その結合状態から、Alの大部分はAl2O3 になってい
るものと考えられる。なお、XPSスペクトルには、Al
のほかにAs,P,Sなども見られるが、これらは、先に
のべたように、イオン注入装置内がAs,P,Sなどによ
って汚染され、装置内に付着していた汚染物がArイオン
注入時にイオン衝撃によってスパッタされてレジスト層
に再付着したものと考えられる。
In addition, when the surface of the resist layer was analyzed by X-ray photoelectron spectroscopy (XPS) before and after the ion implantation of Ar on the silicon substrate with the resist layer attached, in this case as well, the surface of the resist layer before the ion implantation was Although Al was not detected, Al was detected on the surface of the resist layer after the ion implantation as shown in FIGS. 4 (a) and 4 (b). From the bonding state, most of Al is considered to be Al 2 O 3 . In addition, in the XPS spectrum, Al
In addition to As, P, S, etc. are also seen. As mentioned above, these are contaminated with As, P, S, etc. in the ion implantation device, and the contaminants attached to the device are Ar. It is considered that the ions were sputtered by ion bombardment during ion implantation and redeposited on the resist layer.

更に、レジスト層の表面からスパッタ・エッチングしつ
つXPS分析を行った結果、Alは表面から約250Å以
内の領域にのみ存在することが明らかになった。
Further, as a result of XPS analysis while sputtering / etching from the surface of the resist layer, it was revealed that Al exists only in a region within about 250 Å from the surface.

BイオンおよびAsイオンをイオン注入したものについて
もAES分析・XPS分析を行ってみたがArのイオン注
入の場合と同様な結果を得た。
AES and XPS analyzes were also performed on those implanted with B ions and As ions, but the same results as in the case of Ar ion implantation were obtained.

以上の結果を考えあわせてみると、イオン注入中にレジ
スト層の表面に、イオン注入装置の構成部材からスパッ
タされたAlやAl2O3 などの無機汚染物が付着し、これら
はO2プラズマや水素含有プラズマを照射しても揮発性
化合物にならないため、プラズマ処理の後、基板上に残
渣として残ってしまうものと考えられる。
Considering the above results together, during the ion implantation, inorganic contaminants such as Al and Al 2 O 3 which are sputtered from the constituent members of the ion implantation device adhere to the surface of the resist layer, and these are O 2 plasma. It is considered that after irradiation with plasma or hydrogen-containing plasma, it does not become a volatile compound, and thus remains as a residue on the substrate after the plasma treatment.

本発明は、このような点に鑑みて創作されたもので、イ
オン注入のマスクとして用いたレジスト層の除去におい
てレジスト剥離残渣を少なくし、もって、ICなど半導
体装置の製造歩留りを向上させる方法を提供すること
を、その目的とする。
The present invention has been made in view of the above circumstances, and provides a method for reducing the resist peeling residue in the removal of the resist layer used as a mask for ion implantation, thereby improving the manufacturing yield of semiconductor devices such as ICs. The purpose is to provide.

〔問題を解決するための手段〕[Means for solving problems]

その目的は、イオン注入のマスクとして用いたレジスト
層を除去するにあたり、まず、イオン注入装置内から発
生し、且つ基板およびレジスト層の表面に付着したAl
やAlなどを含む無機汚染物をエッチングして除
去し、しかる後、プラズマ照射してレジスト層を分解除
去することによって、達成される。
The purpose of removing the resist layer used as a mask for ion implantation is to first generate Al generated in the ion implantation apparatus and adhering to the surfaces of the substrate and the resist layer.
This can be achieved by etching away inorganic contaminants including Al 2 O 3 and Al 2 O 3 and then removing the resist layer by plasma irradiation.

〔作用〕[Action]

先に述べたように、イオン注入中にレジスト層の表面に
付着する無機汚染物の主成分はAlやAl2O3 であるので、
アルカリ性エッチング液などで処理することにより、こ
れを除去することができる。
As described above, since the main components of the inorganic contaminants that adhere to the surface of the resist layer during ion implantation are Al and Al 2 O 3 ,
This can be removed by treating with an alkaline etching solution or the like.

残っている有機物のレジスト層やその炭化物さらにレジ
スト層に打ち込まれたBやAsなどの不純物は、プラズマ
を照射することにより揮発性化合物にされて分解除去さ
れる。
The remaining organic resist layer and its carbide, and impurities such as B and As implanted in the resist layer are decomposed and removed into volatile compounds by irradiation with plasma.

こうすることにより、従来の方法のように、無機汚染物
が残渣として残ることがないので、レジスト剥離残渣を
少なくすることができる。
By doing so, the inorganic contaminants do not remain as a residue as in the conventional method, so that the resist peeling residue can be reduced.

なお、レジスト層の表面に付着した無機汚染物のエッチ
ングに、スパッタ・エッチングをもちいる方法もある
が、この方法だとレジスト層で覆われていない基板の表
面がイオン衝撃によってダメージを受けるおそれがあ
り、また、基板の表面に付着した無機汚染物がイオン衝
撃によって逆に基板の中に押し込まれるおそれがある。
エッチング液を用いて無機汚染物を溶解させて除去すれ
ば、基板にダメージが入ったりすることはない。
There is also a method of using sputter etching to etch the inorganic contaminants adhering to the surface of the resist layer, but this method may damage the surface of the substrate not covered with the resist layer by ion bombardment. There is also a risk that inorganic contaminants adhering to the surface of the substrate will be pushed into the substrate by ion bombardment.
If the inorganic contaminants are dissolved and removed by using an etching solution, the substrate will not be damaged.

〔実施例〕〔Example〕

本発明の一実施例について、第1図を参照して以下に詳
しく説明する。第1図は本発明の一実施例の工程図で、
図中、1は基板、2はレジスト層、3はレジスト炭化
層、4は無機汚染物、5は不純物イオン、6はプラズマ
である。
One embodiment of the present invention will be described in detail below with reference to FIG. FIG. 1 is a process chart of one embodiment of the present invention.
In the figure, 1 is a substrate, 2 is a resist layer, 3 is a resist carbonized layer, 4 is an inorganic contaminant, 5 is impurity ions, and 6 is plasma.

直径4インチの面方位(100)のシリコン基板1の上
に市販のポジ型フォトレジストHPR-204 (フジ・ハント
社製)を厚さ2μmに公知のスピン・コーティング法に
より塗布した後、乾燥窒素ガス雰囲気中でホットプレー
トを用いて140℃で2分間ベークして、レジスト層2
を形成した。(第1図(a))。ついでレジスト層の表
面にArイオンを、加速エネルギー70 kev,ドーズ量1x
1017/cm2の条件でイオン注入した。このイオン注入に
よって、レジスト層が炭化されレジスト炭化層3が形成
されるとともに、その表面にAlやAl2O3 などから成る無
機汚染物4が付着する。(第1図(b))。レジスト層
2の除去にあたり、まず始めに、38%NHOH 10
cc を脱イオン水1で希釈したエッチング液に5分間
浸した後、脱イオン水で10分間バブル洗浄し、乾燥窒素
ガスを吹きつけて乾燥させた。AlやAl2O3 はNHOH
に溶けるので、イオン注入中に付着した無機汚染物4が
除去される。このエッチングの工程では、効率をあげる
ために超音波を印加するなどすることが好ましい。この
後、公知のバレル型高周波プラズマ・アッシャーを用
い、O2流量 200 sccm,圧力1Torr,周波数 13.56 MH
z,高周波入力 300Wの条件で60分間O2プラズマ処理
して(第1図(d))、レジスト炭化層3およびレジス
ト層2を除去した(第1図(e))。
Commercially available positive photoresist HPR-204 (manufactured by Fuji Hunt Co., Ltd.) was applied to a thickness of 2 μm on a silicon substrate 1 having a diameter of 4 inches and a surface orientation (100) by a known spin coating method, and then dried nitrogen was used. The resist layer 2 was baked by baking at 140 ° C. for 2 minutes in a gas atmosphere using a hot plate.
Was formed. (FIG. 1 (a)). Next, Ar ions were applied to the surface of the resist layer at an acceleration energy of 70 kev and a dose of 1x.
Ions were implanted under the condition of 10 17 / cm 2 . By this ion implantation, the resist layer is carbonized to form the resist carbonized layer 3, and at the same time, the inorganic contaminant 4 made of Al, Al 2 O 3 or the like is attached. (FIG. 1 (b)). In removing the resist layer 2, first, 38% NH 4 OH 10 was used.
After cc was immersed in an etching solution diluted with deionized water 1 for 5 minutes, it was bubble washed with deionized water for 10 minutes and dried by blowing dry nitrogen gas. Al and Al 2 O 3 are NH 4 OH
, The inorganic contaminants 4 attached during the ion implantation are removed. In this etching step, it is preferable to apply ultrasonic waves to improve efficiency. Then, using a known barrel type high frequency plasma asher, O 2 flow rate 200 sccm, pressure 1 Torr, frequency 13.56 MH
O 2 plasma treatment was performed for 60 minutes under the conditions of z and high frequency input of 300 W (FIG. 1 (d)) to remove the resist carbonized layer 3 and the resist layer 2 (FIG. 1 (e)).

レジスト層除去後、市販のパーティクル・カウンター
(WIS-150 ;Aeronca Electronics Inc.製)を用いて基
板1上の大きさが1μm以上の異物の数を数えたとこ
ろ、1cm2あたり平均4385個であった。なお、他の条件
は全く同じにして、O2プラズマ処理だけでレジスト層
の除去をした場合は、1cm2あたり平均5788個であった
から、本発明の効果は歴然としている。パーティクル・
カウンターの計数値には、O2プラズマ処理後に基板に
付着したゴミや基板のキズの数も含まれているので、本
発明の方法によって、レジスト剥離残渣は、従来の方法
に比べて3/4以下になったものと考えよれる。また、
エッチング液として希釈アンモニア水のかわりに0.2
NのKOH水溶液を用いても、ほぼ同様の結果が得られ
た。
After removing the resist layer, the number of foreign particles having a size of 1 μm or more on the substrate 1 was counted by using a commercially available particle counter (WIS-150; manufactured by Aeronca Electronics Inc.), and the average was 4385 per 1 cm 2. It was In addition, when the resist layer was removed only by the O 2 plasma treatment under the same other conditions, the average number of the resist layers was 5788 per 1 cm 2 , so that the effect of the present invention is clear. particle·
Since the count value of the counter also includes the number of dust and scratches on the substrate after the O 2 plasma treatment, the resist stripping residue by the method of the present invention is 3/4 that of the conventional method. It is thought that it became the following. Also,
0.2 as an etching solution instead of diluted ammonia water
Almost the same result was obtained by using an aqueous KOH solution of N.

エッチング液の濃度やエッチング時間は、イオン注入の
ドーズ量などに合わせて最適化をはかれば良いことは、
いうまでもない。また、エッチング液としては、基板を
おかさずに無機汚染物を溶解しうるものであればよく、
例えばリン酸を含有するエッチング液なども用いること
ができる。さらに、基板のダメージが無視できるような
場合には、スパッタ・エッチングを用いることもでき
る。本発明の効果は、イオン注入する不純物の種類やマ
スクに用いるレジストの種類によらないことも、本発明
の原理から明らかである。
The concentration of the etching solution and the etching time should be optimized according to the dose of ion implantation, etc.
Needless to say. Further, the etching solution may be any one as long as it can dissolve inorganic contaminants without disposing the substrate,
For example, an etching solution containing phosphoric acid can also be used. Furthermore, sputter etching can be used when damage to the substrate can be ignored. It is also clear from the principle of the present invention that the effect of the present invention does not depend on the type of impurities to be ion-implanted or the type of resist used for the mask.

〔発明の効果〕〔The invention's effect〕

本発明によれば、レジスト層をマスクとしてイオン注入
した後、不要となったレジスト層を除去する際に基板上
に残るレジスト剥離残渣を少なくすることができるの
で、ICなど半導体装置の製造歩留りが向上するという
効果がある。
According to the present invention, after the ion implantation using the resist layer as a mask, it is possible to reduce the resist peeling residue remaining on the substrate when removing the unnecessary resist layer, so that the manufacturing yield of semiconductor devices such as ICs can be improved. It has the effect of improving.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の工程図、第2図はレジスト
剥離残渣のAESスペクトルの一例を示す図、第3図は
イオン注入前後の基板表面のAESスペクトルの比較
図、第4図はイオン注入したレジスト層表面のXPSス
ペクトルの一例を示す図である。 図において、 1は基板、2はレジスト層、 3はレジスト炭化層、4は無機汚染物、 5は不純物イオン、6はプラズマ である。
FIG. 1 is a process diagram of an embodiment of the present invention, FIG. 2 is a diagram showing an example of AES spectrum of a resist stripping residue, FIG. 3 is a comparison diagram of AES spectra of a substrate surface before and after ion implantation, and FIG. FIG. 4 is a diagram showing an example of an XPS spectrum of a surface of a resist layer after ion implantation. In the figure, 1 is a substrate, 2 is a resist layer, 3 is a resist carbonized layer, 4 is an inorganic contaminant, 5 is an impurity ion, and 6 is a plasma.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/306 T 9278−4M ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 21/306 T 9278-4M

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板1の一主面上に形成したレジスト層2
をマスクとして前記基板1にイオン注入した後、イオン
注入中にイオン注入装置内から発生し、且つ前記基板1
および前記レジスト層2の表面に付着した無機汚染物4
をエッチング液を用いて除去し、しかる後、プラズマを
照射して前記のレジスト層2を除去する工程を有するこ
とを特徴とする半導体装置の製造方法。
1. A resist layer 2 formed on one main surface of a substrate 1.
After the ions are implanted into the substrate 1 using the mask as a mask, the ions are generated from inside the ion implantation apparatus during the ion implantation, and the substrate 1
And inorganic contaminants 4 attached to the surface of the resist layer 2
Is removed by using an etching solution, and thereafter, the resist layer 2 is removed by irradiating plasma, and a method of manufacturing a semiconductor device.
【請求項2】アルカリ性のエッチング液を用いて前記無
機汚染物4をエッチングして除去することを特徴とする
特許請求の範囲第1項に記載の半導体装置の製造方法。
2. The method for manufacturing a semiconductor device according to claim 1, wherein the inorganic contaminants 4 are removed by etching with an alkaline etching solution.
【請求項3】前記エッチング液が、少なくとも水酸化ア
ンモニウムもしくは水酸化カリウムのいずれか一つを含
有するものであることを特徴とする特許請求の範囲第2
項に記載の半導体装置の製造方法。
3. The etching solution according to claim 2, wherein the etching solution contains at least one of ammonium hydroxide and potassium hydroxide.
A method of manufacturing a semiconductor device according to item.
JP62259998A 1987-10-15 1987-10-15 Method for manufacturing semiconductor device Expired - Lifetime JPH0626201B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP62259998A JPH0626201B2 (en) 1987-10-15 1987-10-15 Method for manufacturing semiconductor device
US07/243,907 US4861732A (en) 1987-10-15 1988-09-13 Method for removing an ion-implanted organic resin layer during fabrication of semiconductor devices
EP88115352A EP0311817B1 (en) 1987-10-15 1988-09-19 Method for removing an ion-implanted organic resin layer during fabrication of semiconductor devices
DE3851029T DE3851029T2 (en) 1987-10-15 1988-09-19 Process for removing an ion-implanted organic resin layer during the manufacture of semiconductor devices.
KR1019880013427A KR920003310B1 (en) 1987-10-15 1988-10-14 Method for removing an ion-implanted organic resin layer during fabrication of semeiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62259998A JPH0626201B2 (en) 1987-10-15 1987-10-15 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH01101633A JPH01101633A (en) 1989-04-19
JPH0626201B2 true JPH0626201B2 (en) 1994-04-06

Family

ID=17341874

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JP62259998A Expired - Lifetime JPH0626201B2 (en) 1987-10-15 1987-10-15 Method for manufacturing semiconductor device

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Country Link
US (1) US4861732A (en)
EP (1) EP0311817B1 (en)
JP (1) JPH0626201B2 (en)
KR (1) KR920003310B1 (en)
DE (1) DE3851029T2 (en)

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Also Published As

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DE3851029T2 (en) 1994-12-01
EP0311817B1 (en) 1994-08-10
EP0311817A2 (en) 1989-04-19
KR890007372A (en) 1989-06-19
DE3851029D1 (en) 1994-09-15
KR920003310B1 (en) 1992-04-27
EP0311817A3 (en) 1990-06-13
JPH01101633A (en) 1989-04-19
US4861732A (en) 1989-08-29

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