JPH06268128A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH06268128A JPH06268128A JP5543393A JP5543393A JPH06268128A JP H06268128 A JPH06268128 A JP H06268128A JP 5543393 A JP5543393 A JP 5543393A JP 5543393 A JP5543393 A JP 5543393A JP H06268128 A JPH06268128 A JP H06268128A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring terminal
- silicone gel
- stress relaxation
- stress
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】
【目的】シリコーンゲルの注入量を減らし、熱的信頼性
を向上させること。
【構成】本発明の半導体装置は、配線端子2の応力緩和
構造の形状を変えることによって、シリコーンゲル6の
注入量を減らし、熱膨張による配線端子半田付け部8の
応力をおさえるようにした。
【効果】半導体装置内において、配線端子半田付け部8
にかかる応力低減をねらい、高い熱的信頼性を得ること
が出来る。
(57) [Summary] [Purpose] To reduce the injection amount of silicone gel and improve thermal reliability. In the semiconductor device of the present invention, by changing the shape of the stress relaxation structure of the wiring terminal 2, the injection amount of the silicone gel 6 is reduced and the stress of the wiring terminal soldering portion 8 due to thermal expansion is suppressed. [Effect] In the semiconductor device, the wiring terminal soldering portion 8
High thermal reliability can be obtained with the aim of reducing the stress applied to the.
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置においての
熱的信頼性向上に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvement of thermal reliability in a semiconductor device.
【0002】[0002]
【従来の技術】図1は、従来の半導体装置における断面
図であり、図中の1はケース、2は配線端子、3は絶縁
板、4は冷却フィン、5は半導体素子、6はシリコーン
ゲル、7はハードレジン、8は配線端子半田付け部であ
り、ケース1は冷却フィン4の周辺部において冷却フィ
ン4に固着されている。絶縁板3において、半導体素子
搭載面Cu板9、及び冷却フィンとの接合面Cu板10
とろう付けされており、半導体素子搭載面Cu板9は配
線パターンが形成されている。2. Description of the Related Art FIG. 1 is a sectional view of a conventional semiconductor device, in which 1 is a case, 2 is a wiring terminal, 3 is an insulating plate, 4 is a cooling fin, 5 is a semiconductor element, and 6 is a silicone gel. , 7 is a hard resin, 8 is a wiring terminal soldering portion, and the case 1 is fixed to the cooling fin 4 in the peripheral portion of the cooling fin 4. In the insulating plate 3, the semiconductor element mounting surface Cu plate 9 and the bonding surface Cu plate 10 with the cooling fins
The semiconductor element mounting surface Cu plate 9 is brazed with a wiring pattern.
【0003】また、配線端子2と絶縁板3のCu板9、
及び絶縁板3のCu板10と冷却フィン4はそれぞれ半
田によりろう付けされる。配線端子2は、図1の如くア
ルファベットのCの形をしたCベンドと呼ばれる形状を
有し、配線端子半田付け部8に加わる応力をこのCベン
ドで緩和している。配線端子半田付け部8は、Cベンド
方向へ曲げたものが、引張応力が小さく、またCベンド
を長くすることで半田付け部にかかる応力は引張,圧縮
共減少される。In addition, the wiring terminal 2 and the Cu plate 9 of the insulating plate 3,
The Cu plate 10 of the insulating plate 3 and the cooling fin 4 are brazed by soldering. The wiring terminal 2 has a shape called a C bend, which is in the shape of an alphabet C as shown in FIG. 1, and the stress applied to the wiring terminal soldering portion 8 is relieved by this C bend. When the wiring terminal soldering portion 8 is bent in the C bend direction, the tensile stress is small, and by increasing the C bend, the stress applied to the soldering portion is reduced in both tension and compression.
【0004】このようなモジュール構造では、温度変化
によって、半導体装置内の各配線端子に不均一な応力が
発生する。その応力が集中した特定配線端子半田付け部
8において亀裂発生が生じ、極端な場合、剥離に至って
いる。その主な原因として、他の部材と比べ極端に熱膨
張率が大きいシリコーンゲル6の膨張が考えられる。シ
リコーンゲル6の熱膨張係数が3×10-4/℃となって
おり、Cu,AlNの熱膨張係数17×10-6/℃,4
×10-6/℃に比べ非常に大きいことがわかる。本発明
では、図2の関係に着目し、シリコーンゲル6の注入量
を減らすために、配線端子2の高さを低くする構造とす
る。In such a module structure, non-uniform stress is generated in each wiring terminal in the semiconductor device due to temperature change. A crack is generated in the specific wiring terminal soldering portion 8 where the stress is concentrated, and in an extreme case, peeling occurs. The main cause is considered to be the expansion of the silicone gel 6, which has an extremely large coefficient of thermal expansion as compared with other members. The thermal expansion coefficient of the silicone gel 6 is 3 × 10 −4 / ° C., and that of Cu and AlN is 17 × 10 −6 / ° C., 4
It can be seen that it is much larger than × 10 -6 / ° C. In the present invention, attention is paid to the relationship of FIG. 2, and the structure is such that the height of the wiring terminal 2 is lowered in order to reduce the injection amount of the silicone gel 6.
【0005】[0005]
【発明が解決しようとする課題】本発明では、他の性能
を犠牲にすることなく、シリコーンゲル6の注入量を減
らして、熱膨張による配線端子半田付け部8に発生する
応力を軽減することを目的とし、熱的信頼性の高い半導
体装置とすることにある。SUMMARY OF THE INVENTION In the present invention, the amount of silicone gel 6 injected is reduced to reduce the stress generated in the wiring terminal soldering portion 8 due to thermal expansion, without sacrificing other performances. In view of the above, a semiconductor device having high thermal reliability is provided.
【0006】[0006]
【課題を解決するための手段】図2の関係に着目し、配
線端子2の高さを低くすることでシリコーンゲル6の注
入量を減らす提案である。This is a proposal to reduce the injection amount of the silicone gel 6 by lowering the height of the wiring terminal 2 by paying attention to the relationship of FIG.
【0007】[0007]
【作用】他の性能を犠牲にすることなく、熱的信頼性の
高い半導体装置を提供できる。パッケージを小型化する
ことができる。A semiconductor device with high thermal reliability can be provided without sacrificing other performances. The package can be downsized.
【0008】[0008]
【実施例】図3に、本発明の一実施例を示す。ここで
は、Cベンドの曲がりを縦方向から平面方向に構造変更
してある。この外形図を図4に示す。この時の引張応
力,圧縮応力は、従来と比べても差が無い。FIG. 3 shows an embodiment of the present invention. Here, the structure of the bend of the C bend is changed from the vertical direction to the plane direction. This outline drawing is shown in FIG. At this time, the tensile stress and the compressive stress are not different from those of the conventional one.
【0009】配線端子2の高さは、従来と比べると、外
形寸法で50%程度カットされ、シリコーンゲル6の注
入量も半減できる。よって熱による変位量が減少し、半
田付け部の応力を低減でき、高い熱的信頼性の向上が得
られる。The height of the wiring terminal 2 is cut by about 50% in external dimensions and the injection amount of the silicone gel 6 can be halved as compared with the conventional case. Therefore, the amount of displacement due to heat is reduced, the stress of the soldered portion can be reduced, and high thermal reliability can be improved.
【0010】図5には、他の実施例を示す。本図はその
構造の一例を示すもので、その配線端子2の応力緩和構
造をS字とすることで、Cベンド状よりも大きな応力緩
和構造となり、一層高い熱的耐量が得られる。FIG. 5 shows another embodiment. This drawing shows an example of the structure. By making the stress relaxation structure of the wiring terminal 2 into an S shape, a stress relaxation structure larger than that of the C-bend shape can be obtained, and a higher thermal resistance can be obtained.
【0011】図6には、他の実施例を示す。本図はその
構造の一例を示すもので、その配線端子2の応力緩和構
造をI字とすることを特徴とする構造で、2aや2bよ
り簡単に製作することができる。また、配線端子の長さ
は他の端子より短い形状となっていることから、配線抵
抗も小さくできる。FIG. 6 shows another embodiment. This drawing shows an example of the structure. The structure is characterized in that the stress relaxation structure of the wiring terminal 2 is I-shaped, and can be manufactured more easily than 2a and 2b. Moreover, since the length of the wiring terminal is shorter than the other terminals, the wiring resistance can be reduced.
【0012】[0012]
【発明の効果】半導体装置破壊の要因のひとつである温
度変化による配線端子半田付け部の亀裂発生をシリコー
ンゲル6の注入量を減らすことで軽減し、熱疲労信頼性
を向上できる。EFFECTS OF THE INVENTION The occurrence of cracks in the soldered portions of wiring terminals due to temperature change, which is one of the factors of destruction of semiconductor devices, can be reduced by reducing the amount of silicone gel 6 injected, and the thermal fatigue reliability can be improved.
【図1】従来技術の断面図である。FIG. 1 is a cross-sectional view of a conventional technique.
【図2】ヒートサイクル試験によるシリコーンゲル6の
量とその変位量の関係を示した図である。FIG. 2 is a diagram showing a relationship between the amount of silicone gel 6 and its displacement amount by a heat cycle test.
【図3】本発明の一実施例の断面図である。FIG. 3 is a sectional view of an embodiment of the present invention.
【図4】本発明の配線端子2の形状を三次元的に示した
図である。FIG. 4 is a three-dimensional view showing the shape of the wiring terminal 2 of the present invention.
【図5】本発明の他の実施例、配線端子2の形状を三次
元的に示した図である。FIG. 5 is a three-dimensional view showing the shape of the wiring terminal 2 according to another embodiment of the present invention.
【図6】本発明の他の実施例、配線端子2の形状を三次
元的に示した図である。FIG. 6 is a three-dimensional view showing the shape of the wiring terminal 2 according to another embodiment of the present invention.
1…ケース、2…配線端子、3…絶縁板、4…冷却フィ
ン、5…半導体素子、6…シリコーンゲル、7…ハード
レジン、8…配線端子半田付け部半導体素子搭載面Cu
板、9…半導体素子搭載面Cu板、10…冷却フィンと
の接合面Cu板。1 ... Case, 2 ... Wiring terminal, 3 ... Insulating plate, 4 ... Cooling fin, 5 ... Semiconductor element, 6 ... Silicone gel, 7 ... Hard resin, 8 ... Wiring terminal soldering part Semiconductor element mounting surface Cu
Plate, 9 ... Semiconductor element mounting surface Cu plate, 10 ... Bonding surface Cu plate with cooling fins.
フロントページの続き (72)発明者 八木原 俊樹 茨城県日立市弁天町三丁目10番2号 日立 原町電子工業株式会社内Front page continued (72) Inventor Toshiki Yagihara 3-10-2 Bentencho, Hitachi City, Ibaraki Prefecture Hitachi Haramachi Electronics Industry Co., Ltd.
Claims (6)
基板を配置し、その上に半導体素子が配置され、その外
周部をシリコーンゲルとレジンによって覆い、ケースに
よって封入した半導体装置において、絶縁基板上のCu
板にろう付けされた配線端子に作られる半田付け部の応
力緩和構造を、平面的に設けたことを特徴とする半導体
装置。1. A semiconductor device in which an insulating substrate treated with an electrode is arranged on a metal base, a semiconductor element is arranged on the insulating substrate, and the outer peripheral portion is covered with a silicone gel and a resin and enclosed by a case. Cu on insulating substrate
A semiconductor device, wherein a stress relaxation structure of a soldering portion formed on a wiring terminal brazed to a plate is provided in a plane.
C状のベンドとなっていることを特徴とする半導体装
置。2. The semiconductor device according to claim 1, wherein the stress relaxation structure has a C-shaped bend.
S状のベンドとなっていることを特徴とする半導体装
置。3. The semiconductor device according to claim 1, wherein the stress relaxation structure has an S-shaped bend.
Cu板との配線端子半田付け部とケース接着部との位置
をずらすことで直線形とすることを特徴とする半導体装
置。4. The semiconductor device according to claim 1, wherein the shape of the stress relaxation structure is made linear by shifting the positions of the wiring terminal soldering portion with the Cu plate and the case bonding portion.
とを特徴とする半導体装置。5. The semiconductor device according to claim 1, wherein the metal material is copper.
ことを特徴とする半導体装置。6. The semiconductor device according to claim 1, wherein the metal material is brass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5543393A JPH06268128A (en) | 1993-03-16 | 1993-03-16 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5543393A JPH06268128A (en) | 1993-03-16 | 1993-03-16 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06268128A true JPH06268128A (en) | 1994-09-22 |
Family
ID=12998460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5543393A Pending JPH06268128A (en) | 1993-03-16 | 1993-03-16 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06268128A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6262474B1 (en) | 1998-06-01 | 2001-07-17 | Fuji Electric Co., Ltd. | Semiconductor device |
| JP2006344841A (en) * | 2005-06-10 | 2006-12-21 | Mitsubishi Electric Corp | Power semiconductor module |
| JP2010177573A (en) * | 2009-01-30 | 2010-08-12 | Honda Motor Co Ltd | Semiconductor device |
-
1993
- 1993-03-16 JP JP5543393A patent/JPH06268128A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6262474B1 (en) | 1998-06-01 | 2001-07-17 | Fuji Electric Co., Ltd. | Semiconductor device |
| JP2006344841A (en) * | 2005-06-10 | 2006-12-21 | Mitsubishi Electric Corp | Power semiconductor module |
| JP2010177573A (en) * | 2009-01-30 | 2010-08-12 | Honda Motor Co Ltd | Semiconductor device |
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