JPH06232206A - Method for mounting semiconductor element - Google Patents

Abstract

(57) [Summary] [Purpose] To improve the manufacturing yield. Also improved manufacturing costs. A semiconductor element (11) having three or more alignment metal projections (26, 27, 28) electrically connected to a plurality of metal projections (14) via respective electrode pads (15) is formed on one main surface. Circuit board 11 on which inspection wirings 17, 18, and 19 corresponding to the metal protrusions 26, 27, and 28 are formed.
A semiconductor element mounting method in which any two wirings of the inspection wirings 17, 18, and 19 are electrically connected to each other and are aligned and face-down mounted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a face-down semiconductor element mounting method for mounting a semiconductor element on a wiring board with accurate alignment.

[0002]

2. Description of the Related Art In recent years, a face-down mounting method for semiconductor elements has been proposed. This mounting method is shown in FIG. In FIG. 1, 1 is a circuit board arranged on the stage 2, and 3 is wiring on the circuit board 1. When the substrate of this circuit board 1 is an opaque substrate and a semiconductor element is mounted on this circuit board 1, first the camera 4 is made to recognize the planned mounting site 5 of the circuit board 1 in advance, and then the semiconductor element 6 is fixed. The pressure jig 7 is moved above the planned mounting site 5, and the pressing jig 7 is mounted on the planned mounting site 5.
When it is mounted on the part 5, the camera 8 recognizes the metal protrusion provided on the metal pad of the semiconductor element 6, and the TV monitor 9 visualizes the recognition of both cameras 4 and 8. Positioning was performed by the image processing.

[0003]

However, in the mounting method proposed above, the pressing jig 7 is a moving path in which the pressing jig 7 is moved above the mounting scheduled portion 5 and lowered toward the mounting scheduled portion 5. However, even if the temperature of the atmosphere changes by ± 1 ° C. because of the long path, the movement error may occur in the order of several tens of microns.

A pressure jig 7 to which the semiconductor element 6 is fixed
There was a case where it was not possible to mount it with high accuracy when lowering it toward the mounting planned site 5 and mounting it on the site 5 due to the runout of the pressing jig 7.

Therefore, such a mounting defect is confirmed as a connection defect by the subsequent inspection, and as a result, the manufacturing yield is lowered.

[0006]

According to the method of mounting a semiconductor element of the present invention, an electrode pad having a metal projection and an electrode pad having three or more electrically conductive portions for positioning are electrically connected to each other. Any one of the probing conductive portions may be formed on a wiring substrate on which a wiring portion corresponding to the metal protrusion and a probing conductive portion corresponding to the alignment conductive portion are formed. It is characterized in that face-down mounting is performed by aligning the conductive parts while electrically conducting them.

[0007]

In the mounting method of the semiconductor device having the above structure,
Since positioning is performed while electrically conducting between any two of the conductive portions for probing, it is possible to accurately confirm the position by the electrical conduction, which enables highly accurate mounting. .

[0008]

[Embodiment] This embodiment shows a case where a semiconductor element is fixed to a pressure jig and the pressure jig is mounted on a circuit board in the face-down semiconductor element mounting method already proposed. . The embodiment will be described in detail with reference to FIGS.

FIG. 1 shows a state in which a semiconductor element 11 is mounted on a circuit board 10 by a pressing jig (not shown), and a plurality of wirings 12 are formed on the circuit board 10. Further, FIG. 2 shows an inspection process in which the position adjustment is performed using the probe pin 13 in the mounted state. In these drawings, each wiring 12 has a face-down connection area 14
Are formed, and the electrode pads 1 are formed on the semiconductor element 11, respectively.
5, metal projections 16 are formed, and these metal projections 16 are paired with the connection regions 14, respectively. Also,
In addition to the wiring 12, the inspection wirings 17 and 1 are provided on the circuit board 10.
8 and 19 are formed, and face-down connection regions 20, 21 and 22 are also formed on these, and metal projections 26 and 27 are similarly formed on the semiconductor element 11 via electrode pads 23, 24 and 25, respectively. , 28 are formed and are paired with the connection regions 20, 21, 22 respectively. Moreover,
The three electrode pads 23, 24, 25 are electrically connected.

FIG. 3 is a comparative view showing the difference between the metal projection 16 on the semiconductor element 11 and the metal projection 26. The metal protrusions 27 and 28 have the same structure as the metal protrusion 26. According to the figure, an oxide film 30 is formed on a silicon substrate 29, aluminum films 31 and 32 are formed on the oxide film 30, and Cr-Cu and Ni-C are further formed.
u, Cr-Ni-Cu, Cr-Cu-Au, Ni-Cu
Barrier metals 33 and 34 made of Au or the like are formed to form the electrode pads 15 and 23. Reference numeral 35 is a protective film made of SiO ₂ for protecting the circuit (oxide film 30) formed on the surface of the silicon substrate. Then, the metal protrusions 16 and 26 are formed on the electrode pads 15 and 23. Then, the metal protrusion 1 corresponding to the normal wiring 12
The protrusion size of 6 is 8 to 15 μm, but the metal protrusion 26 for inspection is larger than the metal protrusion 16 so as to protrude by 0.5 to 1 μm.

Next, a process of mounting the semiconductor element 11 according to the present invention on the circuit board 10 by face down will be described. Step (1) A thermosetting resin or an ultraviolet curable resin is applied in advance to a portion where the semiconductor element is to be mounted on the circuit board 10.

Step (2) The semiconductor element 11 is fixed to a jig, and the semiconductor element 11 is placed at a predetermined mounting site by moving the jig. For this, a conventionally well-known mounting method already proposed can be used. For example, there is a method shown in FIG. In addition, when the circuit board 10 uses a transparent substrate, a CCD camera is arranged on the back side of the mounting surface, and the connection areas 20, 21, 22 are provided.
There is a method of mounting while recognizing the metal projections 16, 26, 27 and 28.

Step (3) As shown in FIG. 2, the probe pin 13 is used to accurately dispose the semiconductor element 11 at a predetermined mounting site, and the proper inspection is performed by probing. That is, the semiconductor device 1
1 is pressed against the fixing jig (about 20 to 40 grams / metal protrusion), whereby each metal protrusion 26, 2
Temporarily mounted by 7, 28, and inspection wiring 17, 1
Two wirings are selected from the wirings 8 and 19 and a current is passed between the wirings to confirm the continuity. Then, the continuity confirmation test is performed twice by changing the types of the two wirings, and if the continuity is obtained by the test of two or more times, each metal protrusion 16 corresponds to each. It will be located exactly with the connection area 14. However, if even one of the probings cannot obtain the conduction state, it can be determined that the alignment has not been performed accurately. Therefore, the work of step (2) is performed again to achieve the accurate alignment. Continue until you are told.

In step (4) , pressure is applied to the jig (about 60 to 80 grams / metal protrusion), whereby the metal protrusions 26, 27, 28 are deformed or crushed, and each metal protrusion 16 corresponds to it. The conductive state with the connecting region 14 is accurately obtained.

Step (5) The thermosetting resin or the ultraviolet curable resin previously applied to the site where the semiconductor element is to be mounted is cured by heating or ultraviolet irradiation.

Thus, according to the semiconductor element mounting method having the above structure, the metal protrusions 26, 27 and 28 and the connection region 2 are previously formed.
By probing 0, 21, and 22 respectively, the semiconductor element 11 is accurately arranged at a predetermined mounting planned site, and high-precision mounting can be performed.

The present invention is not limited to the above-mentioned embodiments, and within the scope of the present invention,
Various changes and improvements can be made. For example, the hardness of one metal projection formed as the alignment conductive portion is made smaller than that of the other metal projection, so that the influence of the one metal projection at the time of pressure connection can be minimized.

[0018]

As described above, the semiconductor element mounting method according to the present invention mainly includes three or more alignment conductive portions electrically connected to the plurality of metal protrusions through the respective electrode pads. The semiconductor element formed on the surface, on the wiring substrate on which the wiring portion corresponding to the metal protrusion and the probing conductive portion corresponding to the alignment conductive portion are formed, one of the probing conductive portions. This is a configuration in which face-down mounting is performed by aligning the two conductive portions while electrically conducting them. With this configuration, any two of the conductive portions of the probing conductive portion are electrically connected. Since the position is adjusted while conducting electricity, the position can be accurately confirmed by the electrical conduction, which enables highly accurate mounting, and as a result, the ratio of non-defective products in the mounting increases or Work can be omitted, the manufacturing yield is increased, and was able to improve the production cost.

Further, according to the mounting method of the present invention, since the conductive portion for alignment is larger in size than the metal protrusion, the metal protrusion does not contact the wiring on the wiring substrate during probing, Without damaging the wiring,
Further, there is an advantage that it is possible to avoid crushing the metal protrusion before the connection.

[Brief description of drawings]

FIG. 1 is a mounting diagram of a semiconductor element on a circuit board.

FIG. 2 is a diagram showing an inspection process for checking a mounting state of a semiconductor element on a circuit board.

FIG. 3 is a cross-sectional view showing a difference between metal protrusions on a semiconductor element.

FIG. 4 is a schematic view showing a conventional method for mounting a semiconductor element.

[Explanation of symbols]

 1, 10 ... Circuit board 6, 11 ... Semiconductor element 12 ... Wiring 13 ... Probe pin 16, 26, 27, 28 ... Metal projection

Claims (1)

[Claims] 1. A semiconductor element having an electrode pad having a metal protrusion and an electrode pad having three or more electrically conductive positioning portions electrically connected to each other on one main surface corresponds to the metal protrusion. Positioning is performed on a wiring board on which a wiring part and a probing conductive part corresponding to the positioning conductive part are formed while electrically conducting between any two conductive parts of the probing conductive part. A semiconductor element mounting method that allows face-down mounting.