JPH06232179A - Compound semiconductor device and its manufacture - Google Patents

Abstract

(57) [Summary] [Object] To provide a compound semiconductor device having a novel recess gate structure capable of further improving the characteristics. [Structure] The cap layer (1) laminated on the donor supply layer (13)
An insulating film (17) having a partial opening (A ₁ ) is laminated on the layer 4). Through the opening (A ₁ ), the cap layer (1
By etching 4), a recess structure is formed in which the donor supply layer 13 is reached and, at the same time, it is laterally etched in a range larger than the opening area of the opening (A ₁ ). Moreover, this recess structure, is only the Schottky junction with the donor supply layer (13) by vacuum evaporation and the outer insulating film of the opening through opening the (A ₁₎ (A ₁₎ A Schottky gate electrode (18) is formed so as to overlap up to (17). Since the Schottky gate electrode (18) seals the opening (A ₁ ), impurities are not mixed in the exposed portion of the donor supply layer (13) in the recess structure, and the deterioration of electrical characteristics is prevented. can do.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor device having a structure in which a Schottky gate electrode is formed in a donor supply layer via a recess structure, and has a novel structure capable of further improving the characteristics. The present invention relates to a compound semiconductor device and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, a material that is lattice-matched to an InP substrate or a material that is not lattice-matched to an InP substrate but is grown to a critical film thickness or less that does not induce dislocation, such as InP or I.
the compound semiconductor such as n _x Ga _1-x As are suitable for high-speed, high-frequency semiconductor device is disclosed in various documents. "IEEE ELECTRON DEVICE L
ETTERS, VOL.9, NO.7, JULY 1988, P.328 ~ P.330, "High-P
erformance InAlAs / InGaAs HEMT's and MESFET's ”A.FA
THIMULLA et al. "," IEEE ELECTRON DEVICE LETTER
S, VOL.14, NO.5, MAY 1993, P.259 ~ P.261, "InGaAs / InAl
As HEMT with a Strained InGaP Schottky Contact Lay
er "Shinobu Fujita et al.", "Japanese Patent Laid-Open No. 5-160161
issue".

The schematic structure of the HEMT disclosed in these documents is, for example, as shown in the vertical section of FIG. 6, a substrate 1 made of semi-insulating InP, a buffer layer 2 made of non-doped InAlAs, and a channel made of InGaAs. A layer 3, a donor supply layer 4 made of n-type InAlAs, and a cap layer 5 made of high-concentration n-type InGaAs are stacked, and ohmic electrodes 6 and 7 for source and drain are formed on the upper surface of the cap layer 5 by vapor deposition. Has been done. Further, in the recessed step portion (recess structure) formed by recess etching the cap layer 5 and reaching the donor supply layer 4,
A Schottky gate electrode 8 that forms a Schottky junction with the donor supply layer 4 is formed by vapor deposition.

[0004]

However, in such a conventional compound semiconductor device having a recess gate structure, since this recess gate structure is exposed to the external atmosphere, a part of the donor supply layer is exposed to the external atmosphere. This exposed portion (such as the peripheral portion where the Schottky gate electrode is formed) in the semiconductor manufacturing process.
However, there is a problem in that the electrical characteristics are deteriorated due to the oxidation of impurities and the inclusion of impurities. For example, InA
In HEMTs and MESFETs in which a gate electrode is directly formed on a donor supply layer of a 1As compound semiconductor, I
Since Al (aluminum) in nAlAs is very active, it is easily oxidized and, as a result, deterioration of characteristics such as reduction of drain current flowing between the source and drain via the channel under the Schottky gate electrode and deterioration of characteristics. There was a problem that led to a decrease in reliability. In addition, a HEM in which a gate electrode is directly formed on a donor supply layer of a GaAlAs compound semiconductor
The same problem occurred in T and MESFET.

The present invention relates to a compound semiconductor device having a structure in which a Schottky gate electrode is formed in a donor supply layer via a recess structure, and a compound semiconductor device having a novel structure capable of further improving the characteristics and It is an object to provide a manufacturing method thereof.

[0006]

In order to achieve the above object, in a compound semiconductor device of the present invention, an insulating film having a partial opening is laminated and formed on a cap layer laminated on a donor supply layer, and the opening is formed. The donor supply layer by vacuum vapor deposition in a recess structure that reaches the donor supply layer by etching the cap layer through a portion and is laterally etched in a range larger than the opening area of the opening. And a Schottky gate electrode that is Schottky-junctioned only with respect to the above and overlaps through the opening to the outside of the opening.

Further, in the compound semiconductor device having such a structure, after the cap layer is laminated on the donor supply layer, the insulating film having a partial opening is laminated on the cap layer, and the cap layer is laminated through the opening. By etching the cap layer, a recess which reaches the donor supply layer and becomes a void in the lateral direction in a range larger than the opening area of the opening is formed, and the donor supply layer is formed in the recess by vacuum deposition. The Schottky gate electrode is formed only through the Schottky junction and overlaps with the outside of the opening through the opening.

[0008]

In the compound semiconductor device having such a structure, since the lateral opening area of the cap layer by the recess structure is larger than the opening area of the opening formed in the insulating film, the Schottky gate formed by vacuum vapor deposition. A vacuum gap is formed between the side wall of the electrode and the side wall of the opening of the cap layer. Therefore, the Schottky gate electrode does not come into direct contact with the cap layer and makes a Schottky junction only with the donor supply layer, so that the gate of the compound semiconductor device such as HEMT or MESFET is realized. Further, since the Schottky gate electrode is formed so as to overlap the outside thereof through the opening of the insulating film, it is possible to keep the vacuum state by blocking / sealing the void in the recess structure from the outside. it can. As a result, for example, it is possible to prevent a problem that impurities are mixed in a portion where the donor supply layer is exposed in the recess structure and electrical characteristics are deteriorated. As a more specific example of the effect, when a compound semiconductor device having a recess structure similar to the conventional one is manufactured, the recess structure is exposed to the external atmosphere, so that a part of the donor supply layer is exposed to the external atmosphere. In the process, this exposed portion (such as the peripheral portion where the Schottky gate electrode is formed) is oxidized, which causes a problem that electrical characteristics are deteriorated. However, when the recess structure of the present invention is applied, There is no problem.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. This embodiment relates to HEMT. Further, FIG. 1 shows a transmission plane structure of the essential part of the HEMT (upper figure) and a virtual line L- in the figure showing the transmission plane structure.
A vertical cross-sectional structure (below) shown along L is shown. FIG. 2 shows a manufacturing process.

First, the main structure will be described with reference to FIG. 1. On a substrate 10 made of semi-insulating InP, a buffer layer 11 made of non-doped InP or InAlAs lattice-matched with InP, and a channel layer 1 made of InGaAs.
2. A donor supply layer 13 made of n-type InAlAs and a cap layer 14 made of high-concentration n-type InGaAs are stacked. Further, drain and source ohmic electrodes 15 and 16 are vapor-deposited in predetermined regions on the cap layer 14. A high-concentration n-type layer (region indicated by a dotted line in the vertical sectional view of FIG. 1) is formed below the ohmic electrodes 15 and 16 by the alloying process.

Further, SiN is formed on the ohmic electrodes 15 and 16 and on the remaining region on the cap layer 14 excluding a predetermined region for forming the Schottky gate electrode 18 (a region of an opening A ₁ described later). An insulating film 17 made of is laminated. An insulating film 17 is formed in the region where the Schottky gate electrode is formed (the region between the drain and the source).
Rectangular opening A due to the partial formation of
₁ and a recess structure penetrating the cap layer 14 corresponding to the opening A ₁ and reaching a part of the upper part of the donor supply layer 13. The recess structure is provided in the recess structure.
Schottky gate electrode 18 for Schottky junction to 3
Are formed by vacuum evaporation.

Here, further, the Schottky gate electrode 18
Is connected only to the donor supply layer 13, and the remaining portion does not contact the sidewall of the cap layer 14 and the opening A
₁ to the outside of the insulating film 17 and further to the opening A ₁
And overlaps the insulating film 17 on the outside.

Next, a specific example of the manufacturing process of the HEMT having such a structure will be described with reference to FIG. First, in the first step (see FIG. 3A), a molecular beam epitaxy (MBE) method or a metalorganic vapor phase epitaxy (OMVP) is used.
By the method E), on the substrate 10 made of semi-insulating InP,
Undoped InP or InA lattice-matched with InP
Approximately 3000 Å of the buffer layer 11 composed of 1
Next, the channel layer 12 made of InGaAs is laminated on the buffer layer 11 by about 150 Å, and then the channel layer 12 is formed.
In _0.52 Al with an electron concentration of 5 × 10 ¹⁸ / cm ³
400 Å of donor supply layer 13 made of _0.48 As is laminated,
Next, on the donor supply layer 13, the electron concentration is 5 × 10 ¹⁸ /
cm ³ of In _0.53 Ga _0.47 As cap layer 14
100 Å was formed. The channel layer 12 may be InP.

Next, the second manufacturing process (see FIG. 2B)
, The drain and source ohmic electrodes 15,
16 is vapor-deposited and formed on a predetermined region on the cap layer 14, and a high concentration n
A layer of mold was formed. Next, by the plasma CVD method, S
The iN insulating film 17 was formed to a thickness of about 500 to 1000Å. The SiN insulating film 17 can be formed at a relatively low temperature, but an insulating material that can be formed at a temperature lower than SiN, such as SiO ₂ or SiON, may be applied.

Next, the third manufacturing process (see FIG. 3C)
In the above, a well-known photolithography technique was applied to remove the portion of the insulating film 17 that would become the opening A ₁ in accordance with the photoresist FA. That is, the opening A ₁ serves as a mask when performing recess etching described later, and substantially defines the channel length and channel width of the gate. Then, after forming the opening A ₁ , the photoresist FA was removed.

Next, a fourth manufacturing process (see FIG. 3D)
Then, the well-known photolithography technique was applied again, and the photoresist FB ₁ was provided in the remaining region except the region B ₁ including the opening A ₁ and wider than that.
As shown in FIG. 1, the size difference between the opening A ₁ and the region B ₁ is 0.5 μm in the gate length direction and 1.0 μm in the gate width direction in the region B ₁ . I made it bigger. After forming the photoresist FB in this manner, the cap layer 14 was recess-etched until the donor supply layer 13 was reached using the insulating film 17 and the photoresist FB as a mask.

An etching solution of phosphoric acid solution and hydrogen peroxide solution was applied to this recess etching. By this recess etching, as shown in the drawing, a recess structure corresponding to the opening A ₁ is formed in the donor supply layer 13, and the cap layer 14 is slightly expanded laterally beyond the opening A ₁ of the insulating film 17. Etched. Therefore, the space formed in the cap layer 14 by this recess structure is wider than the opening A ₁ of the insulating film 17 in the lateral direction.

Next, 500Å / 500Å / 5000 respectively
By sequentially vacuum depositing Ti / Pt / Au with a thickness of Å so as to cover the opening A ₁ and the region B ₁ , the unnecessary photoresist FB is removed by lift-off processing. The Schottky gate electrode 18 as shown in FIG. That is, the entire thickness of the Schottky gate electrode 18 formed by this vacuum deposition is
Since the depth is larger than the sum of the depth of the recess structure and the film thickness of the insulating film 17, it is formed so as to cover the opening A ₁ and the region B ₁ . Further, as a result of applying the vacuum deposition method, as shown in FIG. 1, since the Schottky gate electrode 18 is formed in a rectangular shape along the opening A ₁ of the insulating film 17, it contacts the donor supply layer 13. However, it was formed so as not to come into contact with the cap layer 14 that is etched to the inside of the opening A ₁ . Further, the unnecessary photoresist FB was removed by lift-off processing, so that the Schottky gate electrode 18 was vapor-deposited up to the region B ₁ above (outside) the insulating film 17. Therefore, the opening A ₁ was sealed by the overlap of the Schottky gate electrode 18 to the outside, and the internal void due to the recess structure was completely shielded from the external atmosphere.

As described above, according to this embodiment, as shown in FIG. 1, since the Schottky gate electrode 18 which covers the insulating film 17 and contacts the donor supply layer 13 is formed, the Schottky gate is formed. It was possible to eliminate the cause of the electrode 18 itself blocking the recess structure from the outside and causing the deterioration of the electrical characteristics such as the oxidation of the donor supply layer 13 and the mixing of impurities. For example, since a donor supply layer of InAlAs containing Al is extremely active, if a Schottky gate electrode is directly formed on this InAlAs by applying a conventional technique, oxidation is likely to occur and drain current is reduced. Although the deterioration of the characteristics becomes a problem, according to this embodiment, such a problem could be solved.

In this embodiment, the effect of preventing oxidation and mixing of impurities around the portion where the Schottky gate electrode 18 is formed and in the vicinity thereof in the donor supply layer 13 in the recess structure will be described. However, it is also effective in preventing oxidation of the Schottky gate electrode 18 itself. Furthermore, although the HEMT has been described, the present invention is not limited to this, and can be applied to a MESFET having a recess structure and other compound semiconductor devices. Also,
Other than the semiconductor on the InP substrate, it can be applied to, for example, a compound semiconductor on the GaAs substrate.

Further, in the fourth manufacturing process (FIG. 2D), by applying the etching solution of the phosphoric acid aqueous solution and the hydrogen peroxide solution to the recess etching, the side walls are tapered as shown in FIG. Although the case of realizing the recess structure has been described, the recess etching may be performed by applying CH ₄ + H ₂ etching gas instead of the etching solution in the fourth manufacturing process. When this etching gas is applied, as shown in FIG. 3, a recess structure having a side wall that is substantially perpendicular to the laminated surface of the insulating layer 17 inside the opening A ₁ of the insulating layer 17, It can be formed on the donor supply layer 13 and the cap layer 14. By making the sidewalls of the recess structure substantially at right angles, the non-contact between the Schottky gate electrode 18 and the sidewalls can be made more reliable.

Next, a second embodiment will be described with reference to FIG. FIG. 4 is a longitudinal sectional view of the essential part of the HEMT according to this embodiment.

First, the structure will be described. On the substrate 20 made of GaAs, a buffer layer 21 made of non-doped GaAs is laminated in 3000 Å, and the electron concentration is 1 ×.
A donor supply layer 22 made of Ga _0.7 Al _0.3 As of 10 ¹⁸ / cm ³ was laminated in a thickness of 500 Å, and the electron concentration was 5 ×.
The cap layer 23 made of 10 ¹⁸ / cm ³ of GaAs is 5
00Å Stacked. Further, drain and source ohmic electrodes 24 and 25 are formed by vapor deposition in predetermined regions on the cap layer 23, and a high concentration n-type layer (shown by a dotted line in FIG. 4) is formed under the ohmic electrodes 24 and 25 by alloying. Area) is formed.

Further, in the remaining regions on the ohmic electrodes 24 and 25 and on the cap layer 23 excluding a predetermined region for forming the Schottky gate electrode 27, an insulating film 26 made of SiN is about 500Å to 1000Å. Are laminated with a thickness of. The insulating film 26 is formed in the region where the Schottky gate electrode is formed (region between the drain and the source).
Rectangular opening A due to the partial formation of
₂ and a recess structure penetrating the cap layer 23 corresponding to the opening A ₂ and reaching a part of the upper part of the donor supply layer 22. Within the recess structure, the donor supply layer 2 is provided.
Schottky gate electrode 27 for Schottky junction to 2
Are formed by vacuum evaporation. The Schottky gate electrode 27 is made of Ti / Pt / Au of 500%, respectively.
It is formed by sequentially vacuum-depositing with a thickness of Å / 500Å / 5000Å.

Here, further, the Schottky gate electrode 27
Is connected only to the donor supply layer 22, and the remaining portion does not contact the side wall of the cap layer 23 and the opening A
₂ to the outside of the insulating film 26 and further to the opening A ₂
The insulating film 26 overlaps with the outside of the.

The HEMT having this structure was formed by the following manufacturing process. The description will be given according to the manufacturing process of the first embodiment shown in FIG. 2. First, the first manufacturing process (FIG.
(Corresponding to the step (a)), the molecular beam epitaxy (MBE) method and the organometallic vapor phase epitaxy (OMVP) are used.
By the method E), the buffer layer 21, the donor supply layer 22, and the cap layer 23 were sequentially laminated on the GaAs substrate 20 to have the predetermined thickness.

Next, in the second manufacturing process (corresponding to the process of FIG. 2B), the drain and source ohmic electrodes 24 and 25 are vapor-deposited and formed on a predetermined region on the cap layer 23, and then an alloy treatment is performed. Thus, a high-concentration n-type layer was formed under the ohmic electrodes 24 and 25. Next, the insulating film 26 of SiN was formed to a thickness of about 500 to 1000 Å by the plasma CVD method. The SiN insulating film 26 can be formed at a relatively low temperature, but an insulating material that can be formed at a temperature lower than SiN, such as SiO ₂ or SiON, may be applied.

Next, in the third manufacturing process (corresponding to the process of FIG. 2C), a well-known photolithography technique is applied to the photoresist (corresponding to the photoresist FA shown in FIG. 2). At the same time, the portion of the insulating film 26 that will become the opening A ₂ was removed. That is, this opening A
₂ serves as a mask when performing recess etching, and almost defines the channel length and channel width of the gate. Then, after forming the opening A ₂ , the photoresist was removed.

Next, in the fourth manufacturing step (corresponding to the step shown in FIG. 2D), the well-known photolithography technique is applied again, and the area B including the opening A ₂ and wider than that is included. A photoresist (corresponding to the photoresist FB shown in FIG. 2) was applied to the remaining areas except for ₂ . After the photoresist is formed in this way, the insulating film 2
6 and the photoresist as a mask, the donor supply layer 22
Of the cap layer 23 is recess-etched.

An etching solution of citric acid aqueous solution and hydrogen peroxide solution was applied to this recess etching. By this recess etching, as shown in the drawing, a recess structure having a so-called reverse taper side wall in which the lateral gap becomes larger as it goes deeper than the opening A ₂ is realized. That is, the space formed in the cap layer 23 by this recess structure is wider than the opening A ₂ of the insulating film 26 in the lateral direction.

Next, 500Å / 500Å / 5000 respectively
4 is formed by sequentially vacuum-depositing Ti / Pt / Au with a thickness of Å so as to cover the opening A ₂ and the region B ₂ , and removing unnecessary photoresist by lift-off processing. A Schottky gate electrode 27 as shown is formed. As a result of applying the vacuum evaporation method, as shown in FIG.
Is formed in a rectangular shape along the opening A ₂ of the insulating film 26, and therefore contacts the donor supply layer 22, but the opening A ₂
It was formed so as not to come into contact with the cap layer 23 that is etched further inward. Furthermore, the unnecessary photoresist is removed by lift-off processing, so that the Schottky gate electrode 27 is formed on the insulating film 26 (outside).
Area B ₂ was deposited. Therefore, the opening A ₂ is sealed by the overlap of the Schottky gate electrode 27 to the outside, and the internal void due to the recess structure is
Completely shielded from the outside atmosphere.

As described above, according to this embodiment, as shown in FIG. 4, since the Schottky gate electrode 27 which covers the insulating film 26 and contacts the donor supply layer 22 is formed, the Schottky gate electrode is formed. The electrode 27 itself shields the recess structure from the outside, and it is possible to eliminate the cause of deterioration of electrical characteristics such as oxidation of the donor supply layer 22 and mixing of impurities.

Although the HEMT has been described in this embodiment, the present invention is not limited to this, and the MESF having a recess structure is used.
The present invention can be applied to ET and other compound semiconductor devices.

Next, a third embodiment will be described with reference to FIG. FIG. 5 is a vertical cross-sectional view of the essential parts of the HEMT according to this embodiment.

First, the structure will be explained. On the substrate 30 made of GaAs, a buffer layer 31 made of non-doped GaAs is stacked in a thickness of 3000 Å, and further, a non-doped I layer is formed.
The channel layer 32 made of n _0.15 Ga _0.85 As has a thickness of 150 Å
In which the electron concentration is 5 × 10 ¹⁸ / cm ³
_The donor supply layer 33 made of _0.52 Al _0.3 As has 400 Å
They are laminated and further have an electron density of 5 × 10 ¹⁸ / cm ³ Ga
_A cap layer 34 made of _0.7 Al _0.3 As is laminated by 100 liters. Further, drain and source ohmic electrodes 35 and 36 are vapor-deposited and formed in predetermined regions on the cap layer 34, and the ohmic electrodes 35 and 3 are further alloyed.
A high-concentration n-type layer (a region indicated by a dotted line in FIG. 5) is formed under 6.

Further, in the remaining regions on the ohmic electrodes 35 and 36 and on the cap layer 34 excluding a predetermined region for forming the Schottky gate electrode 38, Si is formed.
An insulating film 37 made of N is laminated with a thickness of about 500Å to 1000Å. In the region where the Schottky gate electrode is formed (the region between the drain and the source), the rectangular opening A ₃ due to the insulating film 37 not being partially formed, and the cap layer corresponding to the opening A _3. A recess structure is provided that penetrates 37 and reaches a part of the upper portion of the donor supply layer 33. Within the recess structure, a Schottky gate electrode 3 that forms a Schottky junction with the donor supply layer 33 is provided.
8 is formed by vacuum evaporation. The Schottky gate electrode 38 is made of Ti / Pt / Au, respectively.
It is formed by sequentially vacuum depositing a thickness of 0Å / 500Å / 5000Å.

Here, the Schottky gate electrode 38 is further added.
Is connected only to the donor supply layer 33, and the remaining portion does not contact the side wall of the cap layer 34 and the opening A
₃ to the outside of the insulating film 37 and further to the opening A ₃
The insulating film 37 is overlapped on the outside of the.

The HEMT having this structure was formed by the following manufacturing process. The description will be given according to the manufacturing process of the first embodiment shown in FIG. 2. First, the first manufacturing process (FIG.
(Corresponding to the step (a)), the molecular beam epitaxy (MBE) method and the organometallic vapor phase epitaxy (OMVP) are used.
By the method E), the buffer layer 31, the channel layer 32, the donor supply layer 33, and the cap layer 34 were sequentially laminated on the GaAs substrate 30 to have the above predetermined thickness.

Next, in the second manufacturing process (corresponding to the process shown in FIG. 2B), the drain and source ohmic electrodes 35 and 36 are vapor-deposited and formed on predetermined regions on the cap layer 34, and then an alloy treatment is performed. Thus, a high concentration n-type layer was formed under the ohmic electrodes 35 and 36. Next, the insulating film 37 of SiN was formed to a thickness of about 500 to 1000 Å by the plasma CVD method. The SiN insulating film 37 can be formed at a relatively low temperature, but an insulating material that can be formed at a temperature lower than SiN, such as SiO ₂ or SiON, may be applied.

Next, in the third manufacturing process (corresponding to the process of FIG. 2C), a well-known photolithography technique is applied to the photoresist (corresponding to the photoresist FA shown in FIG. 2). At the same time, the portion of the insulating film 37 that will become the opening A ₃ was removed. That is, this opening A
₃ serves as a mask when performing recess etching, and almost defines the channel length and channel width of the gate. Then, after forming the opening A ₃ , the photoresist was removed.

Next, in the fourth manufacturing process (corresponding to the process of FIG. 2D), the well-known photolithography technique is applied again, and the region B including the opening A ₃ and wider than that is included. A photoresist (corresponding to the photoresist FB shown in FIG. 2) was applied to the remaining areas except for ₃ . After the photoresist is formed in this way, the insulating film 3
7 and the photoresist as a mask, the donor supply layer 33
Of the cap layer 34 is recess-etched.

An etching solution of sulfuric acid solution and hydrogen peroxide solution was applied to this recess etching. By this recess etching, as shown in the drawing, a recess structure corresponding to the opening A ₃ is formed in the donor supply layer 33, and
The cap layer 34 was slightly laterally expanded and etched from the opening A ₃ of the insulating film 37. Therefore, the space formed in the cap layer 34 by this recess structure is wider than the opening A ₃ of the insulating film 37 in the lateral direction.

Next, 500Å / 500Å / 5000 respectively
After forming Ti / Pt / Au with a thickness of Å to cover the opening A ₃ and the region B ₃ by sequentially vacuum-depositing Ti / Pt / Au, the unnecessary photoresist is removed by lift-off process. A Schottky gate electrode 38 was formed as shown. As a result of applying the vacuum deposition method, as shown in FIG. 5, the Schottky gate electrode 38 is formed.
Is formed in a rectangular shape along the opening A ₃ of the insulating film 37 and therefore contacts the donor supply layer 33, but the opening A ₃
It was formed so as not to come into contact with the cap layer 34 that is etched further inward. Furthermore, the unnecessary photoresist is removed by lift-off processing, so that the Schottky gate electrode 38 is formed on the insulating film 37 (outside).
Area B ₃ was vapor-deposited. Therefore, the opening A ₃ is sealed by the overlap of the Schottky gate electrode 38 to the outside, and the internal void due to the recess structure is
Completely shielded from the outside atmosphere.

As described above, according to this embodiment, as shown in FIG. 5, since the Schottky gate electrode 38 which covers the insulating film 37 and contacts the donor supply layer 33 is formed, the Schottky gate electrode is formed. It was possible to eliminate the cause of the electrode 38 itself blocking the recess structure from the outside and causing the deterioration of the electrical characteristics such as the oxidation of the donor supply layer 33 and the inclusion of impurities.

Although the HEMT has been described in this embodiment, the present invention is not limited to this, and the MESF having a recess structure is used.
The present invention can be applied to ET and other compound semiconductor devices.

[0046]

As described above, according to the present invention,
Since the lateral opening area (air gap) of the cap layer by the recess structure is larger than the opening area of the opening formed in the insulating film, the sidewall of the Schottky gate electrode and the sidewall of the cap layer formed by vacuum deposition are formed. A vacuum space is created between the and. Therefore, the Schottky gate electrode does not come into direct contact with the cap layer and makes a Schottky junction only with the donor supply layer, so that the HEMT or MESF is not formed.
A gate of a compound semiconductor device such as ET is realized. Further, since the Schottky gate electrode is formed so as to overlap the outside thereof through the opening of the insulating film, it is possible to keep the vacuum state by blocking / sealing the void in the recess structure from the outside. it can. As a result, for example,
It is possible to prevent a problem that impurities are mixed in a portion where the donor supply layer is exposed in the recess structure and electrical characteristics are deteriorated. As a more specific example of the effect, when a compound semiconductor device having a recess structure similar to the conventional one is manufactured, the recess structure is exposed to the external atmosphere, so that a part of the donor supply layer is exposed to the external atmosphere. This exposed part in the process (such as the peripheral part where the Schottky gate electrode is formed)
However, when the recess structure of the present invention is applied, such a problem does not occur.

Further, the present invention is a HEMT or MES having a recess structure for forming a Schottky gate electrode.
It can be widely applied to various other compound semiconductor devices such as FETs. Further, the recess structure of the present invention is not limited to being applicable only to a specific compound semiconductor, but can be widely applied to compound semiconductor devices formed of various compound semiconductors. Further, since the extremely complicated and special manufacturing process is not required, the present invention can be easily carried out and an excellent effect can be provided.

[Brief description of drawings]

FIG. 1 is an explanatory view showing a structure of a first embodiment of a compound semiconductor device according to the present invention in a transmission plane and a vertical section.

FIG. 2 is an explanatory diagram showing a method of manufacturing the compound semiconductor device of the first embodiment in the order of steps.

FIG. 3 is a vertical cross-sectional view showing the structure of a modified example of the compound semiconductor device according to the first example.

FIG. 4 is a vertical sectional view showing the structure of a second embodiment of the compound semiconductor device according to the present invention.

FIG. 5 is a vertical sectional view showing the structure of a third embodiment of the compound semiconductor device according to the present invention.

FIG. 6 is a vertical cross-sectional view showing the structure of a conventional compound semiconductor device.

[Explanation of symbols]

10, 20, 30 ... Substrate 11, 21, 31 ... Buffer layer, 12, 32 ... Channel layer, 13, 22, 32 ... Donor supply layer, 14, 23, 34 ... Cap layer, 17, 2
6, 37 ... Insulating film, 18, 27, 38 ... Schottky gate electrode, FA, FB ... Photoresist.

Claims (7)

[Claims] 1. A compound semiconductor device having a recess gate structure, comprising: a cap layer laminated on a donor supply layer; an insulating layer laminated on the cap layer; and the insulating layer corresponding to a gate formation region. And a gap in a direction orthogonal to the direction of the donor supply layer, which is formed so as to reach the donor supply layer in the portion of the cap layer corresponding to the opening. The recess formed to be wider than the opening region of the opening, and the recess formed directly on the donor supply layer through the opening and the recess and without contacting the side end of the cap layer in the recess. A compound semiconductor device, comprising: a Schottky gate electrode formed through the opening to an outer end of the insulating layer so as to overlap. 2. The compound semiconductor device according to claim 1, wherein the recess is formed by an etching process using the insulating film having the opening as a mask. 3. The donor supply layer is In _x Al _y As
(Where, x + y = 1,0 <x , 0 <y) consists, said cap layer is a In _m Ga _n As (where, m + n =
The compound semiconductor device according to claim 1, wherein the compound semiconductor device comprises: 1, 0 <m, 0 <n). 4. The donor supply layer is Ga _s Al _t As
(Where s + t = 1, 0 <s, 0 <t), and the cap layer is made of GaAs. 5. The donor supply layer is Ga _α Al _β A
s (where α + β = 1, 0 <α, 0 <β),
The cap layer is made of In _γ Ga _δ As (where γ + δ
2. The compound semiconductor device according to claim 1, wherein the compound semiconductor device comprises: 1, 0 <γ, 0 <δ). 6. The compound semiconductor device according to claim 1, wherein the insulating layer is made of SiN. 7. A method of manufacturing a compound semiconductor device having a recess gate structure, comprising: laminating a cap layer on a donor supply layer, then laminating an insulating film having a partial opening on the cap layer, By etching the cap layer through the portion, a concave portion that reaches the donor supply layer and becomes a void in the lateral direction in a range larger than the opening area of the opening is formed, and the inside of the concave portion is formed by vacuum vapor deposition. 2. A method of manufacturing a compound semiconductor device, wherein a Schottky gate electrode is formed only in the donor supply layer, and the Schottky gate electrode is formed so as to overlap with the outside of the opening through the opening.