JPH06235934A - Translucent insulating substrate with uneven oxide film, method of manufacturing the same, and TFT liquid crystal display device using the same - Google Patents
Translucent insulating substrate with uneven oxide film, method of manufacturing the same, and TFT liquid crystal display device using the sameInfo
- Publication number
- JPH06235934A JPH06235934A JP34437692A JP34437692A JPH06235934A JP H06235934 A JPH06235934 A JP H06235934A JP 34437692 A JP34437692 A JP 34437692A JP 34437692 A JP34437692 A JP 34437692A JP H06235934 A JPH06235934 A JP H06235934A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- insulating substrate
- bus electrode
- electrode
- translucent insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Liquid Crystal (AREA)
- Formation Of Insulating Films (AREA)
- Thin Film Transistor (AREA)
Abstract
(57)【要約】
【目的】 凹凸酸化膜付き透光性絶縁性基板を用いて配
線抵抗の低い絵素面積の広い平坦なTFT液晶表示装置
を提供すること。
【構成】 透光性絶縁性基板1上に凹凸酸化膜12を陽
極酸化法にて作り、その凹部パターン12bに配線電極
を形成し、ゲートバス電極とソースバス電極の交差部を
表面に突出させないようにする。これにより電極の線幅
を電気抵抗を高くすることなく狭くすることができる。
(57) [Summary] [Object] To provide a flat TFT liquid crystal display device having a wide pixel area and a low wiring resistance, using a translucent insulating substrate with an uneven oxide film. [Structure] An uneven oxide film 12 is formed on a translucent insulating substrate 1 by an anodic oxidation method, a wiring electrode is formed in the recess pattern 12b, and an intersection of a gate bus electrode and a source bus electrode is not projected on the surface. To do so. As a result, the line width of the electrode can be reduced without increasing the electric resistance.
Description
【0001】[0001]
【産業上の利用分野】本発明は、凹凸酸化膜付き透光性
絶縁性基板とその製造方法およびこれを用いたTFT
(薄膜トランジスタ)液晶表示装置に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a translucent insulating substrate with an uneven oxide film, a method for producing the same, and a TFT using the same.
(Thin film transistor) The present invention relates to a liquid crystal display device.
【0002】[0002]
【従来の技術】従来、TFT液晶表示装置のゲート電極
には、Al、Cr、Ta等が用いられ、またソース・ド
レイン電極には、Al、Ti、Mo等の金属導電膜が用
いられている。一方、コンピュータの端末としてのTF
T液晶表示装置としては、高精細・高速応答・高視認性
が要求されており、特に画像のちらつきがない高輝度が
要望されている。この要望に応えるためには、絵素面積
を増やさなければならず、ゲート電極の線幅を狭くしか
つ電極線抵抗を下げなければならない。2. Description of the Related Art Conventionally, Al, Cr, Ta or the like is used for a gate electrode of a TFT liquid crystal display device, and a metal conductive film of Al, Ti, Mo or the like is used for source / drain electrodes. . On the other hand, TF as a computer terminal
The T liquid crystal display device is required to have high definition, high speed response, and high visibility, and in particular, high luminance without flicker of an image is required. To meet this demand, the pixel area must be increased, the line width of the gate electrode must be narrowed, and the electrode line resistance must be reduced.
【0003】図5は、従来技術で作成したTFT液晶表
示装置の面内配線パターンの一例を示しており、図6は
図5のX−X線断面図、図7は図5のY−Y線断面図で
ある。これらの図において、1は透光性絶縁性基板、2
はゲートバス電極、2aはゲート電極、3は絶縁膜、4
は半導体層、4aは半導体保護層、5はオーミックコン
タクト層、6はソースバス電極、7はドレイン電極、8
は絵素電極である。すなわちゲートバス電極2およびソ
ースバス電極6は絶縁膜3を介して交差した構造になっ
ている。ゲートバス電極2の線幅を狭くすると、同一の
電極線抵抗を確保するには金属導電膜の膜厚を厚くしな
ければならず、こうするとパターンエッジが急峻になる
ため、ゲートバス電極2とソースバス電極6の交差部で
電気的に短絡し易くなる。そこでゲートバス電極2上の
絶縁膜3としては、電極パターンの側面にも絶縁膜が形
成される陽極酸化膜や化学気相成長法で製膜された窒化
珪素膜や酸化珪素膜が用いられている。FIG. 5 shows an example of an in-plane wiring pattern of a TFT liquid crystal display device produced by a conventional technique. FIG. 6 is a sectional view taken along line XX of FIG. 5, and FIG. 7 is YY of FIG. It is a line sectional view. In these figures, 1 is a transparent insulating substrate, 2
Is a gate bus electrode, 2a is a gate electrode, 3 is an insulating film, 4
Is a semiconductor layer, 4a is a semiconductor protective layer, 5 is an ohmic contact layer, 6 is a source bus electrode, 7 is a drain electrode, 8
Is a pixel electrode. That is, the gate bus electrode 2 and the source bus electrode 6 have a structure intersecting with each other with the insulating film 3 interposed therebetween. If the line width of the gate bus electrode 2 is narrowed, the film thickness of the metal conductive film must be increased in order to secure the same electrode line resistance. If this is done, the pattern edge becomes steeper. Electrical shorts easily occur at the intersections of the source bus electrodes 6. Therefore, as the insulating film 3 on the gate bus electrode 2, an anodic oxide film in which an insulating film is formed on the side surface of the electrode pattern, a silicon nitride film or a silicon oxide film formed by a chemical vapor deposition method is used. There is.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、ワーク
・ステーションのような300万画素以上の表示が必要
な超高精細・高速応答カラー表示端末を従来技術を用い
たTFT液晶表示装置で作ると、ゲートバス電極の線幅
が狭くできず、また画像のちらつきを防ぐ補助容量が大
きくできなくなる。さらに、ゲートバス電極の線幅を狭
くして膜厚を厚くすると、ソースバス電極と交差した部
分において対向電極とのギャップが局所的に狭くなり、
機械的強度が不足して、この交差部でのゲートバス電極
とソースバス電極との電気的短絡が生じる確率を増やす
こととなる。However, if an ultra-high-definition, high-speed response color display terminal that requires a display of 3 million pixels or more, such as a work station, is made with the TFT liquid crystal display device using the conventional technique, the gate is The line width of the bus electrodes cannot be reduced, and the auxiliary capacitance that prevents image flicker cannot be increased. Furthermore, when the line width of the gate bus electrode is narrowed to increase the film thickness, the gap with the counter electrode is locally narrowed at the portion intersecting with the source bus electrode,
The mechanical strength is insufficient, which increases the probability that an electrical short circuit will occur between the gate bus electrode and the source bus electrode at this intersection.
【0005】本発明は、このような従来の問題を解決す
るものであり、ゲートバス電極とソースバス電極の電気
抵抗を高くすることなく線幅を狭くすることのできる凹
凸酸化膜付き透光性絶縁性基板とその製造方法およびこ
れを用いたTFT液晶表示装置を提供することを目的と
する。The present invention is intended to solve such a conventional problem, and is capable of narrowing the line width without increasing the electric resistances of the gate bus electrode and the source bus electrode, and the translucency with an uneven oxide film. An object is to provide an insulating substrate, a method for manufacturing the insulating substrate, and a TFT liquid crystal display device using the same.
【0006】[0006]
【課題を解決するための手段】本発明は、上記目的を達
成するために、ゲートバス電極およびソースバス電極を
形成するための導電性薄膜を製膜する前に、透光性絶縁
性基板上に陽極酸化法と熱酸化法等により凹凸酸化膜を
形成し、その凹部パターンにバス電極を形成してTFT
液晶表示装置を作成するようにしたものである。In order to achieve the above object, the present invention provides a transparent insulating substrate on which a conductive thin film for forming a gate bus electrode and a source bus electrode is formed. An uneven oxide film is formed on the anodic oxidation method and thermal oxidation method, and a bus electrode is formed on the concave pattern to form a TFT.
A liquid crystal display device is produced.
【0007】[0007]
【作用】本発明は、上記構成により、ゲートバス電極の
電気抵抗を低減し、高速応答性が確保でき、しかもゲー
トバス電極およびソースバス電極との交差部のパターン
エッジでの段差を凹部パターン内に形成することによ
り、電気的短絡が発生しにくく、性能が安定する。ま
た、絵素電極の面積を拡大できることにより、表示装置
としての性能の向上も図れる。According to the present invention, with the above structure, the electric resistance of the gate bus electrode can be reduced, high-speed responsiveness can be ensured, and the step at the pattern edge at the intersection of the gate bus electrode and the source bus electrode can be formed in the concave pattern. By forming it, the electrical short circuit is unlikely to occur and the performance is stable. Further, since the area of the pixel electrode can be increased, the performance of the display device can be improved.
【0008】[0008]
【実施例1】以下、本発明の実施例について図面を参照
して説明する。説明の便宜上、従来例の説明に用いた符
号を同様な要素に対して用いてある。図1は本発明の第
1の実施例における凹凸酸化膜付き透光性絶縁性基板の
製造工程を示している。図1において、1は透光性絶縁
性基板、9は金属膜、10は凹凸部を形成するためのマ
スク、11は金属膜9を陽極酸化法にて化成した金属酸
化膜であり、12は完成した凹凸酸化膜である。Embodiment 1 An embodiment of the present invention will be described below with reference to the drawings. For convenience of description, the reference numerals used in the description of the conventional example are used for similar elements. FIG. 1 shows a manufacturing process of a translucent insulating substrate with an uneven oxide film in the first embodiment of the present invention. In FIG. 1, 1 is a translucent insulating substrate, 9 is a metal film, 10 is a mask for forming irregularities, 11 is a metal oxide film formed by anodizing the metal film 9, and 12 is a metal oxide film. It is a completed uneven oxide film.
【0009】次に、凹凸酸化膜付き透光性絶縁性基板の
具体的な製法について説明する。透光性絶縁性基板1と
して、コーニング社の7059ガラス基板を用いた。こ
の透光性絶縁性基板1上に、図1(a)に示すように金
属膜9をDCスパッタリング法により、ターゲットはA
lターゲット、スパッタガスにAr、ガス圧0.3Pa
およびスパッタ電力10W/cm2の条件でAl薄膜を
所望の段差に応じた膜厚(100〜2000nm)で成
膜し、さらに図1(b)のように所定の凹凸部を形成す
るためのマスク10をフォトリソグラフィによりレジス
トマスクで形成した。そして、金属膜9の一部を陽極電
極とし、酒石酸を化成液に用いて陽極酸化法により露出
部を金属酸化物に化成し、図1(c)のごとく金属膜9
を陽極酸化法にて化成した金属酸化膜11とした。その
後、レジストマスク10を有機系剥離液で剥離し、さら
にアルカリ水溶液にて未化成部の金属膜9を溶解除去
し、所定の凹部パターンに加工した。さらに、化成が不
十分な部分の酸化を促進するために水分を含むガス雰囲
気にて熱処理を行ない、熱酸化によって透光性絶縁性基
板1の上に図1(d)に示すような、光を透過し、電気
絶縁性の凹凸部12aを有する凹凸酸化膜12を150
から3000nmの高さで形成した。凸部12aと12
aとの間の金属酸化膜11を除去された凹部パターン1
2bの幅は3ミクロン以上の高精度で形成できた。Next, a specific method for manufacturing the translucent insulating substrate with the uneven oxide film will be described. As the translucent insulating substrate 1, a 7059 glass substrate manufactured by Corning Incorporated was used. A metal film 9 is formed on the translucent insulating substrate 1 by a DC sputtering method as shown in FIG.
l target, sputtering gas Ar, gas pressure 0.3 Pa
And a mask for forming an Al thin film with a film thickness (100 to 2000 nm) according to a desired step difference under conditions of a sputtering power of 10 W / cm 2 and further forming a predetermined uneven portion as shown in FIG. 10 was formed with a resist mask by photolithography. Then, a part of the metal film 9 is used as an anode electrode, tartaric acid is used as a chemical conversion liquid, and the exposed portion is converted into a metal oxide by an anodic oxidation method. As shown in FIG.
Was used as the metal oxide film 11 formed by the anodic oxidation method. After that, the resist mask 10 was stripped with an organic stripping solution, the unformed portion of the metal film 9 was dissolved and removed with an alkaline aqueous solution, and processed into a predetermined recess pattern. Further, heat treatment is performed in a gas atmosphere containing water in order to promote the oxidation of the insufficiently formed portion, and thermal oxidation is performed on the translucent insulating substrate 1 as shown in FIG. 150 nm of the uneven oxide film 12 having an electrically insulating uneven portion 12a.
To 3000 nm in height. Convex portions 12a and 12
The recess pattern 1 from which the metal oxide film 11 between
The width of 2b could be formed with high accuracy of 3 microns or more.
【0010】本実施例では、凹凸の形成方法としてアル
ミニウムを用いて陽極酸化法で形成する方法を示した
が、その他に金属膜9にタンタル金属を用いても、陽極
酸化してパターニング性良く形成することができた。タ
ンタル金属の場合は、大気中熱処理により簡単に化成が
不十分なところを酸化物に変えることができた。In this embodiment, the method of forming unevenness by using aluminum as an anodizing method has been shown. However, even if tantalum metal is used for the metal film 9, anodization is performed to form with good patterning property. We were able to. In the case of tantalum metal, it was possible to easily convert the insufficient chemical conversion to oxide by heat treatment in air.
【0011】[0011]
【実施例2】次に、本発明の第2の実施例であるTFT
液晶表示装置について説明する。図2はTFT液晶表示
装置の面内配線パターンを示しており、図3は図2のA
−A線断面図、図4は図2のB−B線断面図である。こ
れらの図において、1は透光性絶縁性基板、2はゲート
バス電極、2aはゲート電極、3は絶縁膜、4は半導体
層、4aは半導体保護層、5はオーミックコンタクト
層、6はソースバス電極、7はドレイン電極、8は絵素
電極である。また、12は上記した方法により透光性絶
縁性基板1の表面に陽極酸化法により作成した凹凸酸化
膜である。Second Embodiment Next, a TFT which is a second embodiment of the present invention.
The liquid crystal display device will be described. 2 shows an in-plane wiring pattern of the TFT liquid crystal display device, and FIG. 3 shows A of FIG.
-A line sectional view, FIG. 4 is a BB line sectional view of FIG. In these figures, 1 is a translucent insulating substrate, 2 is a gate bus electrode, 2a is a gate electrode, 3 is an insulating film, 4 is a semiconductor layer, 4a is a semiconductor protective layer, 5 is an ohmic contact layer, and 6 is a source. A bus electrode, 7 is a drain electrode, and 8 is a pixel electrode. Reference numeral 12 is an uneven oxide film formed on the surface of the translucent insulating substrate 1 by the anodic oxidation method by the above-mentioned method.
【0012】次に、TFT液晶表示装置の具体的な製法
について説明する。透光性絶縁性基板1として使用した
コーニング社の7059ガラス基板上に、ゲートバス電
極2とソースバス電極6を形成するための凹部パターン
12bを有する凹凸酸化膜12をあらかじめ実施例1で
示した方法で形成した。次にDCスパッタリング法によ
り、ターゲットはAlターゲット、スパッタガスにA
r、ガス圧0.3Paおよびスパッタ電力10W/cm
2の条件でAl薄膜を500nmの膜厚で成膜し、所定
のパターンをウェットエッチング法により形成してゲー
トバス電極2およびゲート電極2aとした。そして、絶
縁膜3として、プラズマCVD法により基板温度350
℃で窒化シリコン膜を400nm、半導体層4としてa
−Si膜100nmと半導体保護層4aとして窒化シリ
コン膜を100nmで連続的に製膜した。そして、半導
体保護層4aを所定のパターンに加工した。オーミック
コンタクト層5としてn+ 型a−Si膜を30nmの厚
みで製膜した後、半導体層4と同時に島状にパターン形
成した。その後、ゲートバス電極2およびゲート電極2
aと同じAl薄膜500nmの膜厚で製膜し、所定のパ
ターンに加工し、ソースバス電極6およびドレイン電極
7を形成した。その後、絵素電極8としてITO膜を2
00nmの厚みで製膜パターンニングして形成した。以
上のように構成されたTFT液晶表示装置を動作したと
ころ、良好な結果を得ることができた。Next, a specific method of manufacturing the TFT liquid crystal display device will be described. The concave-convex oxide film 12 having the concave pattern 12b for forming the gate bus electrode 2 and the source bus electrode 6 was formed on the 7059 glass substrate of Corning Inc. used as the translucent insulating substrate 1 in advance in Example 1. Formed by the method. Next, by the DC sputtering method, the target is an Al target and the sputtering gas is A.
r, gas pressure 0.3 Pa, and sputtering power 10 W / cm
An Al thin film was formed to a film thickness of 500 nm under the condition 2 and a predetermined pattern was formed by a wet etching method to form the gate bus electrode 2 and the gate electrode 2a. Then, as the insulating film 3, the substrate temperature is set to 350 by the plasma CVD method.
A silicon nitride film of 400 nm at a temperature of
A silicon nitride film having a thickness of 100 nm and a silicon nitride film having a thickness of 100 nm were continuously formed as the semiconductor protective layer 4a. Then, the semiconductor protective layer 4a was processed into a predetermined pattern. After forming an n + -type a-Si film with a thickness of 30 nm as the ohmic contact layer 5, an island-shaped pattern was formed simultaneously with the semiconductor layer 4. Then, the gate bus electrode 2 and the gate electrode 2
The Al thin film having the same film thickness as that of a, 500 nm, was formed and processed into a predetermined pattern to form the source bus electrode 6 and the drain electrode 7. After that, an ITO film is used as the pixel electrode 8
It was formed by film forming patterning with a thickness of 00 nm. When the TFT liquid crystal display device configured as described above was operated, good results could be obtained.
【0013】本実施例では、凹凸酸化膜12の形成方法
として陽極酸化法を用いたことにより、ゲートバス電極
2とソースバス電極6は線幅の狭い電気抵抗の低い電極
が形成でき、絵素電極8の面積を拡大することができ
た。In this embodiment, since the anodic oxidation method is used as the method for forming the uneven oxide film 12, the gate bus electrode 2 and the source bus electrode 6 can be formed as electrodes having a narrow line width and low electric resistance, and the pixel element The area of the electrode 8 could be increased.
【0014】[0014]
【発明の効果】以上のように、本発明は、TFT液晶表
示装置の透光性絶縁性基板上に凹凸酸化膜を設けてその
凹部パターンにゲートバス電極とソースバス電極とを形
成するようにしたので、ゲートバス電極とソースバス電
極の電気抵抗を高くすることなく線幅を狭くすることが
できるとともに絵素電極の面積を拡大することができ、
しかもゲートバス電極およびソースバス電極の交差部の
対抗電極とのギャップの機械的圧力による電気的短絡を
防ぐことができ、平坦で信頼性および性能の高いTFT
液晶表示装置を実現することができる。As described above, according to the present invention, the uneven oxide film is provided on the translucent insulating substrate of the TFT liquid crystal display device, and the gate bus electrode and the source bus electrode are formed in the concave pattern. Therefore, the line width can be narrowed and the area of the pixel electrode can be increased without increasing the electric resistance of the gate bus electrode and the source bus electrode.
In addition, it is possible to prevent an electrical short circuit due to mechanical pressure in the gap between the counter electrode and the intersection of the gate bus electrode and the source bus electrode, and to provide a flat, highly reliable and high performance TFT.
A liquid crystal display device can be realized.
【図1】本発明の第1の実施例における凹凸酸化膜付き
透光性絶縁性基板の製造工程を示す断面模式図である。FIG. 1 is a schematic sectional view showing a manufacturing process of a translucent insulating substrate with an uneven oxide film in a first example of the present invention.
【図2】本発明の第2の実施例におけるTFT液晶表示
装置の面内配線パターン図である。FIG. 2 is an in-plane wiring pattern diagram of a TFT liquid crystal display device according to a second embodiment of the present invention.
【図3】図2のA−A線断面図である。3 is a cross-sectional view taken along the line AA of FIG.
【図4】図2のB−B線断面図である。FIG. 4 is a sectional view taken along line BB in FIG.
【図5】従来のTFT液晶表示装置の面内配線パターン
図である。FIG. 5 is an in-plane wiring pattern diagram of a conventional TFT liquid crystal display device.
【図6】図5のX−X線断面図である。6 is a cross-sectional view taken along line XX of FIG.
【図7】図5のY−Y線断面図である。7 is a cross-sectional view taken along line YY of FIG.
1 透光性絶縁性基板 2 ゲートバス電極 2a ゲート電極 3 絶縁膜 4 半導体層 4a 半導体保護層 5 オーミックコンタクト層 6 ソースバス電極 7 ドレイン電極 8 絵素電極 9 金属膜 10 マスク 11 金属酸化膜 12 凹凸酸化膜 12a 凸部 12b 凹部パターン 1 translucent insulating substrate 2 gate bus electrode 2a gate electrode 3 insulating film 4 semiconductor layer 4a semiconductor protective layer 5 ohmic contact layer 6 source bus electrode 7 drain electrode 8 picture element electrode 9 metal film 10 mask 11 metal oxide film 12 unevenness Oxide film 12a Convex portion 12b Recessed pattern
Claims (3)
可能な凹部パターンを有する酸化膜を表面に備えた凹凸
酸化膜付き透光性絶縁性基板。1. A translucent insulating substrate with an uneven oxide film having an oxide film having a concave pattern capable of forming a gate bus electrode and a source bus electrode on the surface.
望の凹部パターンを酸化しないようにマスクし、陽極酸
化法により凸部となる部分を化成して酸化膜を形成し、
その後マスクを除去して金属膜を溶解除去し、さらに熱
酸化処理を施したことを特徴とする凹凸酸化膜付き透光
性絶縁性基板の製造方法。2. A metal film is formed on a translucent insulating substrate, a desired concave pattern is masked so as not to oxidize, and a convex portion is formed by anodization to form an oxide film,
After that, the mask is removed to dissolve and remove the metal film, and a thermal oxidation process is further performed, which is a method for manufacturing a translucent insulating substrate with an uneven oxide film.
縁性基板を用い、その凹部パターンにゲートバス電極と
ソースバス電極を形成したことを特徴とするTFT液晶
表示装置。3. A TFT liquid crystal display device comprising the translucent insulating substrate with an uneven oxide film according to claim 1, wherein a gate bus electrode and a source bus electrode are formed in a pattern of the recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34437692A JPH06235934A (en) | 1992-12-24 | 1992-12-24 | Translucent insulating substrate with uneven oxide film, method of manufacturing the same, and TFT liquid crystal display device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34437692A JPH06235934A (en) | 1992-12-24 | 1992-12-24 | Translucent insulating substrate with uneven oxide film, method of manufacturing the same, and TFT liquid crystal display device using the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06235934A true JPH06235934A (en) | 1994-08-23 |
Family
ID=18368766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34437692A Pending JPH06235934A (en) | 1992-12-24 | 1992-12-24 | Translucent insulating substrate with uneven oxide film, method of manufacturing the same, and TFT liquid crystal display device using the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06235934A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011197657A (en) * | 2010-02-26 | 2011-10-06 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
-
1992
- 1992-12-24 JP JP34437692A patent/JPH06235934A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011197657A (en) * | 2010-02-26 | 2011-10-06 | Semiconductor Energy Lab Co Ltd | Liquid crystal display device |
| US9048325B2 (en) | 2010-02-26 | 2015-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Display device having an oxide semiconductor transistor |
| US9658506B2 (en) | 2010-02-26 | 2017-05-23 | Semiconductor Energy Laboratory Co., Ltd. | Display device having an oxide semiconductor transistor |
| US10539845B2 (en) | 2010-02-26 | 2020-01-21 | Semiconductor Energy Laboratory Co., Ltd. | Display device having an oxide semiconductor transistor |
| US10983407B2 (en) | 2010-02-26 | 2021-04-20 | Semiconductor Energy Laboratory Co., Ltd. | Display device having an oxide semiconductor transistor |
| US11927862B2 (en) | 2010-02-26 | 2024-03-12 | Semiconductor Energy Laboratory Co., Ltd. | Display device having an oxide semiconductor transistor |
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