JPH0622991Y2 - Compound semiconductor wafer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a compound semiconductor having a semiconductor device formed in large numbers on a compound semiconductor substrate and having a scribe line structure for dividing into individual chips. Regarding wafers.

(Prior Art) Conventionally, in a manufacturing process of a semiconductor device using a compound semiconductor substrate of GaAs, InP, GaAsP, etc., a semiconductor wafer having a large number of semiconductor devices formed on the compound semiconductor substrate is divided into individual chips. At that time, a method of dividing using a diamond point scriber (hereinafter, referred to as a scriber) or a dicing saw was adopted. In general, the state of the wafer at the time of division is such that the substrate surface of the compound semiconductor substrate is exposed in the expected division region (hereinafter referred to as a scribe line). Therefore, the conventional ordinary scribe line structure has a structure in which the substrate surface is exposed to the scribe line.

FIG. 2 is a diagram for explaining a conventional method for dividing a semiconductor wafer having such a scribe line structure into individual chips for each semiconductor device.

It should be noted that this figure is a wafer cross-sectional view showing only the peripheral portion including the scribe line, and the semiconductor devices on both sides of the scribe line are omitted.

In the figure, 10 indicates a part of a semiconductor wafer, and 11 indicates a compound semiconductor substrate (hereinafter referred to as substrate 11).

Reference numeral 12 denotes a scribe line. Since the scribe line 12 is divided into individual chips for each semiconductor device, the scribe line 12 is formed by exposing a part of the substrate surface between the semiconductor devices (not shown) on the substrate 11. There is.

Further, in this figure, in order to clarify the positional relationship between the scribe line 12 and the semiconductor device, on the substrate 11 on both sides of the scribe line 12, the interlayer insulating film and the wiring metal film sequentially formed at the time of manufacturing the semiconductor device. The respective edges 13, 14 and 15 of the film and the passivation film are shown respectively. A silicon oxide film is generally used as the passivation film.

A scratch or a cut is formed in the compound semiconductor substrate along the scribe line 12 with a scriber or a dicing saw, and then pressure is applied to the main surface of the substrate 11 to divide into individual chips.

However, since compound semiconductor substrates such as GaAs, InP, and GaAsP are harder and more brittle than silicon substrates and the like, if a process for dividing these substrates into chips by a scriber or a dicing saw is performed, the process is performed. In some cases, a crack or a crack reaching the semiconductor device may occur in the peripheral area of the portion, or a corner of the semiconductor device may be missing. These obstacles have been a cause of deterioration of the characteristics of the semiconductor device and reduction of the manufacturing yield of the semiconductor device.

In order to prevent the occurrence of this obstacle, when forming a cut in the substrate 11 with a dicing saw, as a blade used by being attached to the dicing saw, a blade formed of fine-grained diamond is used, and this blade is further Generation of cracks and cracks was suppressed by rotating the substrate at a high speed and moving it on the substrate at a low speed for processing.

Further, the width of the scribe line 12 is generally set to 80 to 100 μm so as to prevent the cracks and the like from reaching the semiconductor device even if cracks or the like occur. It was one of the causes.

In addition, as disclosed in JP-A-58-162047, for the purpose of reducing the occurrence of cracks, etc. and shortening the processing time by speeding up the traveling speed of the blade, A method has been proposed in which a resist is applied on the substrate 11 so as to cover the scribe line 12, and a notch is formed on the resist so as to reach the substrate 11 with a dicing saw.

(Problems to be solved by the invention) However, in the conventional scribing line structure, it is necessary to slow down the advancing speed of the blade that advances on the substrate 11 when performing processing for dividing into chips by a dicing saw, and There was a problem that it took time to divide. Further, since it is necessary to widen the width of the scribe line 12, there is a problem that the area of the scribe line 12 on the substrate 11 is increased and the integration degree of the semiconductor device on the substrate 11 is reduced.

Further, the method of dividing the semiconductor device after applying the resist on the substrate 11 has a problem that it takes time to apply the resist and peel the resist after dividing into the chips. Further, if the resist is not sufficiently peeled off, the residue of the resist deteriorates the characteristics of the semiconductor device.

Further, the resist causes the eyes of the blade of the dicing saw to be clogged during processing, which reduces the processing speed and accelerates the wear of the expensive blade.

As described above, the conventional scribe line structure has excellent mass productivity, low cost, high yield, and cannot be divided into individual chips for each semiconductor device formed in large numbers on the substrate 11.

An object of the present invention is to solve such problems and to prevent cracks, breaks, and missing semiconductor devices when dividing a compound semiconductor wafer having a large number of semiconductor devices formed on a compound semiconductor substrate into individual chips. Without causing
An object of the present invention is to provide a compound semiconductor wafer having a scribe line structure that is excellent in mass productivity, low in cost, and can be divided into individual chips with high yield.

(Means for Solving the Problem) In order to achieve this object, according to the present invention, a scribe line structure having a large number of semiconductor devices formed on a compound semiconductor substrate and dividing into individual chips is provided. In the compound semiconductor wafer, the scribe line structure is formed on at least a part of the substrate surface area along the scribe line on both sides of the scribe line, and on at least the substrate surface exposed to the scribe line. And an insulating film formed on the metal film, and only the amorphous film is formed on the scribe line.

(Operation) With this configuration, a metal film is provided on the substrate surface on both sides of the scribe line provided between the semiconductor devices on the compound semiconductor substrate and along the scribe line. An amorphous film is provided on the substrate corresponding to the scribe line. Therefore, when a process for dividing a compound semiconductor wafer having a large number of semiconductor devices formed on the compound semiconductor substrate into individual chips by using a scriber or a dicing saw or the like, first, a non-formation formed on the surface of the compound semiconductor substrate is performed. The crystalline film is processed, and then the compound semiconductor substrate is processed.

Therefore, the initial impact when the diamond cutter of the scriber or the blade of the dicing saw contacts the compound semiconductor substrate and the stress during processing are absorbed by the metal film and the amorphous film formed on the compound semiconductor substrate. . further,
The metal films formed on both sides of the scribe line suppress the cleavage of the compound semiconductor substrate below the metal film.

Further, according to the structure of the present invention, since only the amorphous film is formed in the substrate region exposed to the scribe line, the stress applied to the substrate by this amorphous film is extremely small, and therefore, There is no risk of cracks on the wafer.

Further, since the amorphous film is also formed on the upper side of the metal film, the amorphous film acts to more effectively suppress the peeling of the metal film during the scribing work.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

In these figures, the same components as those of the conventional one are designated by the same reference numerals. Also, these figures are shown schematically so that the present invention can be understood. The scribe line structure will be described here by explaining the manufacturing process thereof.

FIGS. 1A to 1D are process drawings for explaining one embodiment of the present invention.

These figures show ME as a semiconductor device on a GaAs substrate.
FIG. 2 shows a wafer cross section of a scribe line formed on a substrate between MESFETs for dividing a compound semiconductor wafer having a large number of SFETs into individual chips, similar to the conventional diagram (FIG. 2). ME that is a semiconductor device
The SFET is not shown.

In the figure, 11 is a GaAs substrate as a compound semiconductor substrate.
Indicates 11. First, at the same time as forming an ohmic electrode (not shown) of the MESFET, AuGe (Ge12 wt%) / which is a metal for forming this ohmic electrode is formed by a lift-off method.
Using Ni / Au, for example, a metal film 17 having a width of 20 μm as a guard pattern on both sides of the scribe line 12 having a width of 50 μm on the substrate surface along the scribe line.
Are formed to obtain the wafer structure shown in FIG.

Next, a silicon oxide film, for example, having a thickness of about 4000 Å is formed as an interlayer insulating film on the entire surface of this wafer by the CVD method. Next, at the same time as the step of opening the contact window of the MESFET, the silicon oxide film on the scribe line 12 is removed by a dilute hydrofluoric acid solution or the RIE method using CF ₄ or the like to remove the substrate surface corresponding to the scribe line 12. Expose.

Here, the part of the silicon oxide film on the scribe line 12 is removed. The reason is that if the silicon oxide film in this part is left, the amorphous film (see FIG. (Indicated by 15 in)), the total thickness of the amorphous film becomes too large, and cracks may occur due to the stress of the amorphous film having this large thickness. is there.

Next, Ti / Pt / Au is formed as a wiring metal film on this wafer by the lift-off method to obtain the wafer structure shown in FIG. 1 (B). In FIG. 1 (B), 13 is MES.
An end portion of the interlayer insulating film of the FET and an end portion of the wiring metal film of the MESFET are shown at 14, respectively.

Next, the entire surface of this wafer is subjected to MESFE by the CVD method.
As the T passivation film 15, an amorphous film, for example, an amorphous silicon nitride film 15 is formed with a film thickness of 4000Å to 6000Å to obtain a wafer structure shown in FIG. 1 (C). In this way, a scribe line structure including a metal film formed on at least a part of the substrate surface region along both sides of the scribe line and an amorphous film provided on the metal film and the scribe line is obtained.

After the back surface of this wafer is adhered to an adhesive sheet, it is placed and fixed on a scriber or a dicing saw. Next, a scriber or a dicing saw is driven to form a notch 16 on the amorphous silicon nitride film 15 along the scribe line 12 in the wafer (FIG. 1 (D)).

Next, the wafer adhered to this adhesive sheet is removed from the scriber or dicing saw, and pressure is applied to the wafer from the back surface of the adhesive sheet to obtain GaA.
A large number of MESFETs formed on the s substrate 11 can be divided into individual chips.

In the above-described embodiment, the substrate 11 is GaAs, the semiconductor device formed on the substrate is MESFET, and the semiconductor device formed on the substrate 11 is divided into individual chips for separation. This method is not limited to the type of substrate and the type of semiconductor device formed on the substrate, and other compound semiconductor substrates such as I
The same can be done when dividing another semiconductor device formed on a substrate of nP, GaAsP, or the like, such as a light emitting diode, into individual chips for each semiconductor device.

Further, in the embodiment, at the same time when the ohmic electrode of the MESFET is formed, AuGe (Ge1) which is a metal forming the electrode is formed.
2 wt%) / Ni / Au was used to form the metal film 17, but the metal used here and the step of forming the metal are not limited to those in this embodiment. Forming metals Al, Pt, W, T
i or the like may be used, or Ti / Pt / Au used as a wiring metal material may be formed at the same time when the wiring metal film is formed.

In the embodiment, the metal film layer 17 having a width of 20 μm is formed on both sides of the scribe line 12 on the surface of the substrate along the scribe line. The width of the metal film 17 depends on the type of the substrate 11, the substrate 11
It goes without saying that it may be changed depending on the type of semiconductor device formed above. Further, the metal film 17 may be formed in a part of the substrate surface area corresponding to the scribe line 12, or on both sides of the scribe line 12 in a part of the substrate surface area along the scribe line 12. May be. Further, the metal film 17 may be formed wide on the substrate surface on both sides of the scribe line 12 as long as it does not affect the semiconductor devices formed on both sides of the scribe line 12.

Further, after the metal film 17 is formed, the substrate 11 and the metal film 17 are heat-treated, for example, in a nitrogen atmosphere, at a temperature of about 400 ° C. for 1 minute, so that the metal film 17 The metal atoms are thermally diffused into the substrate 11, and the surrounding substrate 11 under the metal film 17
It is also possible to form an amorphous alloy layer on the surface of and to form the passivation film 15 on this alloy layer.

The amorphous silicon nitride film used in the embodiment may be an amorphous silicon oxide film.

(Effects of the Invention) As is apparent from the above, according to the compound semiconductor wafer having the scribe line structure of the present invention, the scribe lines on both sides of the scribe line provided between each semiconductor device on the compound semiconductor substrate are provided. A metal film is formed on the substrate surface along the line, and an amorphous film is further formed on the metal film and the substrate corresponding to the scribe line. Therefore, when a process for dividing a compound semiconductor wafer having a large number of semiconductor devices formed on the compound semiconductor substrate into individual chips by using a scriber or a dicing saw or the like, first, a non-formation formed on the surface of the compound semiconductor substrate is performed. The crystalline film is processed, and then the compound semiconductor substrate is processed.

Therefore, the initial impact when the diamond cutter of the scriber or the blade of the dicing saw contacts the compound semiconductor substrate and the stress during processing are absorbed by the metal film and the amorphous film formed on the compound semiconductor substrate. .

Further, the metal films formed on both sides of the scribe line can suppress the cleavage of the compound semiconductor substrate under the metal film, and can significantly reduce the cracks and breaks generated in the compound semiconductor substrate.

In addition, compared to the conventional scribe line structure, in which a resist is applied to reduce cracks and breaks,
In the scribe line structure of the present invention, a metal film can be formed in a step of forming an ohmic electrode during a manufacturing process of a semiconductor device, and an amorphous film can be formed in a step of forming a passivation film. For this reason, it is possible to reduce the cracks and breaks that occur in the compound semiconductor substrate without increasing the number of steps.

Therefore, the width of the scribe line can be made smaller than in the past, and the integration degree of the semiconductor device on the compound semiconductor substrate can be increased.

Furthermore, compared with the conventional scribe line structure in which the substrate is directly processed, the structure of the present invention can perform processing for dividing into chips by a scriber or a dicing saw at a processing speed of 2 to 3 times. It is possible to significantly suppress the influence of cracks and breaks on the semiconductor device.

In addition, in the substrate area exposed to the scribe line,
Since only the amorphous film is formed, the stress applied to the substrate by this amorphous film is extremely small, and therefore, there is no risk of cracks occurring in the wafer.

Further, since the amorphous film is formed on the upper side of the metal film, the amorphous film can more effectively suppress the peeling of the metal film during the scribing work.

Therefore, a compound semiconductor wafer having a large number of semiconductor devices formed on a compound semiconductor substrate can be divided into individual chips with excellent mass productivity, low cost, and high yield.

[Brief description of drawings]

1 (A) to 1 (D) are process diagrams for explaining one embodiment of the compound semiconductor wafer of the present invention, and FIG. 2 is a diagram for explaining a conventional compound semiconductor wafer. 11 ... Compound semiconductor substrate, 12 ... Scribe line 13 ... End of interlayer insulating film of semiconductor device 14 ... End of wiring metal film of semiconductor device 15 ... Passivation film 16 ... Notch, 17 ... Metal film.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Creator Katsumi Uenishi 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd. (56) Reference JP-A-57-164546 (JP, A) JP JP-A-55-124243 (JP, A) JP-A-58-93266 (JP, A) JP-B-49-33907 (JP, B2)

Claims (1)

[Scope of utility model registration request] 1. A compound semiconductor wafer having a large number of semiconductor devices formed on a compound semiconductor substrate and having a scribe line structure for dividing into individual chips, wherein a scribe line structure is provided on both sides of the scribe line. A metal film formed on at least a part of the substrate surface region along the scribe line; an amorphous film formed on at least the substrate surface exposed to the scribe line; and an insulation formed on the metal film. A film, wherein only the amorphous film is formed on the scribe line, and the amorphous film extends from above the scribe line to above the insulating film. A characteristic compound semiconductor wafer.