JPH0620307B2 - Image signal exchange device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image signal exchange apparatus for providing services such as a videophone and a video conference.

(Prior art and its problems) In recent years, there has been an increasing demand for services centering on moving images such as videophones and video conferences, and a wideband high-speed switching system capable of exchanging wideband high-speed signals such as moving images. Research and development are underway.

Generally, the bandwidth of the video signal is 4MHz, and this is PCM
When encoded, the bit rate thereof reaches 70 Mb / s or more, and therefore sufficient multiplicity cannot be obtained only by using a time-division switch network for the image signal exchange method. For example, IEICE Technical Report SE83 to 10525. As described in "Consideration of Wide-Band Communication Configuration Method" on page 30 (Tawara et al.), There are many methods that use an analog or digital space division switch circuit network for the switch circuit network of the image signal exchange system.

However, as the number of accommodated lines increases, the number of switch elements required for the space division switch network increases, and the hardware scale increases significantly.

On the other hand, digital video information with a small amount of motion such as a TV conference is 1.5 to 6 by using an interframe encoder.
Since the bandwidth can be compressed to about Mb / s, the time division switch network can be applied.

FIG. 3 is a block diagram of a conventional image signal exchange system. The operation of the interframe encoder 300 will be described. An analog video signal applied to the input terminal 400 is converted into a PCM code by the low pass wave filter 303 and the 8-bit PCM encoder 304. Further, in the subtractor 302, P
The CM code is compared with the PCM code sent from the frame memory 301 at the same position one frame before. Therefore, if there is a significant difference, the logic control circuit 305 controls the switch 306 and a new PCM code from the encoder 304 (hereinafter,
The frame memory 301 is updated to "new information". At the same time, the output buffer memory 307 is instructed to write new information, and the address information indicating the position of the updated pixel on the screen is transmitted from the address generator 308 to the buffer memory 307. On the other hand, when there is no significant difference, the switch 306 is in the position shown, and the previous information is stored as it is. The buffer memory 307 writes a PCM code having a significant difference that arrives at an indefinite time interval to level the information transmission rate, and further adds address information to the PCM code to form an image signal of a predetermined output pulse train. In this way, the buffer memory 307 adjusts the position and the degree of concentration of new information serving as pixels to be transmitted according to the degree of movement on the screen.

The plurality of image signals digitally encoded by the interframe encoders 300 and 309 in this way are input to the time-division switch network constituted by the multiplexing circuit 310, the communication path memory 311, the control memory 312 and the demultiplexing circuit 313. Added to.

The multiplexing circuit 310 shown in FIG. 3 time-division-multiplexes a plurality of image signals obtained in this way, and then sends them to the entrance-side highway 314. The plurality of time-division multiplexed image signals are sequentially written in the memory cell 316 by the write gate 315 in the communication path memory 311. The readout gate 317 in the communication path memory 311 thus performs phase conversion by reading out a plurality of image signals once stored in the memory cell 316 according to the order stored in the control memory 312, and time division multiplexing is performed. The generated new image signal is output to the output highway 318. The time-division-multiplexed image signal thus obtained is separated by the separation circuit 313, and then separated by the inter-frame decoder 31.
9 and 320 inputs.

The image signal that arrives at the input of the inter-frame decoder 319 in this way is first written in the input buffer memory 321, and then the address comparison circuit 322 makes the address generator 3
After comparing the output of 23 with the address read from the buffer memory 321, new information is transferred from the buffer memory 321 to the frame memory 325 via the switch 324. The image signal thus obtained in the frame memory 325 is converted into an analog signal by the 8-bit PCM decoder 326 and the low pass wave filter 327, and then output to the output terminal 401.

As described above, the image signal exchange system shown in FIG.
For example, a video signal of 4 MHz band applied to the input terminals 400 and 402 is converted into a digital signal of about 1.5 to 6 Mb / s by the interframe encoders 300 and 309, and then the multiplexing circuit 310, the channel memory 311, the control memory 3
After time-division switching is performed by the time-division switch network composed of 12 and separation circuit 313, it is converted again into analog signals by inter-frame decoders 319 and 320 and output to output terminals 401 and 403.

However, in the conventional image signal exchange system shown in FIG. 3, even if band compression is performed by the interframe encoders 300 and 309, the number of subscribers increases and the highway speed increases, so that, for example, current switching is performed as the channel memory 311. It becomes necessary to use high-speed memory such as logic. Generally, a high-speed memory of ECL is expensive and consumes a lot of power, so that a heat radiation measure is required.

(Object of the Invention) An object of the present invention is to reduce the channel memory by
An object of the present invention is to provide an image signal exchange device capable of reducing cost and power consumption.

(Structure of the Invention) An image signal exchange apparatus according to the present invention encodes an input video signal by inter-frame coding, temporarily stores the video signal in an output buffer memory, and then outputs the coded signals. Means for time-division-multiplexing the plurality of video signals that have been time-division-multiplexed, means for time-division-demultiplexing the plurality of video signals time-division-multiplexed by the means for time-division-multiplexing, and time-division-multiplexing for the means for time-division-multiplexing. At least a plurality of decoding means for temporarily storing a plurality of divided and separated video signals in an input buffer memory and then decoding the plurality of video signals, and the time division multiplexing means time division multiplexes the plurality of video signals. It is characterized in that at least one of the order and the order for separating the time-division-multiplexed video signals is controlled by the means for time-division-separation.

(Detailed Description of Configuration) The present invention uses a buffer memory included in an interframe encoder or an interframe decoder as a speech path memory to realize a speech memory for time switch at the first stage or the last stage of a time divisional switch network. It is something to reduce.

(Example) Hereinafter, the Example of this invention is described in detail with reference to drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention. In FIG. 1, the same reference numerals as those in FIG. 3 denote the same components as those in FIG.

By providing a first-in-first-out memory in the buffer memories 307 and 321 of the interframe encoders 300 and 309 and using the output stage thereof as a channel memory, the channel memory 311 shown in FIG. 3 is omitted. be able to.

That is, in this embodiment, the multiplexer circuit 310 time-division-multiplexes the image information stored in the buffer memories 307 of the interframe encoders 300 and 309 in accordance with the order stored in the control memory 312, thereby performing the switching function. Is fulfilling. In this way, the image signal sent to the highway 100 that is time-division multiplexed is separated by the separation circuit 3.
After being separated by 13, the signal is added to the inputs of the interframe decoders 319 and 320, converted into an analog video signal again, and then output.

In this embodiment, the time-division exchange function is achieved by controlling the order of reading from the buffer memories 307 of the inter-frame encoders 300 and 309. However, the time-division multiplexed image signal is inter-frame decoder 319. The same effect can be obtained by controlling the order of writing to the buffer memories 321 included in and 320 respectively.

FIG. 2 is a block diagram showing a second embodiment of the present invention.

Inputs to the multiplexing circuits 200 and 201 shown in FIG. 2 are supplied to interframe encoders 202, 203 and 2 respectively.
The outputs of 04 and 205 are connected, and the multiplex circuit 200
And 201 are control memories 206 and 20 respectively.
7 performs the function of a time switch by reading out the image signals stored in the interframe encoders 202, 203 and 204, 205, respectively, according to the order stored in 7. In this way, the image signals time-division multiplexed and output to the highways 208 and 209 are output to the highways 215 and 216 after the connection between the highways is switched by the time-division multiplexing gates 211 to 214 of the space switch 210. . Separation circuit 217
And 218 respectively encode the time-division multiplexed image signals thus obtained on the highways 215 and 216 in the order stored in the control memories 219 and 220, respectively.
It functions as a time switch by writing to 3,224.

That is, the second embodiment of the present invention shown in FIG.
It constitutes a space-time (TST) switch network,
Interframe encoders 202 to 205, interframe decoder 2
By using the buffer memories of 11 to 224 as the speech path memory, the phase conversion function is achieved without providing a speech path memory for time switch as in the conventional case.

(Effects of the Invention) As described above, the present invention is an interframe code provided on an input line and an output line of a time division switch network when the first stage or the last stage of the time division switch network is composed of time switches. By using the buffer memory of the encoder and interframe encoder as the speech channel memory, it is possible to omit the speech channel memory for the time switch, which is expensive and has large power consumption.

[Brief description of drawings]

FIG. 1 is a block diagram showing the first embodiment of the present invention, and FIG.
FIG. 3 is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional image signal exchange system. 300, 309 and 202 to 205 ... Interframe encoder, 307 ... Output buffer memory, 310, 200 and 201 ... Multiplexing circuit, 312, 206, 207, 2
19 and 220 ... Control memory, 311 ... Speech path memory, 313, 217 and 218 ... Separation circuit, 31
9,320 and 221-224 ... Interframe decoder,
321 ... Input buffer memory, 210 ... Space switch.

Claims (1)

[Claims] 1. A plurality of encoding means for inter-frame encoding an input video signal, temporarily storing it in an output buffer memory and then outputting it, and a plurality of video signals encoded by the plurality of encoding means. Means for dividing / multiplexing, means for time-division demultiplexing the plurality of video signals time-division multiplexed by the means for time-division multiplexing, and a plurality of video signals time-division-separated by the means for de-multiplexing time. Each of them has at least a plurality of decoding means for temporarily storing them in an input buffer memory and then decoding, wherein the time division multiplexing means performs time division multiplexing of a plurality of video signals or the time division separation means. An image signal exchange apparatus for controlling at least one of the order of separating a plurality of time division multiplexed video signals.