JPH06209143A - Manufacture of diffraction grating - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a method of manufacturing a diffraction grating capable of controlling the depth of the diffraction grating with high accuracy. [Structure] A semiconductor layer 3 made of a second semiconductor is laminated on a surface of a first semiconductor 2 having a specific crystal plane orientation, and then,
An etching mask 5 for forming a diffraction grating is formed in a specific direction on the semiconductor layer 3 made of the second semiconductor, and then,
By using an etchant whose etching rate stops at specific crystal planes of the first and second semiconductors,
A step of etching the semiconductor layer 3 made of a semiconductor and the first semiconductor 2 and then stacking the semiconductor layer 4 made of a second semiconductor is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a diffraction grating, and more particularly to a method of manufacturing a diffraction grating used in a semiconductor laser device.

[0002]

[Prior Art] Distributed Feed Back (DFB)
The semiconductor laser device oscillates at a single wavelength near the Bragg wavelength determined by the period of the diffraction grating incorporated in the device. Therefore, even in an optical communication system using an optical fiber having wavelength dispersion, its practical application is being advanced as a light source capable of long-distance and large-capacity. The DFB semiconductor laser device is manufactured as follows. That is, 1) A wafer is manufactured in which a buffer layer, a clad layer, an active layer, a guide layer, and the like are sequentially stacked on a substrate, and layers up to a layer for forming a diffraction grating are stacked. 2) Next, a diffraction grating is formed on the wafer by photolithography, chemical etching, or the like. 3) Next, a clad layer, a contact layer, etc. are formed on the layer on which the diffraction grating is formed. 4) Next, a means for confining the injected current is applied. By the way, the product κL of the coupling coefficient κ and the cavity length L is used as the device parameter that determines the characteristics of the DFB semiconductor laser device. Here, the coupling coefficient κ is a coefficient indicating a ratio of coupling of light in both directions by the diffraction grating when light traveling in both directions exists on the waveguide having the diffraction grating. From the viewpoint of stability of single wavelength operation, monochromaticity, and low threshold value operation, the resonator length L is relatively long (600 to 1000 μm).
m) and the κL value is preferably 1.0 to 1.2. In this case, κ is 10 to 20 cm ^-1 . On the other hand, κ
To make this range of values, set the height of the diffraction grating to 100Å
It is necessary to adjust the accuracy to about 20Å. Reference 1: IEEE JQE. Vol.QE18, p1272, 1982.

[0003]

However, it has been difficult to control the height of the diffraction grating on the order of several tens of Å by chemical etching. Incidentally, the currently used etchant (HBr: HNO ₃ : H ₂ O =
When 1: 1: 10) is used, the etching rate becomes 60 Å / sec when used by cooling to 2 ° C.

[0004]

The present invention provides a method of manufacturing a diffraction grating which solves the above problems, in which a semiconductor layer made of a second semiconductor is formed on a first semiconductor surface having a specific crystal plane orientation. And then forming an etching mask for forming a diffraction grating in a specific direction on the semiconductor layer made of the second semiconductor, and then stopping the etching rate at specific crystal planes of the first and second semiconductors. The method is characterized by including the steps of etching the semiconductor layer made of the second semiconductor and the first semiconductor using an etchant, and then stacking the semiconductor layers made of the second semiconductor.

[0005]

As described above, 1) a second semiconductor is formed on the first semiconductor surface having a specific crystal plane orientation.
Stacking a semiconductor layer of a thickness a made of a semiconductor, 2) then forming an etching mask for forming a diffraction grating in a specific direction on the semiconductor layer made of the second semiconductor, 3) then, first and second Using an etchant whose etching rate stops at a specific crystal plane of the semiconductor,
The semiconductor layer made of the second semiconductor and the first semiconductor are etched. Then, assuming that the etching depth of the first semiconductor is H, the etching depth of a + H is obtained. 4) Next, a semiconductor layer made of a second semiconductor is laminated on the etching surface. Then, a diffraction grating having a depth H is formed with the first semiconductor and the second semiconductor as boundaries. In the above process, the etching depth a + H is uniquely determined by the angle between the plane orientation of the first semiconductor surface and the specific crystal planes of the first and second semiconductors at which the etching rate stops. Therefore, by controlling the thickness a of the semiconductor layer made of the second semiconductor with high accuracy, the depth H of the diffraction grating can also be accurately controlled.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the embodiments shown in the drawings. FIG. 1 is a process explanatory view of an embodiment of a method of manufacturing a diffraction grating according to the present invention. The process is as follows. That is, 1) GaInAsP on the surface of the wafer 1 with the plane orientation (100)
On the layer 2 (λg = 1.3 μm, thickness 0.5 μm), the InP layer 3 having a thickness a of 400 Å is laminated (FIG. 1).
(A)). 2) Next, a diffraction grating etching mask 5 is formed on the surface of the InP layer 3 with a spacing d of 2400Å, an oscillation direction of <011>, and a diffraction grating groove perpendicular to the <0-11> direction (FIG. 1). (B)). 3) Then, HBr: HNO ₃ : H ₂ O = 1: 1: 10
Etching is performed using an etchant composed of to form a diffraction grating (FIG. 1C). The reason for using this etchant is that there is a certain crystal plane,
In this case, the InP layer 3 and the GaInAsP layer 2 (1
This is because the etching does not proceed on the surface 11). By the way, the (111) plane in this case makes an angle of about 54 ° with respect to the surface of the wafer 1 having the plane orientation (100).
Therefore, the etching depth of the triangular shape is equal to that of the InP layer 3 and G
When the etching depths of the aInAsP layer 2 are a and H, respectively, a + H = d / 2 · tan 54 °, that is, 1650
Å (= 2400/2 / 1.38). 4) Next, the InP layer 4 is laminated (FIG. 1D). In this way, a diffraction grating having a height of 1250Å (= 1650Å-400Å) can be formed on the surface of the GaInAsP layer 2.

When the thickness a of the InP layer 3 is changed in the above process, a + H is constant, so that the height H of the diffraction grating can be changed. For example, the thickness of the InP layer 3 is 600Å
Then, the height of the diffraction grating becomes 1050Å. Therefore, by controlling the thickness of the InP layer 3 with the accuracy of several Å, the height of the diffraction grating can be controlled with the accuracy of several Å. It should be noted that the present invention is not limited to the above-mentioned embodiment, but AlGa
It is also applicable to As / GaAs type, AlGaInAs / InP type, etc., and as the etchant, brom methanol, (HBr: H ₂ O ₂ : H ₂ O), (HBr: saturated bromine water :: H ₂ O), etc. are used. it can.

[0008]

As described above, according to the present invention, a semiconductor layer made of a second semiconductor is laminated on a first semiconductor surface having a specific crystal plane orientation, and then a semiconductor made of the second semiconductor. An etching mask for forming a diffraction grating is formed on a layer in a specific direction, and then a semiconductor layer made of the second semiconductor is formed by using an etchant whose etching rate stops at specific crystal planes of the first and second semiconductors. Since the method further includes the step of etching the first semiconductor and then stacking the semiconductor layer made of the second semiconductor, there is an excellent effect that the depth of the diffraction grating can be accurately controlled.

[Brief description of drawings]

1A to 1D are process explanatory views of an embodiment of a method for manufacturing a diffraction grating according to the present invention.

[Explanation of symbols]

 1 Wafer 2 GaInAsP Layer 3, 4 InP Layer 5 Etching Mask

Claims (1)

[Claims] 1. A semiconductor layer made of a second semiconductor is laminated on a first semiconductor surface having a specific crystal plane orientation, and then,
An etching mask for forming a diffraction grating is formed on a semiconductor layer made of the second semiconductor in a specific direction, and then an etchant whose etching rate is stopped at specific crystal planes of the first and second semiconductors is used. A method of manufacturing a diffraction grating, comprising the steps of etching a semiconductor layer made of a second semiconductor and a first semiconductor, and then stacking a semiconductor layer made of a second semiconductor.