JPH06208030A - Optical coupling structure - Google Patents
Optical coupling structureInfo
- Publication number
- JPH06208030A JPH06208030A JP305193A JP305193A JPH06208030A JP H06208030 A JPH06208030 A JP H06208030A JP 305193 A JP305193 A JP 305193A JP 305193 A JP305193 A JP 305193A JP H06208030 A JPH06208030 A JP H06208030A
- Authority
- JP
- Japan
- Prior art keywords
- light
- light emitting
- emitting element
- receiving element
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Optical Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、同一基板上に形成され
た発光素子と受光素子とを結合する光結合構造に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical coupling structure for coupling a light emitting element and a light receiving element formed on the same substrate.
【0002】[0002]
【従来の技術及び発明が解決しようとする課題】LSI
等の集積回路においてはその高集積化のために電気配線
が細線化している。これに伴い配線遅延時間や発熱に問
題が生じ、光を配線に用いることが考えられている。こ
のとき、1992年固体素子コンファランス予稿集10
−12頁にあるように、LSI上に設けられた発光素
子、受光素子の接続にはLSIとは別に設けられた光回
路用の基板が用いられていた。2. Description of the Related Art LSI to be Solved
In such integrated circuits, electric wiring is thinned for higher integration. Along with this, problems occur in wiring delay time and heat generation, and it is considered to use light for wiring. At this time, 1992 Proceedings of Solid State Conference 10
As shown on page -12, a substrate for an optical circuit provided separately from the LSI has been used for connecting the light emitting element and the light receiving element provided on the LSI.
【0003】しかし、この構造ではLSIと光回路用の
基板とを別に作製した後、さらに位置合わせを行う必要
があり、行程が複雑であること、また位置合わせ後、そ
の固定が必要であり、長期に亙って安定性に問題があっ
た。However, in this structure, after the LSI and the substrate for the optical circuit have to be manufactured separately, it is necessary to perform further alignment, which complicates the process, and it is necessary to fix them after alignment. There was a problem with stability over the long term.
【0004】また、上記問題点を解決する方法として、
直接LSI上に光回路を設置することも可能であるが、
LSIがガリウム砒素(GaAs)であり、発光素子お
よび受光素子がインジウムリン(InP)を主成分とす
る材料で作られている場合、または、LSIがシリコン
(Si)であり、発光素子および受光素子がGaAsま
たはInPを主成分とする材料で作られている場合にお
いては、良好な発光素子および受光素子を得るために発
光素子部、受光素子部の厚さを厚くしている。As a method for solving the above problems,
Although it is possible to install the optical circuit directly on the LSI,
When the LSI is gallium arsenide (GaAs) and the light emitting element and the light receiving element are made of a material whose main component is indium phosphide (InP), or when the LSI is silicon (Si), the light emitting element and the light receiving element Is made of a material containing GaAs or InP as a main component, the thickness of the light emitting element portion and the light receiving element portion is increased in order to obtain a good light emitting element and light receiving element.
【0005】このため、LSIの電子回路における段差
よりもさらに大きな段差を生じており、その接続は困難
であった。また、光回路からの電子回路への光の漏洩は
誤動作の大きな原因の一つであった。For this reason, a step which is larger than the step in the electronic circuit of the LSI is generated, and the connection thereof is difficult. Further, leakage of light from the optical circuit to the electronic circuit is one of the major causes of malfunction.
【0006】本発明は、上記問題に鑑み、段差のある基
板上に形成された発光素子と受光素子を容易に結合し、
かつ基板への光の漏洩を減少させる光結合構造を提供す
ることを目的とする。In view of the above problems, the present invention easily couples a light emitting element and a light receiving element formed on a substrate having a step,
And it aims at providing the optical coupling structure which reduces the leak of the light to a board | substrate.
【0007】[0007]
【課題を解決するための手段】前記目的を達成する本発
明に係る光結合構造は、電子回路と発光素子及び受光素
子とを具備する半導体基板上で該発光素子と受光素子と
を結合する光結合構造において、上記発光素子,受光素
子のいずれか一方又は両方と上記電子回路とがなす段差
を平坦にする平坦化層を形成すると共に当該平坦化層の
上層に光導波構造を配設してなることを特徴とする。An optical coupling structure according to the present invention that achieves the above-mentioned object is an optical coupling structure for connecting a light emitting element and a light receiving element on a semiconductor substrate having an electronic circuit, a light emitting element and a light receiving element. In the coupling structure, a flattening layer for flattening a step formed by one or both of the light emitting element and the light receiving element and the electronic circuit is formed, and an optical waveguide structure is provided on the flattening layer. It is characterized by
【0008】また、上記構造において、段差を平坦化す
る平坦化層の少なくとも一部が光吸収層であっても良
い。Further, in the above structure, at least a part of the flattening layer for flattening the step may be a light absorbing layer.
【0009】以下、本発明の内容を説明する。The contents of the present invention will be described below.
【0010】図1は、本発明の構成を説明する図であ
る。同図中1は基板、2は電子回路、3は発光素子、4
は受光素子、5は平坦化層、6は光導波路を各々図示す
る。基板1の上には電子回路2と発光素子3及び受光素
子4が搭載されている。電子回路2と発光素子3,受光
素子4との間には段差が生ずるため、発光素子3と受光
素子4とを効率よく結合するための光導波路6を作製す
るために、平坦化層5を形成し、その後この平坦化層5
の上層に光導波路6を形成する。FIG. 1 is a diagram for explaining the configuration of the present invention. In the figure, 1 is a substrate, 2 is an electronic circuit, 3 is a light emitting element, 4
Is a light receiving element, 5 is a flattening layer, and 6 is an optical waveguide. An electronic circuit 2, a light emitting element 3, and a light receiving element 4 are mounted on the substrate 1. Since a step is generated between the electronic circuit 2 and the light emitting element 3 and the light receiving element 4, the flattening layer 5 is formed in order to produce the optical waveguide 6 for efficiently coupling the light emitting element 3 and the light receiving element 4. And then this flattening layer 5
The optical waveguide 6 is formed on the upper layer.
【0011】このとき平坦化層5の上面に光導波路6を
作製するため、フォトリソグラフィやドライエッチング
など通常のパターン化技術を用いることができ、光導波
路と光素子の位置合わせも容易にできる。At this time, since the optical waveguide 6 is formed on the upper surface of the flattening layer 5, ordinary patterning techniques such as photolithography and dry etching can be used, and the optical waveguide and the optical element can be easily aligned.
【0012】図1においては発光素子3、受光素子4は
横方向に発光、受光する形態のものを示してあるが、縦
方向のものについても適用可能である。In FIG. 1, the light-emitting element 3 and the light-receiving element 4 are shown in the form of emitting and receiving light in the horizontal direction, but they can be applied to those of the vertical direction.
【0013】また、平坦化層5としては発光素子3から
の光を吸収する材料を用いたり、また光を吸収する材料
を分散することにより光導波路6からの漏洩光が電子回
路2に及ぼす影響を減少することができる。The flattening layer 5 is made of a material that absorbs the light from the light emitting element 3, or the material that absorbs the light is dispersed, so that the light leaked from the optical waveguide 6 affects the electronic circuit 2. Can be reduced.
【0014】このように本発明は、発光素子およびまた
は受光素子と電子回路により形成される段差を平坦化
し、光の結合を容易にするとともに、該平坦化部分に光
吸収層を設けることで光導波路からの漏洩光を減少する
ようにしている。As described above, according to the present invention, the step formed by the light emitting element and / or the light receiving element and the electronic circuit is flattened to facilitate the coupling of light, and the flattened portion is provided with the light absorption layer to guide light. The light leaked from the waveguide is reduced.
【0015】[0015]
【実施例】以下、本発明の好適な実施例を説明する。 (実施例1)電子回路2を有するSi基板1の一部にG
aAs、歪超格子、InPからなるバッファ層を成長
し、その上にInGaAs、InGaAsP多重量子井
戸(MQW)を活性層とする1.5μm帯のレーザー構造
を成長し、その一部を発光素子3、一部を受光素子4と
した。The preferred embodiments of the present invention will be described below. (Example 1) G is formed on a part of the Si substrate 1 having the electronic circuit 2.
A buffer layer made of aAs, strained superlattice and InP is grown, and a 1.5 μm band laser structure using InGaAs and InGaAsP multiple quantum wells (MQW) as active layers is grown on the buffer layer, and a part of the laser structure is grown. , Part of which is the light receiving element 4.
【0016】発光部の基板からの段差は15μmであっ
た。平坦化層5にはポリメチルメタクリレートを5μm
の厚さにスピンコートした。次に、重水素化メタクリレ
ートと重水素化フッ化メタクリレートとの共重合体を、
8μmの厚さにスピンコートし、ガイド層とした。The step of the light emitting portion from the substrate was 15 μm. Polymethyl methacrylate is 5 μm for the flattening layer 5.
Was spin-coated to a thickness of. Next, a copolymer of deuterated methacrylate and deuterated fluorinated methacrylate,
A guide layer was formed by spin coating to a thickness of 8 μm.
【0017】次いで、重水素化メタクリレートの割合を
増加した共重合体を4μmの厚さにスピンコートし、フ
ォトリソグラフィとドライエッチングとを用いて発光素
子3と受光素子4とを結合するコアを作製し、次に前記
ガイドと同じ共重合体を塗布した。電子回路2のエラー
レイトは光素子駆動時も増大しなかった。Next, a copolymer having an increased proportion of deuterated methacrylate was spin-coated to a thickness of 4 μm, and a core for connecting the light emitting element 3 and the light receiving element 4 was produced by using photolithography and dry etching. Then, the same copolymer as the above guide was applied. The error rate of the electronic circuit 2 did not increase even when the optical element was driven.
【0018】(実施例2)電子回路2を有するGaAs
基板1の一部に、歪超格子、InPからなるバッファ層
を成長し、その上にInGaAsP、InGaAsP多
重量子井戸(MQW)を活性層とする1.3μm帯のレー
ザー構造を成長し、その一部を発光素子3、一部を受光
素子4とした。(Example 2) GaAs having an electronic circuit 2
A buffer layer made of strained superlattice and InP is grown on a part of the substrate 1, and a 1.3 μm band laser structure using InGaAsP and InGaAsP multiple quantum wells (MQW) as active layers is grown on the buffer layer. A part is a light emitting element 3, and a part is a light receiving element 4.
【0019】発光部の基板からの段差は13μmであっ
た。平坦化層5にはポリメチルメタクリレートを4μm
の厚さにスピンコートした。次に、重水素化メタクリレ
ートと重水素化フッ化メタクリレートとの共重合体を6
μmの厚さにスピンコートし、ガイド層とした。The step of the light emitting portion from the substrate was 13 μm. Polymethyl methacrylate is 4 μm for the flattening layer 5.
Was spin-coated to a thickness of. Next, a copolymer of deuterated methacrylate and deuterated fluorinated methacrylate was added to 6
A guide layer was formed by spin coating to a thickness of μm.
【0020】次いで、重水素化メタクリレートの割合を
増加した共重合体を4μmの厚さにスピンコートし、フ
ォトリソグラフィとドライエッチングを用いて発光素子
3と受光素子4とを結合するコアを作製し、次に前記ガ
イドと同じ共重合体を塗布した。電子回路2のエラーレ
イトは光素子駆動時も増大しなかった。Next, a copolymer having an increased proportion of deuterated methacrylate was spin-coated to a thickness of 4 μm, and a core for connecting the light-emitting element 3 and the light-receiving element 4 was produced by photolithography and dry etching. Then, the same copolymer as the above guide was applied. The error rate of the electronic circuit 2 did not increase even when the optical element was driven.
【0021】(実施例3)電子回路2を有するSi基板
1の一部に、GaAs、歪超格子、GaAsからなるバ
ッファ層を成長し、その上にGaAs、AlGaAs多
重量子井戸(MQW)を活性層とする0.8μm帯のレー
ザー構造を成長し、その一部を発光素子3、一部を受光
素子4とした。(Embodiment 3) A buffer layer made of GaAs, strained superlattice and GaAs is grown on a part of a Si substrate 1 having an electronic circuit 2, and GaAs and AlGaAs multiple quantum wells (MQW) are activated thereon. A 0.8 μm band laser structure as a layer was grown, and a part thereof was used as a light emitting element 3 and a part thereof was used as a light receiving element 4.
【0022】発光部の基板からの段差は7μmであっ
た。平坦化層5およびガイド層にはポリカーボネートを
5μmの厚さにスピンコートし、これにメタクリレート
モノマーを含浸させ、加熱して重合した。The step of the light emitting portion from the substrate was 7 μm. Polycarbonate was spin-coated on the flattening layer 5 and the guide layer to a thickness of 5 μm, and this was impregnated with a methacrylate monomer and heated to polymerize.
【0023】次に、ポリカーボネートを4μmの厚さに
スピンコートし、これにメタクリレートモノマーを含浸
させフォトリソグラフィを用いて発光素子3と受光素子
4とを結合するコア以外の部分のモノマを重合した後、
残存モノマを除去した。電子回路2のエラーレイトは光
素子駆動時も増大しなかった。Next, polycarbonate was spin-coated to a thickness of 4 μm, and this was impregnated with a methacrylate monomer to polymerize a monomer other than the core connecting the light emitting element 3 and the light receiving element 4 using photolithography. ,
The residual monomer was removed. The error rate of the electronic circuit 2 did not increase even when the optical element was driven.
【0024】(実施例4)電子回路2を有するSi基板
1の一部に、GaAs、AlGaAs多重量子井戸(M
QW)を活性層とする0.8μm帯のレーザー構造を接着
し、その一部を発光素子3、一部を受光素子4とした。
発光部の基板からの段差は15μmであった。(Embodiment 4) GaAs, AlGaAs multiple quantum wells (M
A 0.8 μm band laser structure having a QW) as an active layer was adhered, and a part thereof was used as a light emitting element 3 and a part thereof was used as a light receiving element 4.
The step difference from the substrate of the light emitting portion was 15 μm.
【0025】平坦化層5には炭素粉末を混入したポリイ
ミドを7μmの厚さにスピンコートした。次にポリメタ
クリレートを8μmの厚さにスピンコートし、ガイド層
とした。Polyimide mixed with carbon powder was spin-coated on the flattening layer 5 to a thickness of 7 μm. Next, polymethacrylate was spin-coated to a thickness of 8 μm to form a guide layer.
【0026】次に、ポリベンジルメタクリレートを3μ
mの厚さにスピンコートし、フォトリソグラフィとドラ
イエッチングとを用いて発光素子3と受光素子4とを結
合するコアを作製し、次にポリメタクリレートを塗布し
た。電子回路2のエラーレイトは光素子駆動時も増大し
なかった。Then, 3 μl of polybenzyl methacrylate was added.
A core for coupling the light emitting element 3 and the light receiving element 4 was produced by spin coating to a thickness of m using photolithography and dry etching, and then polymethacrylate was applied. The error rate of the electronic circuit 2 did not increase even when the optical element was driven.
【0027】[0027]
【発明の効果】以上説明したように、本発明の光結合構
造によれば、半導体のプロセスと同様な方法を用いるこ
とができ、容易に半導体上の発光素子と受光素子を結合
することが可能である。As described above, according to the optical coupling structure of the present invention, a method similar to the semiconductor process can be used, and the light emitting element and the light receiving element on the semiconductor can be easily coupled. Is.
【図1】本発明の構成を説明する図である。FIG. 1 is a diagram illustrating a configuration of the present invention.
1 基板 2 電子回路 3 発光素子 4 受光素子 5 平坦化層 6 光導波路 1 substrate 2 electronic circuit 3 light emitting element 4 light receiving element 5 planarization layer 6 optical waveguide
Claims (2)
備する半導体基板上で該発光素子と受光素子とを結合す
る光結合構造において、上記発光素子,受光素子のいず
れか一方又は両方と上記電子回路とがなす段差を平坦に
する平坦化層を形成すると共に当該平坦化層の上層に光
導波構造を配設してなることを特徴とする光結合構造。1. An optical coupling structure for coupling a light emitting element and a light receiving element on a semiconductor substrate having an electronic circuit, a light emitting element and a light receiving element, and one or both of the light emitting element and the light receiving element and the above. An optical coupling structure comprising: forming a flattening layer for flattening a step formed by an electronic circuit and disposing an optical waveguide structure on the flattening layer.
坦化層の少なくとも一部が光吸収層であることを特徴と
する光結合構造。2. The optical coupling structure according to claim 1, wherein at least a part of the flattening layer for flattening the step is a light absorbing layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP305193A JPH06208030A (en) | 1993-01-12 | 1993-01-12 | Optical coupling structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP305193A JPH06208030A (en) | 1993-01-12 | 1993-01-12 | Optical coupling structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06208030A true JPH06208030A (en) | 1994-07-26 |
Family
ID=11546528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP305193A Pending JPH06208030A (en) | 1993-01-12 | 1993-01-12 | Optical coupling structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06208030A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7403676B2 (en) | 2004-06-09 | 2008-07-22 | Nec Corporation | Optical waveguide module |
| WO2010137661A1 (en) * | 2009-05-28 | 2010-12-02 | シチズンホールディングス株式会社 | Light source device |
-
1993
- 1993-01-12 JP JP305193A patent/JPH06208030A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7403676B2 (en) | 2004-06-09 | 2008-07-22 | Nec Corporation | Optical waveguide module |
| WO2010137661A1 (en) * | 2009-05-28 | 2010-12-02 | シチズンホールディングス株式会社 | Light source device |
| JP5294283B2 (en) * | 2009-05-28 | 2013-09-18 | シチズンホールディングス株式会社 | Light source device |
| US8704447B2 (en) | 2009-05-28 | 2014-04-22 | Citizen Holdings Co., Ltd. | Light source device |
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| Date | Code | Title | Description |
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Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20001003 |