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JPH06177507A - Circuit board manufacturing method - Google Patents

Circuit board manufacturing method

Info

Publication number
JPH06177507A
JPH06177507A JP35266792A JP35266792A JPH06177507A JP H06177507 A JPH06177507 A JP H06177507A JP 35266792 A JP35266792 A JP 35266792A JP 35266792 A JP35266792 A JP 35266792A JP H06177507 A JPH06177507 A JP H06177507A
Authority
JP
Japan
Prior art keywords
circuit
brazing material
circuit board
pattern
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35266792A
Other languages
Japanese (ja)
Inventor
Kozo Kashiwagi
孝三 柏木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Kikinzoku Kogyo KK
Original Assignee
Tanaka Kikinzoku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Kikinzoku Kogyo KK filed Critical Tanaka Kikinzoku Kogyo KK
Priority to JP35266792A priority Critical patent/JPH06177507A/en
Publication of JPH06177507A publication Critical patent/JPH06177507A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】 【目的】 エッチング不良を無くし、回路の寸法、形状
をより精度の高いものにでき、且つ接合強度も高いもの
にできる回路基板の製造方法を提供する。 【構成】 Cu板に活性金属ろうの薄板をクラッドした
複合ろう材の活性金属ろうの薄板側よりハーフエッチン
グ加工して回路パターンを形成し、次にこの回路パター
ンを形成した複合ろう材を回路パターン側でセラミック
ス基板と接合し、然る後複合ろう材のCu板側より前記
回路パターンと同じパターンでエッチング加工して回路
を形成することを特徴とする回路基板の製造方法。
(57) [Abstract] [PROBLEMS] To provide a method for manufacturing a circuit board, which can eliminate etching defects, make the dimensions and shapes of the circuit more precise, and also make the bonding strength high. [Structure] A composite brazing material in which a thin plate of an active metal brazing is clad on a Cu plate is half-etched from the thin plate side of the active metal brazing to form a circuit pattern, and then the composite brazing material having this circuit pattern is formed into a circuit pattern. A method for manufacturing a circuit board, characterized in that the circuit board is joined to the ceramic board on the side, and then a circuit is formed by etching from the Cu plate side of the composite brazing material in the same pattern as the circuit pattern.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、大電力電源回路に用い
られるインバーターに組み込まれる回路基板の製造方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board incorporated in an inverter used in a high power power supply circuit.

【0002】[0002]

【従来の技術】従来、上記回路基板を製造するには図5
に示すようにセラミックスの基板1上に活性金属のペー
ストろう2をスクリーン印刷してパターンを形成し、次
に図6に示すようにCu板3を接合し、然る後Cu板3
にレジスト塗布してパターン形成後エッチング加工して
図7に示すように回路4を形成して回路基板5を作って
いる。
2. Description of the Related Art Conventionally, the manufacturing of the above-mentioned circuit board has been performed with reference to FIG.
As shown in FIG. 6, a paste solder 2 of an active metal is screen-printed on a ceramic substrate 1 to form a pattern, and then a Cu plate 3 is joined as shown in FIG.
A resist is applied, a pattern is formed, and etching is performed to form a circuit 4 as shown in FIG. 7 to form a circuit board 5.

【0003】ところで、かかる回路基板の製造方法で
は、セラミックス基板1上に活性金属のペーストろう2
をスクリーン印刷してパターンを形成するのに手間隙が
かかり、能率が悪い。即ち、ペーストろう2の作成に始
まってスクリーン印刷、乾燥、ろう付けに至るまでに多
くの時間と手間がかかり、生産性が悪い。また形成され
たろうパターンにCu板3をろう付けにて接合した後、
Cu板3をエッチング加工して回路4を形成するので、
ろうパターンと回路4とにずれが生じ、回路4の接合強
度が不十分となり、且つ回路4の寸法精度が悪かった。
By the way, in such a method for manufacturing a circuit board, an active metal paste solder 2 is formed on the ceramic substrate 1.
It takes a lot of time and effort to form a pattern by screen-printing, which is inefficient. That is, it takes a lot of time and labor from the preparation of the paste wax 2 to the screen printing, drying and brazing, and the productivity is poor. After the Cu plate 3 is brazed to the formed brazing pattern,
Since the Cu plate 3 is etched to form the circuit 4,
The brazing pattern and the circuit 4 were misaligned, the bonding strength of the circuit 4 was insufficient, and the dimensional accuracy of the circuit 4 was poor.

【0004】このようなことから本発明者は、回路の接
合強度及び寸法精度の高い回路基板を能率良く製造でき
る方法として、図8に示すようにセラミックス基板1上
に、Cu板6に活性金属ろうの薄板7をクラッドした複
合ろう材8を活性金属ろうの薄板7側で接合し、レジス
ト塗布してパターン形成後複合ろう材8をエッチング加
工して図9に示すように回路9を形成し、回路基板10を
得る方法を開発した。然し乍ら、この回路基板の製造方
法は、 エッチング加工した回路9の側面が円弧状にへこみ、
寸法、形状が悪くなる。 エッチング残りが生じ、導通不良が発生し易い。 Cuと活性金属ろうの両方をエッチングできる弗酸系
のエッチング液が必要であるが、危険を伴う。
From the above, the inventors of the present invention, as a method for efficiently manufacturing a circuit board having high circuit bonding strength and dimensional accuracy, as shown in FIG. A composite brazing material 8 clad with a brazing thin plate 7 is joined on the active metal brazing thin plate 7 side, and after applying a resist to form a pattern, the composite brazing material 8 is etched to form a circuit 9 as shown in FIG. , A method of obtaining the circuit board 10 has been developed. However, in the method of manufacturing this circuit board, the side surface of the etched circuit 9 is dented in an arc shape,
The size and shape deteriorate. Etching residue is likely to occur, leading to defective conduction. A hydrofluoric acid-based etchant that can etch both Cu and active metal brazes is needed, but is dangerous.

【0005】[0005]

【発明が解決しようとする課題】そこで本発明は、エッ
チング不良を無くし、回路の寸法、形状をより精度の高
いものにできる、且つ接合強度も高いものにできる回路
基板の製造方法を提供しようとするものである。
Therefore, the present invention is to provide a method of manufacturing a circuit board which can eliminate etching defects, and can make the dimensions and shape of the circuit more precise and the joint strength high. To do.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
の本発明の回路基板の製造方法は、Cu板に活性金属ろ
うの薄板をクラッドした複合ろう材の活性金属ろうの薄
板側よりハーフエッチング加工して回路パターンを形成
し、次にこの回路パターンを形成した複合ろう材を回路
パターン側でセラミックス基板と接合し、然る後複合ろ
う材のCu板側より前記回路パターンと同じパターンで
エッチング加工して回路を形成することを特徴とするも
のである。
A method for manufacturing a circuit board according to the present invention for solving the above-mentioned problems is a half-etching from a thin plate side of an active metal solder of a composite brazing material in which a thin plate of an active metal solder is clad on a Cu plate. After processing, a circuit pattern is formed, then the composite brazing material having the circuit pattern formed thereon is joined to the ceramic substrate on the circuit pattern side, and then the Cu plate side of the composite brazing material is etched in the same pattern as the circuit pattern. It is characterized by being processed to form a circuit.

【0007】[0007]

【作用】上記のように本発明の回路基板の製造方法は、
Cu板に活性金属ろうの薄板をクラッドした複合ろう材
の活性金属ろうの薄板側よりハーフエッチング加工して
回路パターンを形成しているので、複合ろう材をセラミ
ックス基板に接合する際、回路として不要な活性金属ろ
うは除去される。従って、回路パターンを形成した複合
ろう材を回路パターン側でセラミックス基板と接合した
後の回路形成のエッチング加工はCu部のみとなり、エ
ッチング液は取扱い容易な塩化第2鉄液を使用できる。
また、上記のように複合ろう材をセラミックス基板に接
合する前に、予め回路として不要なろう材を除去される
ので、セラミックスとろう材の化合物生成を防止でき、
導通不良が無くなり、しかも回路の寸法、形状は複合ろ
う材をセラミックス基板へ接合する前のエッチング加工
時の高い精度を維持でき、接合強度も高いものにでき
る。なお、クラッドした複合ろう材は、二層に限らず三
層等の多層複合ろう材でも同様である。
As described above, the circuit board manufacturing method of the present invention is
Since a circuit pattern is formed by half-etching from the active metal brazing thin plate side of a composite brazing material in which a thin plate of active metal brazing is clad on a Cu plate, it is not necessary as a circuit when joining the brazing compound brazing material to a ceramic substrate. The active metal wax is removed. Therefore, the etching process for forming the circuit after joining the composite brazing material having the circuit pattern to the ceramic substrate on the circuit pattern side is performed only on the Cu portion, and ferric chloride solution that is easy to handle can be used as the etching solution.
In addition, since the unnecessary brazing material as a circuit is removed in advance before joining the composite brazing material to the ceramic substrate as described above, it is possible to prevent the compound formation of the ceramic and the brazing material,
Continuity failure is eliminated, and the circuit size and shape can maintain high accuracy during etching processing before joining the composite brazing material to the ceramic substrate, and also provide high joining strength. The clad composite brazing material is not limited to two layers and may be a multi-layer composite brazing material such as three layers.

【0008】[0008]

【実施例】本発明の回路基板の製造方法の一実施例につ
いて説明すると、図1に示す厚さ0.3mm、幅30mm、長さ5
0mmのCu板6に、厚さ0.05mm、幅30mm、長さ50mmのA
g70%Cu28%Ti2%よりなる活性金属ろうの薄板7
をクラッドしてなる複合ろう材8の活性金属ろうの薄板
7側より図2に示すように塩化第2鉄50%、水50%から
なるエッチング液を用いてハーフエッチング加工を行い
回路パターン11を形成し、次にこの回路パターン11を形
成した複合ろう材8′を回路パターン11側で図3に示す
ように厚さ 0.5mm、幅30mm、長さ50mmのAlNのセラミ
ックス基板1上に1×10-5Torrの真空炉で 810℃、
5分間かけて接合し、然る後複合ろう材8′のCu板6
側より前記回路パターン11と同じパターンで塩化第2鉄
50%、水50%からなるエッチング液を用いてエッチング
加工を行なって図4に示すように回路12を形成して、回
路基板13を得た。
EXAMPLE An example of a method of manufacturing a circuit board according to the present invention will be described. The thickness is 0.3 mm, the width is 30 mm, and the length is 5 mm shown in FIG.
A 0 mm Cu plate 6 with a thickness of 0.05 mm, a width of 30 mm and a length of 50 mm
Active metal brazing sheet consisting of g70% Cu28% Ti2% 7
As shown in FIG. 2, half-etching is performed from the side of the active metal brazing thin plate 7 of the composite brazing material 8 in which the clad is clad with an etching solution containing 50% ferric chloride and 50% water to form the circuit pattern 11. Then, the composite brazing material 8'on which the circuit pattern 11 is formed is formed on the circuit pattern 11 side on the AlN ceramic substrate 1 having a thickness of 0.5 mm, a width of 30 mm and a length of 50 mm as shown in FIG. 810 ℃ in a vacuum furnace at 10 -5 Torr,
Bonding for 5 minutes, then Cu plate 6 of composite brazing material 8 '
Ferric chloride with the same pattern as the circuit pattern 11 from the side
An etching process was performed using an etching solution composed of 50% and 50% water to form a circuit 12 as shown in FIG. 4, and a circuit board 13 was obtained.

【0009】この実施例で判るようにCu板6にAg70
%−Cu28%−Ti2%の活性金属ろうの薄板7をクラ
ッドした複合ろう材8の薄板7側よりハーフエッチング
加工して回路パターン11を形成したので、複合ろう材8
をセラミックス基板1上に接合する際、回路として不要
な活性金属ろうは除去された。従って、回路パターン11
を形成した複合ろう材8′を回路パターン11側でセラミ
ックス基板1と接合した後の回路形成の為のエッチング
加工はCu部のみとなり、エッチング液は取扱い容易な
塩化第2鉄液を使用できた。また上記のように複合ろう
材8′をセラミックス基板1に接合する前に、予め回路
として不要なろう材が除去されたので、セラミックスと
ろう材の化合物生成を防止でき、導通不良がなくなり、
しかも回路12の寸法、形状は複合ろう材8′をセラミッ
クス基板1へ接合する前のエッチング加工時の高い精度
を維持でき、接合強度も高いものにできた。尚、上記実
施例の複合ろう材8は、Cuと活性金属ろうとの二層で
あるが、三層でも四層でも良いものである。
As can be seen in this embodiment, the Cu plate 6 is made of Ag70.
% -Cu28% -Ti2% of the active metal brazing thin plate 7 of the composite brazing material 8 clad from the thin plate 7 side was half-etched to form the circuit pattern 11.
When the was bonded to the ceramic substrate 1, the active metal solder unnecessary for the circuit was removed. Therefore, the circuit pattern 11
After bonding the composite brazing material 8'formed with the circuit pattern 11 side to the ceramic substrate 1, the etching process for forming the circuit was only the Cu portion, and the etching solution was ferric chloride solution, which was easy to handle. . Further, as described above, since the unnecessary brazing material as a circuit is previously removed before joining the composite brazing material 8 ′ to the ceramic substrate 1, it is possible to prevent the compound formation of the ceramic and the brazing material, and to eliminate the conduction failure.
In addition, the size and shape of the circuit 12 can maintain high accuracy during the etching process before joining the composite brazing material 8'to the ceramic substrate 1 and also provide high joining strength. The composite brazing material 8 of the above-mentioned embodiment has two layers of Cu and an active metal brazing material, but may have three layers or four layers.

【0010】[0010]

【発明の効果】以上の通り本発明の回路基板の製造方法
によれば、エッチング不良がなく、回路の寸法、形状を
より精度の高いものにでき、且つ接合強度も高い回路基
板を得ることができる。
As described above, according to the method of manufacturing a circuit board of the present invention, it is possible to obtain a circuit board which has no etching defects, can be made more precise in circuit size and shape, and has a high bonding strength. it can.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 1 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図2】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 2 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図3】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 3 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図4】本発明の回路基板の製造方法の一実施例の工程
を示す図である。
FIG. 4 is a diagram showing steps of an embodiment of a method for manufacturing a circuit board of the present invention.

【図5】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 5 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図6】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 6 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図7】従来の回路基板の製造方法の工程を示す図であ
る。
FIG. 7 is a diagram showing steps of a conventional method for manufacturing a circuit board.

【図8】改良した回路基板の製造方法の工程を示す図で
ある。
FIG. 8 is a diagram showing steps of an improved method for manufacturing a circuit board.

【図9】改良した回路基板の製造方法の工程を示す図で
ある。
FIG. 9 is a diagram showing steps of an improved method for manufacturing a circuit board.

【符号の説明】[Explanation of symbols]

1 セラミックス基板 6 Cu板 7 活性金属ろうの薄板 8 複合ろう材 8′ 回路パターンを形成した複合ろう材 11 回路パターン 12 回路 13 回路基板 1 Ceramic Substrate 6 Cu Plate 7 Thin Plate of Active Metal Solder 8 Composite Brazing Material 8'Composite Brazing Material Forming Circuit Pattern 11 Circuit Pattern 12 Circuit 13 Circuit Board

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 Cu板に活性金属ろうの薄板をクラッド
した複合ろう材の活性金属ろうの薄板側よりハーフエッ
チング加工して回路パターンを形成し、次にこの回路パ
ターンを形成した複合ろう材を回路パターン側でセラミ
ックス基板と接合し、然る後複合ろう材のCu板側より
前記回路パターンと同じパターンでエッチング加工して
回路を形成することを特徴とする回路基板の製造方法。
1. A composite brazing material having a Cu plate clad with a thin plate of an active metal brazing material is half-etched from the thin plate side of the active metal brazing material to form a circuit pattern, and then a composite brazing material having this circuit pattern is formed. A method of manufacturing a circuit board, which comprises bonding to a ceramics substrate on the side of the circuit pattern, and then forming a circuit by etching the Cu plate side of the composite brazing material in the same pattern as the circuit pattern.
JP35266792A 1992-12-10 1992-12-10 Circuit board manufacturing method Pending JPH06177507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35266792A JPH06177507A (en) 1992-12-10 1992-12-10 Circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35266792A JPH06177507A (en) 1992-12-10 1992-12-10 Circuit board manufacturing method

Publications (1)

Publication Number Publication Date
JPH06177507A true JPH06177507A (en) 1994-06-24

Family

ID=18425616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35266792A Pending JPH06177507A (en) 1992-12-10 1992-12-10 Circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JPH06177507A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7069645B2 (en) 2001-03-29 2006-07-04 Ngk Insulators, Ltd. Method for producing a circuit board
JP2014082370A (en) * 2012-10-17 2014-05-08 Mitsubishi Materials Corp Method for manufacturing substrate for power module
JP2017005182A (en) * 2015-06-15 2017-01-05 株式会社アイン Method for manufacturing ceramic wiring board
JP2017139508A (en) * 2017-05-23 2017-08-10 三菱マテリアル株式会社 Joined body for manufacturing substrate for power module
CN111787710A (en) * 2020-07-20 2020-10-16 乐健科技(珠海)有限公司 Preparation method of ceramic circuit board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7069645B2 (en) 2001-03-29 2006-07-04 Ngk Insulators, Ltd. Method for producing a circuit board
JP2014082370A (en) * 2012-10-17 2014-05-08 Mitsubishi Materials Corp Method for manufacturing substrate for power module
JP2017005182A (en) * 2015-06-15 2017-01-05 株式会社アイン Method for manufacturing ceramic wiring board
JP2017139508A (en) * 2017-05-23 2017-08-10 三菱マテリアル株式会社 Joined body for manufacturing substrate for power module
CN111787710A (en) * 2020-07-20 2020-10-16 乐健科技(珠海)有限公司 Preparation method of ceramic circuit board

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