JPH06177163A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [Summary] (Modified) [Purpose] To improve the breakdown voltage of the Schottky junction of the gate electrode,
It is a method of manufacturing a GaAs FET capable of suppressing the leak current. [Structure] After forming a multi-layered surface protective film 14 on a semiconductor substrate 11 in which a lower portion has a higher etching rate for etching than an upper portion, an opening portion of the surface protective film 14 is formed in a region where a gate electrode is to be formed. Steps, and after forming the spacer film 16 on the surface protection film 14 by covering the opening, an etching resistant film 17 having an opening 17a is formed in the region where the gate electrode is to be formed. The opening portion 16a is formed to expose the opening portion of the surface protective film 14, and the side wall of the lower portion is selectively side-etched to widen the lower portion of the opening portion to form a new opening 12b / 13a. , A conductor film covering it and in contact with the semiconductor substrate 11
19a and a conductor film 19b on the etching resistant film 17
After forming the film, 17 is removed to leave the conductor film 19a,
The gate electrode 19a is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a gallium arsenide field effect transistor (hereinafter referred to as GaAsFET).

[0002]

2. Description of the Related Art In recent years, GaAs, which is a type of III-V group compound semiconductor, has been focused on the advantage that it has a high electron mobility in the ultra high frequency band such as .mu. A GaAs-FET having a substrate of is used.

Since the GaAs-FET is used in the ultra-high frequency band, its structure is fine, and its manufacture has been variously devised. 3 (a)-(d) and FIG. 4 (a)-
(C) is a sectional view for explaining a method of manufacturing a GaAs FET.

First, as shown in FIG.
A surface protection film 2 made of a silicon nitride film is formed on a semiconductor substrate 1 made of. Next, after forming the resist film 3, the opening 3a of the resist film 3 is formed in the region where the gate electrode is to be formed. Then, the surface protection film 2 is etched and removed using the resist film 3 as a mask to form the opening 2a of the surface protection film 2 (FIG. 3B).

Next, after removing the resist film 3, the opening 2a of the surface protection film 2 is covered and a spacer film 4 made of a silicon oxide film and extending on the surface protection film 2 is formed (see FIG. c)).

Next, after forming the resist film 5, an opening 5a of the resist film 5 is formed in the region where the gate electrode is to be formed. Subsequently, the spacer film 4 is etched and removed by wet etching using the resist film 5 as a mask to form an opening 4a, and the opening 2a of the surface protective film 2 is exposed. At this time, after forming the opening 5a of the resist film 5 to the same extent as the opening 2a of the surface protection film 2, side etching is performed so as to be slightly larger than the opening 5a of the resist film 5 (FIG. )).

Next, aluminum films 6a and 6b are formed by vapor deposition with the resist film 5 left. As a result, the aluminum film 6a is formed so as to cover the opening 2a, and the aluminum film 6b is also formed on the resist film 5.
Remain (FIG. 4 (b)).

Next, when the resist film 5 is removed, the aluminum film 6b on the resist film 5 is removed by lift-off, and the aluminum film 6a covering the opening 2a remains. Then, when heat treatment is performed, a Schottky junction is formed in the vicinity of the interface between the semiconductor substrate 1 and the aluminum film 6a, and the gate electrode 6a made of the aluminum film 6a is formed (FIG. 4C). By applying a reverse voltage to the gate electrode 6a, the spread of the depletion layer of the Schottky junction is controlled, and the current between the source and drain (not shown) is controlled.

[0009]

However, according to the above-described conventional method for manufacturing a semiconductor device, the gate electrode 6a is formed in contact with the opening end (A portion) of the opening 2a. Normal,
Since the strain is concentrated on the semiconductor substrate 1 immediately below the opening end (portion A) of the opening 2a, the electric field is locally increased, the reverse breakdown voltage (Vgdo) of the Schottky junction is reduced, and the output power of the RF characteristic ( There is a problem that Pout) becomes small and leak current increases.

The present invention was created in view of the problems of the conventional example, and a semiconductor device capable of improving the breakdown voltage of the Schottky junction of the gate electrode and suppressing the leak current in the junction FET. It is intended to provide a manufacturing method.

[0011]

[Means for Solving the Problems] FIG.
~ (D), as shown in Figure 2 (a) ~ (c), first,
The etching solution on the semiconductor substrate 11 is lower in the lower part than in the upper part.
Multi-layer surface protection film 1 with a high etching rate
4 and the surface protection film 14 is selectively removed.
And the openings 12a / 13 are formed in the region where the gate electrode is to be formed.
a step of forming a and covering the openings 12a / 13a,
Forming a spacer film 16 on the surface protection film 14
And an etching resistant film 17 is formed on the spacer film 16.
After the formation, etch resistance is applied to the area where the gate electrode is to be formed.
Of forming the opening 17a of the insulating film 17;
The spacer film 16 is etched using the etching film 17 as a mask.
To protect the surface by etching and removing the opening 16a.
The openings 12a / 13a of the membrane 14 are exposed and the opening
Side etching selectively on the lower side wall of the mouth 12a / 13a
And open the lower part of the opening 12a / 13a to open a new opening.
Forming the portions 12b / 13a, and the etching resistant film
While leaving 17, the conductor films 19a and 19b are formed,
Cover the openings 12b / 13a and contact with the semiconductor substrate 11.
On the conductive film 19a and the etching resistant film 17
Step of forming the electric film 19b, and the etching resistant film 1
7 to remove the conductor on the etching resistant film 17
The film 19b is removed and the openings 12b / 13a are covered.
The conductor film 19a that covers and contacts the semiconductor substrate 11 remains
And a step of forming the gate electrode 19a.
Secondly, the surface protection is achieved by
The film 14 is made of a two-layer silicon nitride film, and is made of SiH.
_Four+ NH₃Formed by chemical vapor deposition using gas,
SiH when forming the lower surface protective film (12)_Four/ N
H₃When forming the upper surface protection film (13), the flow rate ratio of
SiH_Four/ NH₃Specially, it should be smaller than the flow rate ratio of
According to the first aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
Will be achieved.

[0012]

According to the method of manufacturing a semiconductor device of the present invention, the surface protective film 12 having a larger etching rate with respect to the etching liquid than the upper portion is used below the surface protective film 14 (see FIG. 1).
(A)) When forming the opening 16a in the spacer film 16 formed on the upper surface protective film 13, the opening end of the opening 12b of the lower surface protective film 12 is selectively widened by side etching. (Fig. 2 (a)).

Therefore, when the conductor film 18a serving as the gate electrode is formed by covering the upper surface protective film 13, the lower surface protective film 12 is formed below the peripheral portion of the opening 13a of the upper surface protective film 13. Since the removal region 18 is formed, it is possible to avoid contact between the conductor film 19a and the opening end of the opening 12b of the lower surface protective film 12 where the strain is concentrated (FIG. 2).
(B)).

As a result, the semiconductor substrate 11 and the gate electrode
Since electric field concentration on the Schottky junction formed near the interface with the aluminum film 19a serving as 19a can be avoided, the reverse breakdown voltage (Vgdo) of the Schottky junction of the gate electrode 19a is improved and the leakage current is suppressed. be able to.

[0015]

Embodiments of the present invention will now be described with reference to the drawings. 1 (a)-(d) and 2 (a)-
FIG. 3C is a sectional view for explaining the manufacturing method of the GaAs FET according to the embodiment of the present invention.

First, as shown in FIG. 1 (a), SiH_Four
+ NH₃Flow rate ratio Si by CVD method using gas
H_Four: NH₃= 1:30 Semiconducting GaAs
It is made of a silicon nitride film with a thickness of about 500 Å on the body substrate 11.
Forming a first surface protective film (lower surface protective film) 12
After the same SiH_Four+ NH₃Gas, SiH_Four/ N
H ₃The flow rate ratio of SiH_Four: NH₃=
Using the CVD method under the condition of 1: 5, the film thickness of about 500Å
Second surface protective film made of connitride film (upper surface protective film
A film) 13 is sequentially formed. Note that it was created in this way
In the formed two-layer surface protection film 14, NH_FourF: HF =
For etching solution having 10: 1 composition and composition ratio
The etching rate of the first surface protective film 12 is higher than that of the first surface protective film 12.
2 is larger than the surface protective film 13.

Next, after forming the resist film 15, the opening 15a of the resist film 15 is formed in the region where the gate electrode is to be formed by photolithography. Then SF
Resist film 1 by dry etching using ₆ gas
Etching the surface protection films 12 and 13 using 5 as a mask
Then, the openings 12a / 13a are formed (FIG. 1B).

Next, after removing the resist film 15, the first
And a film thickness that covers the openings 12a / 13a of the second surface protection films 12 and 13 and extends on the second surface protection film 13.
A spacer film 15 made of a 4000 Å silicon oxide film is formed (FIG. 1C).

Next, a resist film (etching resistant film)
After forming 17, the opening 17a of the resist film 17 is formed in the region where the gate electrode is to be formed by photolithography. Then, using the resist film 17 as a mask, NH ₄
The spacer film 1 was formed by wet etching using an etching solution having a composition of F: HF = 10: 1.
6 is etched and removed to form openings 16a, and the openings 12a / 13a of the first and second surface protection films 12 and 13 are exposed. Continuing further, the first and second surface protective films 12, 1
3 is exposed to an etchant having a composition and composition ratio of NH ₄ F: HF = 10: 1. As a result, the opening 12a of the lower first surface protective film 12 having a large etching rate is subjected to side etching to widen the opening 12b (FIG. 2).
(A)). As a result, the opening of the second surface protective film 13
A removal region (cavity) 18 of the first surface protection film 12 is formed below the peripheral portion of the opening end of 13a (FIG. 2B). If the width of the removal region 18 is 100 Å or less, the reverse breakdown voltage (Vgdo) is not improved so much. Also, 500Å
In the above case, the RF saturation current is reduced due to the influence of the surface depletion layer, and the RF output power is reduced. Therefore,
The width of the removed region 18 is preferably 300 ± 100Å.

Next, aluminum films 19a and 19b are formed by vapor deposition while leaving the resist film 17. As a result, the aluminum film 19a is formed by covering the openings 12a / 13a.
And the aluminum film 19b remains on the resist film 17. At this time, the first surface protective film 1
A cavity is formed between the opening end of the second opening 12a and the aluminum film 19a, and contact between the opening end of the opening 12a of the first surface protection film 12 and the aluminum film 19a can be avoided (see FIG. b)).

Next, when the resist film 17 is removed, the aluminum film 19a on the resist film 17 is removed by lift-off, and the aluminum film covering the openings 12a / 13a is removed.
19a remains. Subsequently, when heat treatment is performed, a Schottky junction is formed between the semiconductor substrate 11 and the aluminum film 19a, whereby the gate electrode 19a made of the aluminum film 19a is formed and the junction field effect transistor is completed (( FIG. 2C).

By applying a voltage to the gate electrode 19a of the junction field effect transistor produced as described above, the spread of the depletion layer of the Schottky junction is controlled to control the current between the source and drain (not shown). To do.

As described above, the GaAs of the embodiment of the present invention
According to the method for manufacturing the FET, the opening 16a of the spacer film 16 is formed by wet etching using the first surface protection film 12 made of a silicon nitride film having a higher etching rate than the upper part below the surface protection film 14. When the first
The surface protective film 12 is side-etched to widen the opening end of the opening 12b of the first surface protective film 12.

Therefore, when the aluminum film 19a serving as the gate electrode 19a is formed by covering the second surface protection film 13, the second surface protection film 13 is formed below the peripheral portion of the opening end of the opening 13a. The removal region 19 of the first surface protection film 12 is formed, and the opening 12 of the first surface protection film 12 where the strain is concentrated is formed.
It is possible to avoid contact between the open end of b and the aluminum film 19a.

As a result, the semiconductor substrate 11 and the gate electrode
Since electric field concentration on the Schottky junction formed near the interface with the aluminum film 19a as the 19a can be avoided, the reverse breakdown voltage (Vgdo) of the Schottky junction of the gate electrode 19a is improved and the leakage current is suppressed. be able to. As a result, the output power of the RF characteristic (Pout)
Can be secured.

In the above embodiment, the surface protective film 14
Although the two-layer surface protection films 12 and 13 made of a silicon nitride film are both used as the above, different types of insulating films may be used. Further, an insulating film having two or more layers may be used.

Further, although the aluminum film is used as the conductor film which becomes the gate electrode 19a, it is also possible to use other kinds of conductor films. Further, although the GaAs substrate is used as the semiconductor substrate 11, another semiconductor substrate can be used.

[0028]

As described above, according to the semiconductor device and the method of manufacturing the same of the present invention, when the opening of the spacer film is formed in the lower portion of the surface protective film, the insulating film having a higher etching rate than that of the upper portion is used. The opening end of the opening of the first surface protective film is widened.

Therefore, when the conductor film as the gate electrode is formed by covering the second surface protective film, the first surface protective film is removed under the peripheral portion of the opening of the second surface protective film. It is possible to avoid contact between the opening end of the opening of the first surface protective film where the region is formed and the strain is concentrated and the conductor film.

As a result, electric field concentration on the Schottky junction of the gate electrode can be avoided, so that the reverse breakdown voltage (Vgdo) of the Schottky junction of the gate electrode can be improved and the leak current can be suppressed. This makes RF
The characteristic output power (Pout) can be secured.

[Brief description of drawings]

FIG. 1 is a cross-sectional view (1) explaining a method of manufacturing a GaAs FET according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view (2) explaining the method of manufacturing a GaAs FET according to the example of the invention.

FIG. 3 is a cross-sectional view (1) explaining a method of manufacturing a GaAs FET according to a conventional example.

FIG. 4 is a sectional view (No. 2) for explaining the method of manufacturing the GaAs FET according to the conventional example.

[Explanation of symbols]

 11 semiconductor substrate, 12 first surface protection film, 12a / 13a, 12b / 13a, 15a, 16a, 17a opening, 13 second surface protection film, 15, 17 resist film (etching resistant film), 16 spacer Film, 19a aluminum film (gate electrode), 19b aluminum film.

Claims (2)

[Claims] 1. A step of forming a multi-layer surface protective film (14) on a semiconductor substrate (11) in which a lower portion has a higher etching rate for etching than an upper portion, and the surface protective film (14) is selectively formed. A step of removing and forming an opening (12a / 13a) in a region where a gate electrode is to be formed; and covering the opening (12a / 13a) with a spacer film (16) on the surface protection film (14). ) Is formed, and an etching resistant film (17) is formed on the spacer film (16).
Forming an opening (17a) of the etching resistant film (17) in the region where the gate electrode is to be formed, and using the etching resistant film (17) as a mask, the spacer film (16) Are removed by etching to form openings (16a), and the openings (12a / 13) of the surface protective film (14) are formed.
a) and exposing side walls of the openings 12a / 13a selectively by side etching.
a / 13a) and expand the lower part to create a new opening (12b / 13a)
Forming a conductor film (19a, 19b) while leaving the etching resistant film (17), covering the openings (12b / 13a) and contacting the semiconductor substrate 11. Body membrane (19a)
And a conductor film (19) on the etching resistant film (17).
b), and removing the etching resistant film (17) to remove the conductor film (19b) on the etching resistant film (17) and the opening (12b / 13a). A) to leave a conductor film (19a) in contact with the semiconductor substrate 11 to form a gate electrode (19a). 2. The surface protective film (14) is composed of two layers of silicon nitride film, both of which are formed by a chemical vapor deposition method using SiH ₄ + NH ₃ gas, and the lower surface protective film (1) is formed.
The flow rate ratio of SiH ₄ / NH ₃ when forming 2) is made smaller than the flow rate ratio of SiH ₄ / NH ₃ when forming the upper surface protective film (13). Of manufacturing a semiconductor device of.