JPH06177120A - Deposition of interlayer dielectric film - Google Patents
Deposition of interlayer dielectric filmInfo
- Publication number
- JPH06177120A JPH06177120A JP28800692A JP28800692A JPH06177120A JP H06177120 A JPH06177120 A JP H06177120A JP 28800692 A JP28800692 A JP 28800692A JP 28800692 A JP28800692 A JP 28800692A JP H06177120 A JPH06177120 A JP H06177120A
- Authority
- JP
- Japan
- Prior art keywords
- film
- doped sio
- insulating film
- interlayer insulating
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Formation Of Insulating Films (AREA)
Abstract
(57)【要約】
【目的】 ボイドの発生がなく、Ｎａのゲッタリング効
果を有する平坦な層間絶縁膜の形成方法を提供する。
【構成】 断差を有する基体上に常圧のＯ3／ＴＥＯＳ
−ＣＶＤによりノンドープＳｉＯ2膜１３を形成し、こ
のノンドープＳｉＯ2膜１３にドーピングガス（ＰＨ3）
を流して吸着させる工程を複数回繰り返し、次に、Ｎ2
雰囲気中で熱処理を行なう。これにより、平坦でドーパ
ントが均一に拡散した層間絶縁膜が得られる。
(57) [Summary] [Object] To provide a method for forming a flat interlayer insulating film having a Na gettering effect without generation of voids. [Structure] O 3 / TEOS at normal pressure on a substrate having a gap
A non-doped SiO 2 film 13 is formed by -CVD, doping gas to the non-doped SiO 2 film 13 (PH 3)
The step of flowing and adsorbing is repeated several times, and then N 2
Heat treatment is performed in the atmosphere. As a result, a flat interlayer insulating film in which the dopant is uniformly diffused can be obtained.
Description
【０００１】[0001]
【産業上の利用分野】この発明は、半導体装置の製造分
野に適応される層間絶縁膜の形成方法に関し、特に、配
線間の平坦化層間膜として利用できる層間絶縁膜の形成
方法に係わる。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an interlayer insulating film adapted to the field of manufacturing semiconductor devices, and more particularly to a method for forming an interlayer insulating film that can be used as a planarizing interlayer film between wirings.
【０００２】[0002]
【従来の技術】近年、デバイスの高密度化に伴って、配
線技術は、微細化及び多層化の方向に進んでいる。しか
し、高集積化は、デバイスの信頼性を低下させる要因と
なっている。これは、配線の微細化と多層化の進展によ
って、層間絶縁膜の段差は大きく且つ急峻となり、その
上に形成される配線の加工精度や信頼性を低下させるた
めである。このため、Ａｌ配線の段差被覆性の大幅な改
善が出きない現在、層間絶縁膜の平坦性を向上させる必
要がある。2. Description of the Related Art In recent years, wiring technology has been progressing toward miniaturization and multi-layering as device density has increased. However, high integration is a factor that reduces the reliability of the device. This is because the step of the interlayer insulating film becomes large and steep due to the miniaturization of wiring and the progress of multi-layering, and the processing accuracy and reliability of the wiring formed thereon are lowered. For this reason, it is necessary to improve the flatness of the interlayer insulating film at present when the step coverage of the Al wiring cannot be significantly improved.
【０００３】従来、この種の絶縁膜の形成技術及び平坦
化技術としては、例えば有機シラン系ガスを用いてＣＶ
Ｄを行なう方法，絶縁膜形成と同時にスパッタエッチを
行い段差部の角をとるバイアススパッタやバイアスＥＣ
Ｒ ＣＶＤ技術，ＳＯＧ（Ｓｐｉｎ Ｏｎ Ｇｌａｓ
ｓ）等を塗布する平坦化技術，熱処理により膜を軟化さ
せる平坦化技術，エッチバック法等が各種知られてい
る。しかし、微細化，多層化が進んだ配線層に、このよ
うな従来の技術を適用した場合、配線間隔が広い部分の
平坦化の不足や配線間隙における層間膜への空洞（ボイ
ド）の発生により配線間の接続不良等が重要な問題にな
っている。Conventionally, as a technique for forming and planarizing this type of insulating film, for example, CV using an organic silane-based gas is used.
Method of performing D, bias sputtering or bias EC in which an angle of a step portion is obtained by performing sputter etching simultaneously with formation of an insulating film.
R CVD technology, SOG (Spin On Glass)
Various flattening techniques for applying s) and the like, flattening techniques for softening the film by heat treatment, and etch back methods are known. However, when such a conventional technique is applied to a wiring layer that has been miniaturized and multilayered, due to lack of flatness in a portion with a wide wiring gap and generation of a void in the interlayer film in the wiring gap. Poor connection between wires has become an important issue.
【０００４】そこで、この問題を改善する手段として、
常圧下でオゾン（Ｏ3）を用いてテトラエトキシシラン
（ＴＥＯＳ）を熱分解しＳｉＯ2膜を形成することによ
り、高アスペクト比のＡｌ配線間を平坦化する技術が提
案されている（小谷，松浦１９８９．ＩＥＤＭ．Ｐ６６
９）。この方法は、反応中間体として疑似液体的な挙動
を示す高分子重合体を形成し、これを用いて高アスペク
ト比の段差を埋め込み、且つフロー形状を得る技術であ
る。Therefore, as a means for improving this problem,
A technique has been proposed in which tetraethoxysilane (TEOS) is thermally decomposed using ozone (O 3 ) under normal pressure to form a SiO 2 film, thereby flattening between Al wirings having a high aspect ratio (Otani, Matsuura 1989. IEDM. P66
9). This method is a technique in which a high-molecular polymer that behaves like a pseudo liquid is formed as a reaction intermediate, and by using this, a step having a high aspect ratio is filled and a flow shape is obtained.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上記従
来技術においては、セルフフロー形状を得られるのはノ
ンドープのＳｉＯ2のみであり、図８に示すように、Ｐ
ＳＧ膜１又はＢＳＧ膜ではフロー形状に形成することは
できない。従来のデバイスプロセスでは、Ｎａのゲッタ
リングとしてＰＳＧが用いられてきたが、図９に示すよ
うに、ノンドープのＳｉＯ2膜２にはこのゲッタリング
作用がない。つまり、高アスペクト比を埋め込み、且つ
セルフフロー形状を得られるＰＳＧやＢＳＧを形成する
ことができなかった。この理由は、以下に説明するメカ
ニズムによるものと考えられる。即ち、ＣＶＤガスとし
て、ＴＥＯＳとＯ3の他に、ドーパントとして例えばホ
スフィン（ＰＨ3）を同時に流してＰＳＧを形成しよう
とする場合、図１０に示すように、リン（Ｐ）を含んだ
高分子反応中間体は、Ｐ自体が活性であることに加え、
ＰとＳｉ、及びＰとＯとの電気陰性度の差が大きいため
（Ｐ＝２．１，Ｓｉ＝１．８，Ｏ＝３．５）、一旦Ｐを
含んだ膜が下地に形成されると、高分子反応中間体が持
つ水酸基（−ＯＨ）と水素結合し易くなり、下地表面上
でほとんど流動することなくすぐに反応してしまいフロ
ー形状が得られない。However, in the above-mentioned prior art, only the non-doped SiO 2 can obtain the self-flow shape, and as shown in FIG.
The SG film 1 or the BSG film cannot be formed into a flow shape. In the conventional device process, PSG has been used as gettering of Na, but as shown in FIG. 9, the non-doped SiO 2 film 2 does not have this gettering action. That is, it was not possible to form a PSG or BSG with a high aspect ratio embedded and a self-flow shape. The reason for this is considered to be due to the mechanism described below. That is, in the case where phosphine (PH 3 ) as a dopant is simultaneously flowed as a CVD gas in addition to TEOS and O 3 , a polymer containing phosphorus (P) is formed as shown in FIG. In addition to the fact that P itself is active, the reaction intermediate is
Since the difference in electronegativity between P and Si and between P and O is large (P = 2.1, Si = 1.8, O = 3.5), a film containing P is once formed on the base. Then, it becomes easy to form a hydrogen bond with the hydroxyl group (-OH) of the polymer reaction intermediate, and it reacts immediately with almost no flow on the surface of the base, and a flow shape cannot be obtained.
【０００６】本発明は、このような従来の問題点に着目
して創案されたものであり、高アスペクト比の配線段差
をボイドが生じることなく埋め込み、しかも、Ｎａのゲ
ッタリング作用を有する層間絶縁膜の形成方法を得んと
するものである。The present invention was made in view of such conventional problems, and fills a wiring step having a high aspect ratio without forming voids, and has an interlayer insulation having a gettering action of Na. The purpose is to obtain a method for forming a film.
【０００７】[0007]
【課題を解決するための手段】請求項１記載の発明は、
有機金属化合物を用いてノンドープＳｉＯ2膜を形成す
る工程と、ドーパントを該ノンドープＳｉＯ2膜に吸着
させる工程と、を複数回繰り返すことを、その解決手段
としている。The invention according to claim 1 is
The solution is to repeat the step of forming a non-doped SiO 2 film using an organometallic compound and the step of adsorbing a dopant to the non-doped SiO 2 film a plurality of times.
【０００８】請求項２記載の発明は、Ｏ3−ＴＥＯＳ系
ＣＶＤによりノンドープＳｉＯ2膜を形成する工程と、
ドーパントを該ノンドープＳｉＯ2膜に吸着させる工程
と、を複数回繰り返した後、熱処理を施すことを、その
解決手段としている。According to a second aspect of the present invention, a step of forming a non-doped SiO 2 film by O 3 -TEOS-based CVD,
The step of adsorbing the dopant to the non-doped SiO 2 film is repeated a plurality of times, and then heat treatment is performed, which is a means for solving the problem.
【０００９】[0009]
【作用】請求項１記載の発明においては、有機金属化合
物により形成されたノンドープＳｉＯ2膜がフロー形状
となりボイドを生ずることなく平坦化される。そして、
ドーパントがノンドープＳｉＯ2膜に吸着されるため、
層間絶縁膜全体としては、ドープトオキサイド膜とな
り、ナトリウム（Ｎａ）のゲッタリング作用を有する。In the first aspect of the invention, the non-doped SiO 2 film formed of the organometallic compound has a flow shape and is flattened without causing voids. And
Since the dopant is adsorbed on the non-doped SiO 2 film,
The interlayer insulating film as a whole becomes a doped oxide film and has a gettering action of sodium (Na).
【００１０】請求項２記載の発明は、上記請求項１記載
の発明の作用に加えて、熱処理により、よりドーパント
が膜中に均一に拡散する作用を有する。In addition to the function of the invention described in claim 1, the invention described in claim 2 has a function of more uniformly diffusing the dopant into the film by the heat treatment.
【００１１】例えば、ドーパントとしてＰＨ3を用いた
場合は、ＰとＨは電気陰性度が全く同じであり、ＰＨ3
は極性を持たない。なお、ドーパントとしてＢ2Ｈ6を用
いた場合もＢの電気陰性度＝２．０、Ｈの電気陰性度＝
２．１と非常に近い値であり、Ｂ2Ｈ6も極性をほとんど
持たない。よって、下地表面が極性を持たないＰＨ3等
で覆われることになり、図７に示すように、ＯＨ基を持
つ高分子反応中間体と水素結合しなくなり、フロー形状
を得ることができる。[0011] For example, in the case of using PH 3 as a dopant, P and H are electronegativity of identical, PH 3
Has no polarity. Even when B 2 H 6 is used as a dopant, B electronegativity = 2.0, H electronegativity =
The value is very close to 2.1, and B 2 H 6 has almost no polarity. Therefore, the underlying surface is covered with PH 3 or the like having no polarity, and as shown in FIG. 7, hydrogen bonding with the polymer reaction intermediate having an OH group does not occur and a flow shape can be obtained.
【００１２】[0012]
【実施例】以下、本発明に係る層間絶縁膜の形成方法の
詳細を図面に示す実施例に基づいて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the method for forming an interlayer insulating film according to the present invention will be described below with reference to the embodiments shown in the drawings.
【００１３】先ず、図１に示すように、半導体基板上に
形成されている絶縁膜１１上に、例えば、Ａｌ−１％Ｓ
ｉ等で成る配線１２を周知の技術を用いてパターニング
する。その後、以下に示す有機金属化合物であるテトラ
エトキシシラン（ＴＥＯＳ）を用いたＯ3−ＴＥＯＳ
ＣＶＤにより、ノンドープＳｉＯ2膜１３を薄く形成す
る。First, as shown in FIG. 1, for example, Al-1% S is formed on an insulating film 11 formed on a semiconductor substrate.
The wiring 12 made of i or the like is patterned using a known technique. Then, O 3 -TEOS using tetraethoxysilane (TEOS), which is an organometallic compound shown below, is used.
The non-doped SiO 2 film 13 is thinly formed by CVD.
【００１４】（Ｏ3−ＴＥＯＳ ＣＶＤ条件） ・Ｏ3／ＴＥＯＳ流量比＝３以上 ・温度＝３７５℃ ・圧力＝１×１０5Ｐａ 次に、図２に示すように、ノンドープＳｉＯ2膜１３表
面に、ＰのドーパントとしてＰＨ3を２００SCCMの流量
で１０分間程度流し、ノンドープＳｉＯ2膜１３表面に
ＰＨ3（図中、符号１４で示す）を吸着させる。(O 3 -TEOS CVD condition) O 3 / TEOS flow rate ratio = 3 or more Temperature = 375 ° C. Pressure = 1 × 10 5 Pa Next, as shown in FIG. 2, the surface of the non-doped SiO 2 film 13 Then, PH 3 as a P dopant is flowed at a flow rate of 200 SCCM for about 10 minutes to adsorb PH 3 (indicated by numeral 14 in the figure) on the surface of the non-doped SiO 2 film 13.
【００１５】次に、再度Ｏ3−ＴＥＯＳ ＣＶＤを同条
件で行なって、図３に示すようにノンドープＳｉＯ2膜
１３を重ねて堆積させ、その後、図４に符号１４で示す
ように、ＰＨ3を上記工程と同条件で吸着させる。Next, O 3 -TEOS CVD is performed again under the same conditions to deposit the non-doped SiO 2 film 13 as shown in FIG. 3, and then PH 3 as shown by reference numeral 14 in FIG. Are adsorbed under the same conditions as in the above step.
【００１６】そして、図５に示すように、最後のノンド
ープＳｉＯ2膜１３を堆積させた後、ＰＨ3のリン（Ｐ）
を膜中に均一に拡散させるため、Ｎ2又はＯ2雰囲気中で
６０分間程度の熱処理を施し、図６に示すようなＰＳＧ
膜１５が形成される。Then, as shown in FIG. 5, after the last non-doped SiO 2 film 13 is deposited, phosphorus (P) in PH 3 is added.
In order to uniformly disperse PSG into the film, heat treatment is performed for about 60 minutes in an N 2 or O 2 atmosphere, and PSG as shown in FIG.
The film 15 is formed.
【００１７】本実施例においては、ノンドープＳｉＯ2
膜１３が、Ｏ3−ＴＥＯＳ ＣＶＤを常圧条件で行なっ
たため、リフロー形状に形成できるため、ノンドープＳ
ｉＯ２膜１３の形成を複数回繰り返して形成された層間
絶縁膜はボイドの無い平坦化形成となる。また、最後の
熱処理によりＰが均一に拡散されるため、Ｎａのゲッタ
リング作用を奏し、デバイス特性の劣化が防止できる。In this embodiment, non-doped SiO 2
The film 13 can be formed in a reflow shape because O 3 -TEOS CVD was performed under normal pressure conditions.
The interlayer insulating film formed by repeating the formation of the iO 2 film 13 a plurality of times is a flattened film without voids. Further, since P is uniformly diffused by the final heat treatment, the gettering action of Na is exerted, and the deterioration of device characteristics can be prevented.
【００１８】以上、実施例について説明したが、本発明
は、これに限定されるものではなく、各種の設計変更が
可能である。Although the embodiment has been described above, the present invention is not limited to this, and various design changes can be made.
【００１９】例えば、上記実施例においては、Ｐをドー
プしたＰＳＧ膜１５を形成したが、ＰＨ３に代えてＢ2
Ｈ6をノンドープＳｉＯ2膜１３に吸着させることによ
り、ＢＳＧ膜を形成することも可能である。また、本発
明においては、吸着させるドーパントも上記のものに限
定されない。For example, although the PSG film 15 doped with P is formed in the above embodiment, B 2 is used instead of PH 3.
It is also possible to form a BSG film by adsorbing H 6 on the non-doped SiO 2 film 13. Further, in the present invention, the dopant to be adsorbed is not limited to the above.
【００２０】また、本実施例においては、有機金属化合
物として、ＴＥＯＳを用いたが、これに限定させるもの
ではない。Although TEOS is used as the organometallic compound in this embodiment, the organometallic compound is not limited to this.
【００２１】さらに、本実施例においては、ノンドープ
ＳｉＯ2膜形成工程を３回、ドーピングガスを流す工程
を２回に設定したが、工程数を増やしても勿論よい。Further, in the present embodiment, the non-doped SiO 2 film forming step is set to 3 times and the doping gas flowing step is set to 2 times, but the number of steps may be increased.
【００２２】[0022]
【発明の効果】請求項１記載の発明によれば、高アスペ
クト比の配線段差等をボイドが生じることなく、層間絶
縁膜を平坦に形成できる効果がある。そのため、配線の
断切れが防止でき、配線の信頼性を高める効果がある。
しかも、Ｎａのゲッタリング作用を有する層間絶縁膜が
形成できるため、例えばトランジスタ特性などのデバイ
ス特性の劣化を防止する効果がある。According to the first aspect of the present invention, there is an effect that the interlayer insulating film can be formed flat without generating a void in a wiring step having a high aspect ratio. Therefore, disconnection of the wiring can be prevented, and the reliability of the wiring can be improved.
Moreover, since an interlayer insulating film having a gettering effect of Na can be formed, it has an effect of preventing deterioration of device characteristics such as transistor characteristics.
【００２３】請求項２記載の発明は、Ｏ3−ＴＥＯＳ系
ＣＶＤによりセルフフローされたノンドープＳｉＯ2膜
が容易に形成できると共に、ドーパントが層間絶縁膜全
体に均一に拡散するため、Ｎａのゲッタリング作用を安
定化する効果がある。According to the second aspect of the invention, a self-flowing non-doped SiO 2 film can be easily formed by O 3 -TEOS-based CVD, and the dopant is uniformly diffused throughout the interlayer insulating film, so that Na gettering is performed. It has the effect of stabilizing the action.
【図１】本発明の実施例の工程を示す断面図。FIG. 1 is a sectional view showing a process of an embodiment of the present invention.
【図２】本発明の実施例の工程を示す断面図。FIG. 2 is a sectional view showing a process of an example of the present invention.
【図３】本発明の実施例の工程を示す断面図。FIG. 3 is a sectional view showing a process of an example of the present invention.
【図４】本発明の実施例の工程を示す断面図。FIG. 4 is a cross-sectional view showing a process of an example of the present invention.
【図５】本発明の実施例の工程を示す断面図。FIG. 5 is a cross-sectional view showing a process of an example of the present invention.
【図６】本発明の実施例の工程を示す断面図。FIG. 6 is a sectional view showing a process of an example of the present invention.
【図７】ＳｉＯ2下地表面をＰＨ3で覆った場合の高分子
反応中間体との関係を示す説明図。FIG. 7 is an explanatory diagram showing the relationship with a polymer reaction intermediate when the surface of a SiO 2 underlayer is covered with PH 3 .
【図８】ＰＳＧ膜の形状を示す断面説明図。FIG. 8 is an explanatory cross-sectional view showing the shape of a PSG film.
【図９】ノンドープＳｉＯ2膜のＮａに対する性質を示
す断面説明図。FIG. 9 is an explanatory cross-sectional view showing the property of a non-doped SiO 2 film with respect to Na.
【図１０】ＰＳＧを化学気相成長させる場合のドーパン
トと高分子反応中間体との水素結合関係を示す説明図。FIG. 10 is an explanatory view showing a hydrogen bond relationship between a dopant and a polymer reaction intermediate when chemical vapor deposition of PSG is performed.
１１…絶縁膜 １２…配線 １３…ノンドープＳｉＯ2膜 １４…ＰＨ3 １５…ＰＳＧ膜11 ... Insulating film 12 ... Wiring 13 ... Non-doped SiO 2 film 14 ... PH 3 15 ... PSG film
Claims (2)
Ｏ2膜を形成する工程と、ドーパントを該ノンドープＳ
ｉＯ2膜に吸着させる工程と、を複数回繰り返すことを
特徴とする層間絶縁膜の形成方法。1. Non-doped Si using an organometallic compound
A step of forming an O 2 film,
A method of forming an interlayer insulating film, which comprises repeating the step of adsorbing to the iO 2 film a plurality of times.
プＳｉＯ2膜を形成する工程と、ドーパントを該ノンド
ープＳｉＯ2膜に吸着させる工程と、を複数回繰り返し
た後、熱処理を施すことを特徴とする層間絶縁膜の形成
方法。2. A heat treatment is performed after repeating a step of forming a non-doped SiO 2 film by O 3 -TEOS-based CVD and a step of adsorbing a dopant to the non-doped SiO 2 film a plurality of times. Method for forming interlayer insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28800692A JPH06177120A (en) | 1992-10-27 | 1992-10-27 | Deposition of interlayer dielectric film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28800692A JPH06177120A (en) | 1992-10-27 | 1992-10-27 | Deposition of interlayer dielectric film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06177120A true JPH06177120A (en) | 1994-06-24 |
Family
ID=17724589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28800692A Pending JPH06177120A (en) | 1992-10-27 | 1992-10-27 | Deposition of interlayer dielectric film |
Country Status (1)
| Country | Link |
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| JP (1) | JPH06177120A (en) |
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| JP2014532304A (en) * | 2011-09-23 | 2014-12-04 | ノベラス・システムズ・インコーポレーテッドＮｏｖｅｌｌｕｓ Ｓｙｓｔｅｍｓ Ｉｎｃｏｒｐｏｒａｔｅｄ | Plasma activated conformal dielectric films |
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-
1992
- 1992-10-27 JP JP28800692A patent/JPH06177120A/en active Pending
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