JPH0616230B2 - Multi-screen display method - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a multi-screen display method for a cathode ray tube (CRT).

Background of the Technology CRTs are widely adopted for display terminals such as personal computers. That is, the data entered from the keyboard is displayed on the display to allow the operator to visually check it for errors, and the display of processing results and the like to inform the operator that the CR
T is often used.

By the way, as the functions of personal computers have become more sophisticated and parallel processing of multiple types of tasks has become possible, CRT
It becomes necessary to simultaneously display a plurality of types of tasks on the surface of the screen, that is, to make the screen a multi-screen.

An object of the present invention is to provide a method capable of performing this multi-screening easily, appropriately and easily and efficiently performing multi-task processing.

Configuration of the Invention That is, according to the multi-screen display method of the present invention, each output display of a plurality of tasks in a computer of a multi-task processing system for multi-controlling a plurality of tasks is simultaneously performed in parallel in divided display areas on a CRT screen. In the multi-screen display method, a plurality of screen memories that are associated with each of a plurality of tasks and each have a size of one screen and a divided display area of each task on the CRT screen are associated with the screen. A CRT screen scan is performed using a split ratio memory that holds defined split information and a selection circuit that selects one read output of the plurality of screen memories based on the split information held in the split ratio memory. According to the above, the plurality of screen memories and the division ratio memory are simultaneously read and scanned, and the A process of supplying a read output from any one of the screen memories selected by the selection circuit to the CRT, and assigning the read output to the corresponding task according to the size of the display area of each task divided based on the division information. It is characterized in that the control is performed so as to change the length of time.

Embodiments of the Invention This will be described in detail below with reference to embodiments.

As shown in FIG. 1 (a), in the present invention, the tube surface (drawing) of the CRT is divided into four parts A, B, C and D, which is the basic state. The display system of this CRT is a raster scan type, in which a counter counts a clock and the D / A conversion output of the count value becomes a horizontal deflection control signal of an electron beam, and an overflow pulse of the counter is counted by a second counter. The D / A conversion output of the count value becomes a vertical deflection control signal.
In this example, the number of horizontal dots (corresponding to each count of the first counter) on the screen is 640, and the number of vertical dots is correctly 400 horizontal scanning lines (corresponding to each count of the second counter).
Is. Therefore, the size of each section A to D is 320 × 200.
In the case of a color, the R, G, B3 elements are 1 dot. Divisions A to D correspond to each task, and task 1 is division A
Then, the task 2 is displayed in the section B in the manner of ...
These categories can be enlarged by scanning the keys (push buttons) on the keyboard. The push button group is shown in FIG.
Reference numerals 4 and 16 are for expanding the divisions A, B, C and D, and 18 is for returning to the basic state of FIG. 1 (a). FIG. 1 (c) shows a screen condition when the push button 10 is pressed, and the section A is enlarged vertically and horizontally, and the sections B, C and D are eclipsed. FIG. 1 (d) shows the screen condition at the moment when the push button 14 is pressed in the state of (c). That is, when the push buttons 10 to 16 are pressed, they are reset to the initial state and then start to enlarge, and the enlargement ratio is proportional to the pressing time.

Such a display is performed as follows. That is, tasks 1-
4 is the size of the full CRT surface, 640 × in this example.
400 screen memories are provided and masked so that only 1/4 of them are displayed in the basic state. When the display sections A to D are expanded by push button scanning, the mask is expanded. Since the task whose display category is enlarged is emphasized at that time, the weight of this task is increased. The hardware for performing such an operation is shown in FIG.

In FIG. 2, tasks 22, 24, 26, and 28 are tasks A, B, and
This is the video RAM for C and D, that is, the above-mentioned screen memory. A screen division ratio storage memory 30 generates selection signals S1 and S2 in synchronism with the scanning of the CRT, instructing which output of the memories 22 to 28 should be adopted for the current scanning. Since the screen is divided into four, the number of bits of the signal required to indicate each division is 2, and the binary 2-bit signal 00,0
1, 10 and 11 are used as selection signals for the memories 22, 24, 26 and 28. Reference numeral 32 is a video selection circuit for performing this memory selection, and this output signal S3 serves as a video output used for brightness control of the CRT. The screen memories 22 to 28 are read in 1-byte units.

FIG. 3 is an explanatory view of the memory access section, in which 64 is a clock generator, 66 is a first counter which counts the clock generator to generate a horizontal deflection control signal, and 68 is a counter which counts overflow pulses of the counter 66 and vertically. It is a second counter that generates a deflection control signal. The count values of these counters also serve as address signals for the screen memories 22 to 28 and the division ratio memory 30. The memories 22 to 28 simultaneously read 1 byte (bits corresponding to pixels of 8 bits), the 1-byte outputs are simultaneously loaded to the shift register 70, shifted by the clock of the clock generator 64, and the video signal S3 is output. Becomes S4 is a load signal. Each memory 24 ~
28 address signal terminals are connected in parallel to form a counter 6
6 and 68 are commonly received, but the output of the stored contents is H (high) level of the signal input to the enable terminal E, L
Controlled by the (low) level, only one memory outputs at one time point. Although the division ratio memory 30 also receives the address signal from the counters 66 and 68, the memories 22 to 2 described above are used.
Corresponding to the access in byte units in 8, the division ratio memory 30 may also be accessed in 1-byte units. Good. As for the capacity of this memory 30, the number of bytes on the side of the screen is (640 ÷÷
8), corresponding to the number of vertical horizontal scanning lines being 400, (640/8) × 400 × 2 bits. Select signals S1 and S2 which are 2-bit outputs read for each access
Is decoded by the decoder 72, and the memories 22, 24,
It becomes an output for selecting one of 26 and 28.

Returning to FIG. 2, writing to the division ratio memory 30 is performed by the output of the computer through the multiplexer 34. The signal S5 indicates a write address and data from the CPU. In the standard state, the division ratio memory 30 has 00 for the section A corresponding area, 01 for the section B corresponding area, 10 for the section C corresponding area, and 10 for the section C corresponding area in FIG. 11 is written in 40 × 200 sets. This is because the area size of the division ratio memory 30 corresponding to one division in the standard state is that the number of horizontal bytes is 80/2 = 40 and the number of vertical horizontal scanning lines is 400/2 = 200. Is based on 40 × 200. Push button 10
When is pressed, the CPU resets to this standard state, and then the pressing time is 1, 2, 3 ... Clock (this clock is different from that for scanning) cycles.
The number of rows and columns is increased by 1, 2, 3, ..., Rows and columns (01, 10, 11 of adjacent B to D sections are rewritten to 00). The same applies when the push buttons 12, 14, 16 are pressed. When reading the memory 30, the multiplexer 34 scans the scan address generation circuits (counters 66, 68) 36.
Switching to the side, reading is performed in synchronization with the scanning of the memories 22 to 28 and the CRT, and the selection signals S1 and S2 are generated.

The circuit group 50 is the weight deflection of the task and the selection signal S
1, S2 decoder 38, integrating circuits 42, 44, 46, 48 provided for each series of tasks 1 to 4, one-shot multivibrator 52, 54, 56, 58, and OR gate 62. The output pulse widths of the one-shot multi circuits 52 to 58 are changed by the output voltages of the integrating circuits 42 to 48, the rising edge of each output becomes the task switching interrupt signal S6 through the OR gate 62, and the falling edge of the output changes to the next one. Set Shot Multi to the trigger state. The selection signals S1 and S2 are unchanged during the first half and the second half of each horizontal scanning line, and the decoder 38 selects the integrating circuits 42 (or 46) and 44 (or 48) during the first and second half. , The time integration of the period is performed. Therefore, the outputs of the integrator circuits 42, 44, 46 and 48 are classified into sections A, B, C and D.
Proportional to the width of the output, determines the length of time the output allocates to tasks 1-4. However, classifications A to D are each CR
It is possible to expand so as to occupy the entire screen of T. Therefore, when A is expanded to the entire screen, B, C, and D become zero, while the time allotted to each task is not at least zero. This is because the allocated time cannot be zero as long as the tasks operate in parallel. One shot multi 52-5
8 has a minimum pulse width W1 and a maximum pulse width W2, and is adjusted by the output of the integrating circuit during this period. The output of the integrating circuit increases when one increases, and the other decreases, so the sum of the output pulse widths of the one-shot multis 52 to 58 and therefore the sum of the allocated time of each task is constant. However, the processing time of each task is not synchronized with the scanning of the CRT because of the one-shot multi operation, and the first start is performed by the trigger signal TG generated when the power is turned on. And is self-propelled.

As described above, in the present invention, the division ratio memory for dividing the screen of the CRT is provided, and each task is provided with the screen memory having the capacity of one screen, and the standard state is set according to the contents of the division ratio memory. Then, each 1/4 of them is displayed in each of the four divided sections of the CRT screen, and the contents of the division ratio memory can be changed by operating the push button corresponding to each section, so that each section can be enlarged. Further, it is possible to enlarge a desired section of the CRT screen by an easy operation and, for example, make it possible to view the data currently being input in detail and surely. It is possible to change the assigned time for each task as this category expands.
As a result, multitasking processing can be appropriately performed. Of course, the number of divisions is not limited to four, but any number of tasks such as data input from the cooboard, printout, file loading, and list creation can be used for each task of multitasking. Since there is a problem of being too small, about 4 divisions are suitable.

Further, in the present invention, one kind of scrolling can be performed by operating each push button, and a virtual screen of 1280 × 800 dots, which is a combination of four screen memories of 640 × 400 dots possessed by each task, can be assumed.

Further, in the present invention, when the display is set to the standard state and the outputs of the address counters 66 and 68 are input to the memories 22 to 28 by shifting them to the right by one right, only the even addresses of the memories are accessed and the number of read data is halved. Although coarse, it is also possible to simultaneously display the contents of the full screen memory of tasks 1 to 4 on the CRT screen. In the embodiment, the push button is pressed to enlarge the display section, but it is also possible to change the display section to be reduced (the other section is enlarged).

[Brief description of drawings]

FIG. 1 is a diagram for explaining a display method of the present invention, FIG. 2 is a block diagram showing an example of a circuit for implementing the present invention, and FIG. 3 is a block diagram showing details of a part of FIG. In the drawing, A, B, C, and D are each division of a CRT screen divided into four, 30 is a division ratio memory, and 10, 12, 14, and 16 are push buttons for changing the size of each division.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Nobuto Awaga 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited (56) References JP-A-51-114829 (JP, A) JP-A-52- 2336 (JP, A)

Claims (2)

[Claims] 1. A multi-screen display method for simultaneously displaying each output of a plurality of tasks in a computer of a multi-task processing system for controlling a plurality of tasks in a parallel manner in divided display areas on a CRT screen. A plurality of screen memories that are associated with each of the plurality of tasks and each have a size of one screen, and a division that holds division information that defines the divided display area of each task on the CRT screen by the screen correspondence. A ratio memory and a selection circuit that selects one read output of the plurality of screen memories based on the division information held in the division ratio memory, and the plurality of screen memories according to the screen scanning of the CRT. And the split ratio memory are simultaneously read and scanned, and any one of the screens selected by the selection circuit based on the split information obtained from the split ratio memory The read output from the memory is supplied to the CRT, and the length of the processing time assigned to the corresponding task is controlled according to the size of the display area for each task divided based on the division information. A multi-screen display method characterized by the above. 2. The division information stored in the division ratio memory according to claim 1, is dynamically changeable with a standard one that makes the display areas of a plurality of tasks equal in size. And multi-screen display method.