JPH06169292A - Noise reduction device - Google Patents

Abstract

PURPOSE:To obtain a proper noise reduction effect in response to an input signal by changing a nonlinear input output characteristic used to reduce thermal noise of a circuit system added to an acoustic signal and thermal noise from a sound collection microphone unit in a listening sense and the entire gain depending on a level of an input signal. CONSTITUTION:A signal from a 2nd signal amplifier means 6 is given to a 1st signal maximum value limit means 9 and multiplied by an input signal at a 1st signal multiplier means 10 to obtain a nonlinear input output characteristic and the input output characteristic is changed by adding an average level from a signal integration means 4 to a signal from the 2nd signal amplifier means 6. Furthermore, a minimum value latch means 5 obtains a minimum hold value of an average level and the gain at output is controlled by using the signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is intended to reduce a noise component output from an audio device when there is no target audio signal in the audio device including a microphone, a microphone amplifier and a device in the subsequent stage. The present invention relates to a noise reduction device.

[0002]

2. Description of the Related Art A conventional noise reduction device will be described below. FIG. 6 shows the configuration of a conventional noise reduction device. In FIG. 6, reference numeral 1 is an input terminal, and 2 is a signal rectifying means, which receives a signal from the input terminal 1 as an input and outputs its absolute value. 66 is a signal amplification means, which is a signal rectification means 2
It is provided in the latter stage. Reference numeral 7 is a level setting means. Reference numeral 8 is a first signal adding means, which receives signals from the signal amplifying means 66 and the level setting means 7 and adds them to output. Reference numeral 69 denotes a signal maximum value limiting means, which is provided at a stage subsequent to the first signal adding means 8. Reference numeral 70 denotes a signal multiplying means, which receives the signals from the input terminal 1 and the signal maximum value limiting means 69 as input, multiplies them and outputs. An output terminal 100 is provided at a stage subsequent to the signal multiplication means 70.

The operation of the conventional noise reduction device configured as described above will be described below. First, let the signal input from the input terminal 1 be x (t). However,
At this time, it is assumed that x (t) is standardized in the range of −1 ≦ x (t) ≦ 1. Assuming that the amplification factor of the signal amplifying means 66 is a and the output of the level setting means 7 is a constant b, the first signal adding means 8
The value c output from Eq.

[0004]

## EQU1 ## c = a.multidot..vertline.x (t) .vertline. + B where b <1 When the output of the signal maximum value limiting means 69 provided in the subsequent stage of the first signal adding means 8 is d, the input c is 1. When the value is larger, the value is limited to 1, so that d is given by the equation (2).

[0005]

[Equation 2]

The output d from the signal maximum value limiting means 69 is multiplied by the input signal x (t) in the signal multiplying means 70 to produce the output signal y.
get (t). y (t) is given by Equation 3.

[0007]

[Equation 3]

Thus, the output signal y of the noise reduction device is
(t) is y (t) pbx when the input signal x (t) is sufficiently small.
(t) and when the amplitude of x (t) is sufficiently large, y (t) = x
(t). FIG. 7 is a graph when a = 2 ⁴ and b = 0.5.
The input / output characteristics of the conventional example shown in FIG. If the setting is such that the minute noise of the circuit system becomes | x (t) | << (1-b) / a (Fig. 7

[0009]

[Outer 1]

On the other hand, for an input signal x (t) such that | x (t) |> (1-b) / a, since d = 1, the input / output relationship is y (t). = X (t), and the signal is not attenuated. For the above reason, the output y (t) is suppressed when the input signal x (t) has a low signal level of only noise components.

[0011]

However, in the above configuration, when a signal having a sufficiently large amplitude is input as the input signal x (t), the amplification factor is different between the large and small amplitude values. , The output signal y (t) has waveform distortion with respect to the input signal x (t), and is large when the amplitude of the input signal x (t) is | x (t) | p (1-b) / a. It had a problem that it would affect. The present invention solves the above-mentioned problems, and the nonlinear input characteristic and the overall gain used for reducing the thermal noise of the circuit system added to the acoustic signal and the thermal noise from the sound collecting microphone unit are calculated as follows. An object of the present invention is to provide a noise reduction device that is changed according to the amplitude level.

[0012]

In order to achieve the above object, the noise reducing apparatus of the present invention restores the input / output characteristic to a linear characteristic when an original signal other than the noise of the circuit system comes in. A signal rectifying means provided after the input terminal; a first signal amplifying means provided after the signal rectifying means; a signal integrating means provided after the first signal amplifying means; Second signal amplifying means provided at the latter stage of the rectifying means, level setting means, signal integrating means, level setting means, and first signal adding means for adding output signals from the second signal amplifying means, A first signal maximum value limiting unit that is provided at a subsequent stage of the first signal adding unit and limits a value of a signal larger than 1 to 1, and a first signal maximum value limiting unit that multiplies a signal from the input terminal 1 is provided with the signal multiplication means.

Further, the minimum value holding means composed of an integrator having a short falling time constant and a long rising time constant, which is provided after the signal integrating means, and a signal from the minimum value holding means and the level setting means. And a second signal maximum value limiting means for limiting the value of a signal larger than 1 to 1, which is provided after the second signal adding means. By providing the signal multiplying means and the second signal multiplying means for multiplying the signal from the second signal maximum value limiting means, a slight amount of amplitude attenuation depending on the average amplitude level of the input signal is manipulated, and an effect on the auditory sense is obtained. It can be expanded.

Further, it is possible to further obtain the effect by providing the noise reducing means having the above-mentioned structure at each stage after each filter of the band dividing filter group. Further, the noise reducing means having the above-mentioned structure is subjected to the fast Fourier transform (FFT). The effect can be further obtained by providing each frequency component of the output and performing an inverse fast Fourier transform (IFFT) on the output of the noise reduction means group.

[0015]

In the noise reduction device configured as described above, the input signal is x (t), the amplification factor of the first signal amplifying means is a ₁ , and the second amplification factor is a 2.
Letting a _{2 be} the amplification factor of the signal amplification means and b be the constant output from the level setting means, ε {·} represents the short-time integration of the time function in parentheses, and the output of the signal integration means is ε. {A ₁ || x (t) |}, the output of the second signal amplifying means is a
₂ · | x (t) |, and the output of the first signal adding means is d ₁
Then, d ₁ is given by Formula 4.

[0016]

## EQU00004 ## c ₁ = ε {a _1. | X (t) |} + a _2. | X (t) | + b The first signal maximum value limiting means receives c ₁ in the above equation as c ₁ When it is 1 or more, c ₁ = 1. The output d ₁ of the first signal maximum value limiting means is expressed by the equation (5).

[0017]

[Equation 5]

The input signal x (t) is multiplied by d ₁ in the above equation by the first signal multiplication means. Here, the portion different from the conventional example is the first term ε {a ₁ || x in the upper equation of the equation 4 or the equation 5.
(t) |} is added. Without this first term, when the necessary signal is input as x (t), the output waveform will be distorted because the linear amplification factor from a small amplitude to a large amplitude does not occur. The first term is the input signal x
It is the short-time average amplitude of (t), and if the constant a ₁ is set so that it exceeds 1 when a signal greater than the noise level of the circuit system is input, the required signal is input. At times, from small amplitude to large amplitude, c ₁ > 1 is always maintained, and waveform distortion does not occur in the output signal. On the other hand, if the state where the input signal is only the noise of the circuit system continues for a certain period of time or more, the value of the first term of Formula 4 becomes smaller than 1, and the noise is suppressed by performing the same operation as the conventional example.

Further, the output d ₂ of the second signal maximum value limiting means is obtained when the target signal is continuously input due to the relationship between the long rising time constant and the short falling time constant of the minimum value holding means. When d ₂ = 1 and the signal is stopped from the input state of the target signal and only the noise of the circuit system becomes, d ₂ <1 immediately, and when the target signal comes in again d ₂
Gradually approaching 1. Therefore, when the second signal multiplying means eliminates the target signal from the input signal from the first signal multiplying means and becomes only the noise signal of the circuit system,
The output is immediately attenuated, and when the target signal comes in, the attenuation amount is restored to zero at a speed that is not noticeable to the listener, thereby obtaining a larger noise reduction effect.

Further, in the above-mentioned method, when the target signal is input, the input / output relationship becomes y (t) = x (t) so that waveform distortion is not generated in the output signal. When a signal is input, noise will not be suppressed regardless of the frequency distribution of the signal. Therefore, by dividing the input signal into two or more bands and using the noise reduction means described above for each band, noise in a frequency band in which the target signal does not exist is suppressed even when the target signal is input. Become so.

Also, after the input signal is FFT-developed in the frequency domain, the above-described noise reduction means is used for each frequency component, and the inverse FFT is used to restore in the time domain, so that each fine frequency band is restored. Processing is performed, and a larger noise reduction effect can be obtained.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A noise reducing apparatus according to a first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of a noise reduction device according to the first embodiment of the present invention. In FIG. 1, reference numeral 1 is an input terminal, and 2 is a signal rectifying means, which receives a signal from the input terminal 1 and outputs its absolute value. Reference numeral 3 is a first signal amplifying means, which is provided at a stage subsequent to the signal rectifying means 2. Reference numeral 4 denotes a signal integrating means, which is provided after the first signal amplifying means 3. Reference numeral 5 is a minimum value holding means, which is provided at the subsequent stage of the signal integrating means 4. Reference numeral 6 denotes a second signal amplifying means, which is provided in a stage subsequent to the signal rectifying means 2 in parallel with the first signal amplifying means 3. Reference numeral 7 is a level setting means. Reference numeral 8 is a first signal adding means, which is a signal integrating means 4 and a second signal amplifying means 6.
The signals from the level setting means 7 are input, and these are added and output. Reference numeral 9 denotes a first signal maximum value limiting means, which is provided at a stage subsequent to the first signal adding means 8 and limits the value to 1 when the signal is larger than 1. Reference numeral 10 denotes a first signal multiplying means, which multiplies the signal from the input terminal 1 and the signal from the first signal maximum value limiting means 9. Reference numeral 11 is a second signal adding means for adding the signals from the minimum value holding means 5 and the level setting means 7. Reference numeral 12 denotes a second signal maximum value limiting means, which is provided at the subsequent stage of the second signal adding means 11 and limits the value to 1 when the signal is larger than 1. Reference numeral 13 denotes a second signal multiplying means, which multiplies the signals from the first signal multiplying means 10 and the second signal maximum value limiting means 12 and outputs the result to the output terminal 100.

FIG. 2 shows the input / output characteristics of the noise reducing apparatus constructed as described above, where the horizontal axis is the absolute value | x (t) | of the input signal and the vertical axis is the absolute value | y of the output signal. (t) |
Amplification factor a ₁ = 2 ⁶ of the signal amplification means 3, the amplification factor a ₂ = 2 ^{4 of} the second signal amplification means 6, and the constant b from the level setting means 7.
This is the characteristic when = 0.5. The curve a in FIG. 2 is the input signal x (t)
Is only the noise of the circuit system, when the target signal (the original input signal) is input as x (t) in the curve b, the target signal for a certain time or more is input in the curve c as x (t) Shows the input / output characteristics when continued.

The operation of the noise reduction device configured as described above will be described below with reference to FIGS. 1 and 2. In FIG. 1, the input signal from the input terminal 1 is x (t),
Where the amplification factor of the signal amplification means 3 is a ₁ , the amplification factor of the second signal amplification means 6 is a ₂ , and the constant output from the level setting means 7 is b, ε {·} is the time in parentheses. Assuming that the function is integrated for a short time, the output of the signal integrating means 4 is ε {a ₁
· | X (t) |} , the output of the second signal amplifying means 6 a ₂ · |
x (t) |, and assuming that the output of the first signal adding means 8 is c ₁ , c ₁ is given by the equation (6).

[0025]

C ₁ = ε {a ₁ · | x (t) |} + a ₂ · | x (t) | + b The first signal maximum value limiting means 9 receives c ₁ in the above equation as c ₁ When is 1 or more, c ₁ = 1. The output d ₁ of the first signal maximum value limiting means 9 is given by the equation (7).

[0026]

[Equation 7]

The input signal x (t) is the first signal multiplication means 10
Is multiplied by d ₁ in the above equation. Here, the first term ε {a ₁ || x (t) |} of the upper equation of the equations 6 or 7 is the input signal x
It is the short-time average amplitude of (t), and the second and third terms give the input / output characteristic of the curve a in FIG. 2 that further suppresses the small amplitude signal. In the first signal multiplication means 10, the calculation of x (t) × d ₁

[0028]

[Outside 2]

When there are only signals in the range (2), the input / output characteristics are as shown by the curve a in FIG. Then the input signal x
When a signal having an amplitude in the range m in FIG. 2 is input to (t) as the target signal, the first term of the equation 7 becomes larger than 1 and the input / output characteristic becomes the straight line b. It is output to the second signal multiplying means 13 in the next stage without generating waveform distortion in the signal multiplying means 10. In this way, if the target signal has a large amplitude and noise of a small amplitude in the circuit system is not noticeable to the sense of hearing, it has a linear passage characteristic, and if x (t) is only a small amplitude noise. Noise is reduced by the non-linear passage characteristic. Further, the minimum value holding means 5 has integration characteristics having a long rising time constant and a short falling time constant, and the signal is a digital signal, the sampling time is n, and the input is Mx.
(n) and the output are My (n), and are obtained as in, for example, the equation (8).

[0030]

[Equation 8]

From the relationship between the long rising time constant and the short falling time constant of the minimum value holding means, d ₂ = 1 when the target signal is continuously input, and the signal stops from the target signal input state. Immediately d ₂ <1 when only the system noise becomes, and d ₂ gradually approaches 1 when the target signal comes in again. Therefore, the second signal multiplying means attenuates the output immediately when the target signal disappears and becomes only the noise signal of the circuit system with respect to the input signal from the first signal multiplying means, and the target signal comes in. In such a case, a greater noise reduction effect can be obtained by recovering the attenuation amount to zero at a speed that is not noticeable to the listener.

Next, a noise reducing device according to a second embodiment of the present invention will be described with reference to the drawings. FIG. 3 shows the configuration of a noise reduction device according to the second embodiment of the present invention. In FIG. 3, 1 is an input terminal, 21 to 23 are first
To a third bandpass filter, which are provided in parallel after the input terminal 1 to form a filter bank. Reference numerals 31 to 33 are first to third noise reduction means, respectively, which are provided in the subsequent stages of the first band pass filter 21 to the third band pass filter 23. Reference numeral 40 denotes an addition means, which adds the output signals from the first noise reduction means 31 to the third noise reduction means 33 and outputs the result to the output terminal 100.

The operation of the noise reduction device configured as described above will be described below. First noise reduction means 31
The third to the third noise reducing means 33 operate in the same manner as in the first embodiment of the present invention. The difference from the first embodiment is that the noise reduction means is provided for each band of the band-divided input signal, so that even if a chromatic target signal is input, The noise reduction effect can be obtained in the band where the signal is not included.

Next, a noise reducing device according to a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 shows the configuration of a noise reduction device according to the third embodiment of the present invention. In FIG. 4, 1 is an input terminal, and 50 is an FFT (Fast Fourier Transform), which is provided in the subsequent stage of the input terminal 1. F
The output of FT50 is that each frequency component is represented by a complex number of the real part and the imaginary part. X _RE1 and X _IM1 are signal lines representing the real part and the imaginary part of the first frequency component, and X _REn And X _IMn is the nth
It is a signal line showing the real part and imaginary part of the th frequency component. 61
Is a first complex noise reduction means, which outputs a real part Y _RE1 and an imaginary part Y _IM1 after performing noise reduction processing with X _RE1 and X _IM1 as inputs. 62 is a second complex noise reducing means,
Noise reduction processing is performed using X _RE2 and X _IM2 as input, and then the real part Y _RE2 and the imaginary part Y _IM2 are output. _{Reference numeral} 63 is an nth complex noise reducing means, which outputs a real part Y _REn and an imaginary part Y _IMn after performing noise reduction processing with X _REn and X _IMn as inputs. _{Reference numeral} 51 denotes an inverse FFT, which outputs Y _RE1 and Y _{IM1 of} the first complex noise reducing means 61 to outputs Y _REn and Y of the n-th complex noise reducing means 63.
_Inputting up to _IMn , the frequency domain signal is restored to the time domain signal and output to the output terminal 100.

FIG. 5 shows the configuration of the first complex noise reducing means 61 to the nth complex noise reducing means 63 of FIG.
X _RE indicates a real part input terminal, and X _IM indicates an imaginary part input terminal. Reference numeral 16 is an absolute value calculation means, which receives signals from the real part input terminal X _RE and the imaginary part input terminal X _IM . 3 is first signal amplification means, 4 is signal integration means, 5 is minimum value holding means, 6 is second signal amplification means, 7 is level setting means, 8 is first signal addition means, and 9 is first Is a signal maximum value limiting means. The first signal amplifying means 3 to the first signal maximum value limiting means 9 are the same as in the first embodiment. Reference numeral 10 is a first signal multiplying means, and the real part input terminal X _RE is a first signal maximum value limiting means 9
Multiply the signal of. 11 is the second signal adding means, 12 is the second
Is a signal maximum value limiting means. The second signal adding means 11 and the second signal maximum value limiting means 12 are the same as those in the first embodiment. Reference numeral 13 is a second signal multiplication means, which is a first signal multiplication means 10
And the signal from the second signal maximum value limiting means 12 are multiplied.
Reference numeral 14 is a third signal multiplying means, which multiplies the imaginary part input terminal X _IM by the signal from the first signal maximum value limiting means 9. 15
Is a fourth signal multiplication means, and is a third signal multiplication means 14
And the signal from the second signal maximum value limiting means 12 are multiplied.

The operation of the noise reduction device configured as described above will be described below with reference to FIGS. 4 and 5. The operation of the complex noise reducing means of FIG. 5 is the same as that of the first embodiment of the present invention, except that the input / output signal is a complex number. Along with this, the signal rectifying means 2 in the first embodiment is changed to the absolute value calculating means 16 which inputs the real part and the imaginary part of the complex number and outputs the absolute value thereof, with respect to the input X _{IM of the} imaginary part. Also, third and fourth signal multiplication means are provided so that the signals from the first signal maximum value limiting means 9 and the second signal maximum value limiting means 12 are multiplied. Figure 4
Frequency analysis of n points by FFT50 of
By performing the process of the complex noise reducing means of FIG. 5 for each frequency component, it is possible to always obtain the noise reducing effect at least in the band where the frequency component of the target signal does not exist.

[0037]

As is apparent from each of the above-described embodiments, the present invention provides the signal rectifying means provided after the input terminal, the first signal amplifying means provided after the signal rectifying means, and the first signal amplifying means. Signal integrating means provided after the signal amplifying means of
Second signal amplifying means, a level setting means, a first signal adding means for adding output signals from the signal integrating means, the level setting means, and the second signal amplifying means, which are provided in the subsequent stage of the signal rectifying means. A first signal maximum value limiting means for limiting the value of a signal larger than 1 to 1 provided after the first signal adding means, and a first signal maximum value limiting means for multiplying the signal from the input terminal by By including the signal multiplication means of No. 1, the attenuation amount of the output signal with respect to the input signal in the small amplitude region is changed according to the average amplitude level of the input signal and compared with the thermal noise of the circuit system or the thermal noise from the sound pickup microphone unit. Then, for an input acoustic signal including a large-amplitude target signal, a linear input / output characteristic is obtained and an output signal is obtained without distorting the target signal, and there is no target signal and only low-level circuit noise components For small amplitude values Reduce audibility circuit noise during silence by suppressing the output becomes non-linear input-output characteristic obtained by attenuating the output.

Further, the minimum value holding means is provided after the signal integration means, and the gain of the output signal with respect to the input signal is changed by using the minimum value of the average amplitude level of the input signal within a unit time. The thermal noise of the circuit system and the thermal noise from the sound pickup microphone unit when the amplitude is small are reduced in terms of hearing.

Further, by providing the noise reducing means for each band of the band-divided input signal, the noise reducing effect can be obtained even when the chromatic target signal is input. In addition, after the input signal is FFT-developed in the frequency domain, the noise reduction means described above is used for each frequency component, and the inverse FFT is used to restore in the time domain, thereby performing processing for each fine frequency band. Further, it is possible to obtain a larger noise reduction effect.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a noise reduction device according to a first embodiment of the present invention.

FIG. 2 is an input / output characteristic diagram of the noise reduction device of the first exemplary embodiment of the present invention.

FIG. 3 is a configuration diagram of a noise reduction device according to a second embodiment of the present invention.

FIG. 4 is a configuration diagram of a noise reduction device according to a third exemplary embodiment of the present invention.

FIG. 5 is a configuration diagram of first to n-th complex noise reducing means of the noise reducing apparatus of the third exemplary embodiment of the present invention.

FIG. 6 is a configuration diagram of a conventional noise reduction device.

FIG. 7 is an input / output characteristic diagram of a conventional noise reduction device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Input terminal, 2 ... Signal rectification means, 3 ... 1st signal amplification means, 4 ... Signal integration means, 5 ... Minimum value holding means, 6 ... 2nd signal amplification means, 7 ... Level setting means, 8 ... 1st signal addition means, 9 ... 1st signal maximum value limiting means, 10 ... 1st signal multiplication means, 11 ... 2nd signal addition means, 12 ... 2nd signal maximum value limiting means, 13
... second signal multiplication means, 14 ... third signal multiplication means,
15 ... Fourth signal multiplying means, 16 ... Absolute value calculating means, 21
... first band-pass filter, 22 ... second band-pass filter, 23 ... third band-pass filter, 31 ... first noise reduction means, 32 ... second noise reduction means, 33 ... third noise Reducing means, 40 ... adding means, 50 ... FFT, 51 ... inverse FFT, 61 ... first complex noise reducing means, 62 ... second complex noise reducing means, 63 ... nth complex noise reducing means,
66 ... Signal amplifying means, 69 ... Signal maximum value limiting means, 70 ...
Signal multiplying means, 100 ... Output terminal.

Claims (4)

[Claims] 1. A signal rectifying means provided after the input terminal, a first signal amplifying means provided after the signal rectifying means, and a signal provided after the first signal amplifying means. The output signals from the integrating means, the second signal amplifying means provided after the signal rectifying means, the level setting means, the signal integrating means, the level setting means, and the second signal amplifying means are added. First signal adding means, first signal maximum value limiting means which is provided after the first signal adding means and limits the value of a signal larger than 1 to 1, and the first signal maximum value limiting means A noise reduction apparatus comprising: a first signal multiplying unit that multiplies a signal from the input terminal by the unit. 2. A signal rectifying means provided after the input terminal, a first signal amplifying means provided after the signal rectifying means, and a signal provided after the first signal amplifying means. Integrating means, minimum value holding means provided after the signal integrating means, second signal amplifying means provided after the signal rectifying means, level setting means, signal integrating means and the level First signal adding means for adding the output signals from the setting means and the second signal amplifying means,
A first signal maximum value limiting unit that is provided after the first signal adding unit and limits the value of a signal larger than 1 to 1.
First signal maximum value limiting means, first signal multiplying means for multiplying the signal from the input terminal, and second signal adding means for adding the signals from the level setting means and the minimum value holding means, Second signal maximum value limiting means, which is provided after the second signal adding means and limits the value of a signal larger than 1, to 1, the first signal multiplying means, and the second signal maximum value limiting means A noise reduction device comprising a second signal multiplication means for multiplying the signal from the. 3. An input terminal, a first bandpass filter provided after the input terminal, and a second bandpass filter provided in parallel with the first bandpass filter after the input terminal. A third band-pass filter provided in parallel with the first to second band-pass filters in the latter stage of the input terminal, and a first band-pass filter provided in the latter stage of each of the first to third band-pass filters. The third noise reducing means and the adding means which is provided after the first to third noise reducing means and adds the output signals from the first to third noise reducing means, A noise reduction device, wherein the third noise reduction means has the configuration described in claim 1 or 2. 4. A fast Fourier transform (FFT) provided at the _subsequent stage of the input terminal, and when the real part of the m-th output output from the FFT is X _REm and the imaginary part is X _IMm , the FFT from the FFT is output. When the first X _RE1 and X _IM1 are input, the first complex noise reducing means and the second to nth outputs from the FFT are respectively input and provided in parallel with the first noise reducing means. , The second to n-th complex noise reducing means and the inverse FFT which receives the output from the first to n-th complex noise reducing means as input, and the first to n-th complex noise reducing means, Real part input terminal X _RE and imaginary part input terminal X
_IM , an absolute value calculating means for inputting signals from the real part input terminal X _RE and the imaginary part input terminal X _IM, and a first signal amplifying means provided at a stage subsequent to the absolute value calculating means, A signal integrating unit provided after the first signal amplifying unit, a minimum value holding unit provided after the signal integrating unit, and a second signal amplifying unit provided after the absolute value calculating unit. Means, level setting means, first signal adding means for adding output signals from the signal integrating means, the level setting means, and the second signal amplifying means, and a stage subsequent to the first signal adding means. The value of the signal that is provided and is greater than 1 is 1
To the first signal maximum value limiting means, the first signal maximum value limiting means and the first signal multiplying means for multiplying the signal from the real part input terminal X _RE , the level setting means and the minimum. Second signal adding means for adding the signals from the value holding means, and second signal maximum value limiting means provided at a stage subsequent to the second signal adding means for limiting the value of a signal larger than 1 to 1. Second signal multiplying means for multiplying the signals from the first signal multiplying means and the second signal maximum value limiting means,
A real part output terminal Y _RE provided after the second signal multiplying means, a third signal multiplying means for multiplying the signals from the first signal maximum value limiting means and the imaginary part input terminal X _IM. ,
Fourth signal multiplying means for multiplying the signals from the third signal multiplying means and the second signal maximum value limiting means; and the fourth signal multiplying means.
A noise reduction device comprising an imaginary part output terminal Y _IM provided at a stage subsequent to the signal multiplying means.