JPH06169094A - Semiconductor acceleration sensor - Google Patents

Abstract

(57) [Summary] [Object] The present invention suppresses the occurrence of hysteresis in the output of a piezoresistive bridge circuit, facilitates the placement of piezoresistors on the beam, and eliminates the erosion of the wiring by the etching solution when forming the beam. The purpose is to do. [Structure] At least one N-type beam 7 connecting and supporting the frame portion 6 and the weight portion 5, P-type diffusion resistances r1 and r2 formed on the surface portion of the beam 7, and formed near the beam portion 7. A P-type diffusion layer 12 having a high-concentration N-type diffusion layer 13 on its surface,
It is characterized by having metal wirings 14 connecting the diffusion resistors r1 and r2 and the N-type diffusion layer 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor acceleration sensor.

[0002]

2. Description of the Related Art Conventional semiconductor acceleration sensors include those shown in FIGS. 11 to 13 (see "A").
SILICONBASED MICROMECHAN
ICAL ACCELERO METER WITH C
ROSS ACCELERATION SENSITI
VITY COMPENSATION "E. Oberm
eier et. al TRANSDUCERS ^, 87
pp. 339-402). 31 in FIGS. 11 and 12
Is a silicon substrate, the groove portion 32 is removed by selective etching, the weight portion 33, a frame portion 34 surrounding the weight portion 33, and thin beam portions for connecting and supporting both sides of the weight portion 33 to the frame portion 34. And 35 are formed. With such a configuration, the semiconductor acceleration sensor has a so-called double-supported beam structure. Eight piezoresistors 36a to 36h are formed on the surface portions of both beam portions 35 by diffusion resistance, and when the beam portions 35 are deflected by acceleration, the stress changes the resistance value. 37 is a SiO ₂ film, and 38 is a metal wiring that electrically connects the piezoresistors 36a to 36h and the like, and a metal such as Al is used. Such a semiconductor acceleration sensor can be manufactured by batch processing by a process substantially similar to the manufacturing process of a semiconductor IC. The piezoresistors 36a to 36h are assembled into a full bridge as shown in FIG. Then, as shown in FIG. 12, when acceleration is applied in the Z-axis direction, for example, stress as shown in the upper diagram of the figure is generated on the surface portion of the beam portion 35, and the resistance values of the piezoresistors 36a to 36h change. And ΔV shown in FIG.
= Output of V ₁ -V ₂ is obtained. The bridge configuration as shown in FIG. 13 is designed so that the output ΔV is canceled when acceleration is applied in a direction other than the main detection direction of the sensor (in this case, the Z-axis direction), that is, the other axis direction (x-axis direction). In addition, since the resistance values of the piezoresistors 36a to 36h change, there is an advantage that so-called other axis sensitivity can be significantly reduced.
However, in such a semiconductor acceleration sensor, since metal such as Al is used for the wiring in the beam portion 35 that electrically connects the piezoresistors 36a to 36h, residual stress may cause hysteresis in the bridge output. However, there is a problem that the metal wiring is easily corroded during etching when forming the beam portion 35.

Another conventional example for solving this problem is shown in FIG. This figure shows only a portion near the beam portion in an enlarged manner. In this conventional example, the weight portion 43 is constituted by the beam portion 45 having a thin cantilever structure and the frame portion 4 is formed.
A piezoresistor is formed by diffusion resistance on the surface of the frame portion 44, which is connected to and supported by No. 4. 42 is a groove. The piezoresistor is adjusted so that the resistance value becomes a predetermined value by folding the pattern a required number of times, and two 46 each having a stress direction parallel to the current direction and two perpendicular 47 are formed. ing. A full bridge circuit is formed by a total of four piezoresistors, and it is attempted to improve the bridge sensitivity by utilizing the fact that the changes in the resistance values with respect to the stress of both are opposite. The wiring 48 on the beam portion 45 for electrically connecting the piezoresistors 46, 47, etc.
The same high resistance P-type semiconductor diffusion layer as 47 is used, and the width of the wiring 48 is wide so that the piezo resistance change in the wiring 48 portion when stress is applied can be ignored. If the impurity concentration of the P-type semiconductor diffusion layer in the wiring portion is increased, the resistance value can be suppressed low. However, as shown in FIG.
The piezoresistive coefficient of the P-type semiconductor decreases with an increase in the impurity concentration, but the ratio is about 20 × 10 ⁻¹² cm ² / dyn with respect to the increase of the impurity by one digit. Therefore, even when the wiring on the beam portion is formed of the high-concentration P-type semiconductor diffusion layer, a diffusion layer having a certain width is required to eliminate the influence of the piezoelectric effect.

[0004]

In the conventional semiconductor acceleration sensor, since metal such as Al is used for the wiring on the beam portion for electrically connecting the piezoresistor, the piezoresistive resistance is caused by residual stress. There was a problem that hysteresis was generated in the output of the bridge circuit, and the wiring was easily eroded by the sneak of the etching solution when forming the beam portion. Also,
The same P as the piezoresistor without using metal for the wiring on the beam
In another conventional example using the type semiconductor diffusion layer, the width of the diffusion layer must be widened in order to eliminate the influence of the piezoelectric effect of the wiring portion. For this reason, there is a problem in that when the width of the beam portion is narrow or when an attempt is made to construct a full bridge circuit with piezoresistors, the arrangement becomes difficult.

The present invention has been made by paying attention to such a conventional problem, and suppresses the occurrence of hysteresis in the bridge circuit output of the piezoresistor, and a plurality of piezoresistors for forming a full bridge circuit on the beam portion. It is an object of the present invention to provide a semiconductor acceleration sensor capable of facilitating the disposition property of the above and further eliminating the erosion of the wiring due to the wraparound of the etching solution when forming the beam portion.

[0006]

In order to solve the above-mentioned problems, the present invention firstly proposes a weight portion formed in a substantially central portion of a semiconductor substrate and a frame formed so as to surround the weight portion. A part, and at least one N-type beam extending from the weight part so as to connect and support the frame part and the weight part,
A P-type diffusion resistance formed on the surface of the beam and a P-type diffusion layer formed near the beam and having a high-concentration N-type diffusion layer on the surface.
The gist is to have a type diffusion layer and a metal wiring formed on the semiconductor substrate and connecting the diffusion resistance and the N type diffusion layer at a portion excluding the beam portion.

Secondly, a weight portion formed in a substantially central portion of the semiconductor substrate, and a frame portion formed so as to surround the weight portion,
At least one P-type beam extended from the weight portion so as to connect and support the frame portion and the weight portion, and a P-type diffusion resistance is formed on the surface portion of the beam. The first N-type diffusion layer having the high-concentration second N-type diffusion layer formed in the vicinity of the beam portion, the diffusion resistance and the N-type diffusion layer formed on the semiconductor substrate are provided in the beam. The gist of the present invention is to have a metal wiring connected at a portion other than the portion.

[0008]

In the above structure, first, the P type diffusion resistance formed on the surface of the N type beam functions as a piezo resistance. In the wiring pattern for this piezo resistance, the portion on the beam is formed of a high concentration N type diffusion layer in the P type diffusion layer formed on the surface of the N type beam.

Secondly, the beam is P-type and the piezoresistance is formed by P-type diffusion resistance, and a high-concentration second N-type diffusion layer to be wiring on the beam is formed on the P-type beam. Formed directly.

As a result, hysteresis does not occur in the output of the bridge circuit composed of piezoresistors due to residual stress as in the case where the portion on the beam is formed of metal wiring. Since the high-concentration N-type diffusion layer has a low sheet resistance, the wiring can be made thin, and even if the width of the beam is narrow as in the cantilever structure, the piezo resistance for full bridge circuit configuration on the beam can be reduced. Arrangement and formation of wiring are facilitated. Also,
Since the high-concentration N-type diffusion layer has a small piezoresistive coefficient in the <110> direction, the piezo effect in this portion can be suppressed by adjusting the forming direction to the <110> direction, and the sensitivity of the piezoresistive bridge can be suppressed. Is prevented from affecting the. Furthermore, by forming the wiring on the beam with the N-type diffusion layer, it is possible to eliminate the erosion of the wiring due to the sneak of the etching solution when the beam is formed.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

1 to 7 are views showing a first embodiment of the present invention. First, the structure of the semiconductor acceleration sensor will be described. In FIGS. 1 and 2, 1 is a P-type semiconductor (10
0) substrate on which the N-type epitaxial layer 2 is formed to form the semiconductor substrate 3. Semiconductor substrate 3
Is subjected to selective anisotropic etching using an electrochemical etching method to remove the portion of the groove portion 4, and a weight portion 5 and a frame portion 6 surrounding the weight portion 5 at approximately the center thereof,
A thin beam portion 7 that connects and supports both sides of the weight portion 5 to the frame portion 6 is formed. The thin beam portion 7 is formed by the portion of the N-type epitaxial layer 2. With such a configuration, the semiconductor acceleration sensor has a so-called double-supported beam structure. Reference numeral 8 denotes a pedestal, which is attached to the bottom surface of the semiconductor substrate 3 in order to reduce transmission of stress due to thermal strain or the like. As the pedestal 8, for example, a silicon substrate having a concave portion 8a formed by anisotropic etching using an alkaline solution is used. Eight piezoresistors r1 to r8 are formed on the surface portion of the N-type epitaxial layer 2 in the portions of both beam portions 7 by the diffusion resistance of P-type high resistance. Since the stress distribution in the beam portion 7 is as shown in FIG. 12,
The resistors are arranged such that the longitudinal direction of the resistors is the <110> direction so that the change in the resistance value of the piezoresistors r1 to r8 is maximized with respect to the stress. Also, eight piezoresistors r1 to r
When the bridge circuit is assembled with 8, its output voltage ΔV = V
As ₁ -V ₂ is maximized, each piezoresistive r1~r8
Are connected as shown by the wiring pattern 11 in FIG. 1, and the bridge circuit shown in FIG. 5 is formed. J9, J1
0, Rd1, and Rd2 are jumper resistances required for the wirings to cross each other. FIG. 3 is an enlarged view of a portion of the piezoresistors r1 and r2 on the beam portion 7, and FIG. 4 is a sectional view taken along the line BB in FIG. A portion of the wiring pattern 11 on the beam portion 7 is a P formed on the surface portion of the N-type epitaxial layer 2.
It is formed by a high-concentration N type diffusion layer 13 in the type diffusion layer 12. The high-concentration N-type diffusion layer 13 is electrically connected to the Al wiring 14 through the contact hole 16 formed in the SiO ₂ film 15 on the weight portion 5 or the frame portion 6 where stress is not applied. The other end of the Al wiring 14 is connected to another piezoresistive or high-concentration N-type diffusion layer, and the piezoresistive full bridge circuit shown in FIG. 5 is formed as a whole. Figure 1,
In FIG. 2, reference numeral 10 is a peripheral circuit for bridge output signal processing and the like. Wiring patterns in the peripheral circuit 10 are omitted for simplification.

Next, an example of a manufacturing process for realizing this embodiment will be described with reference to FIGS. 6 and 7. 6 and 7
Shows a cross section of a portion where the piezoresistors formed on the beam portion are connected to each other by a high-concentration N-type diffusion layer and a peripheral circuit portion.

First, a high-concentration N-type buried layer 17 is formed on the surface of a P-type semiconductor (100) substrate 1, and an N-type epitaxial layer 2 is epitaxially grown thereon to obtain a semiconductor substrate 3. (A)). Next, a SiO ₂ film 15 is formed on the surface of the N-type epitaxial layer 2 and the peripheral circuit 10 is formed.
A high-concentration P-type layer is diffused into the portion to be the element isolation region 1
8 is formed (FIG. 6B). Ion implantation of P-type impurities is performed to simultaneously form the piezoresistor r, the P-type diffusion layer 12, and the P-type base region 19 (FIG. 6C). N-type impurities are diffused to form a high-concentration N-type diffusion layer 13 and an N-type emitter region 20 which will be part of the wiring pattern. Further, a SiO ₂ film 15 is formed on the back surface of the semiconductor substrate 3 (FIG. 6D). A contact hole 16 is formed in the SiO ₂ film 15 on the surface, an Al film is deposited, and then patterned to form A
The l wiring 14 is formed (FIG. 7A). SiO ₂ on the back
The film 15 is patterned to form a mask for electrochemical etching (FIG. 7B). A PSG film 21 is deposited on the surface as a protective film and is patterned (FIG. 7C). In drawing, Fig. 7 (c) (Next Fig. 7 (d)
In the same manner), the PSG film 21 is patterned so that a part of the Al wiring is exposed.
The wiring portion is covered with the PSG film 21 (see the pattern in FIG. 3). Finally, electrochemical etching using a strong alkaline solution, for example, foamed hydrazine from the back surface is performed, and only one part of the P-type semiconductor (100) substrate is selectively etched to form the beam part 7 (FIG. 7D). ). As described above, the wiring with the high-concentration N-type diffusion layer 13 in this embodiment can be formed by a normal bipolar process.

Next, the operation of this embodiment will be described. In the wiring pattern 11 for electrically connecting the piezoresistors r1 to r8, etc., the portion on the beam portion 7 is formed by the high-concentration N-type diffusion layer 13, and therefore when this portion is formed by the metal wiring. As described above, the residual stress does not cause hysteresis in the output voltage of the piezoresistive bridge circuit. Since the high-concentration N-type diffusion layer 13 can have a low sheet resistance, it is possible to form a wiring with a narrow diffusion layer and to form a plurality of piezoelectric elements for forming a full-bridge circuit on the beam portion 7. It is possible to easily arrange the resistors and increase the integration degree of the wiring. Further, since the high-concentration N-type diffusion layer 13 has a small piezoresistance coefficient in the <110> direction, the piezo effect in this portion can be suppressed by adjusting the wiring direction to this direction, and the sensitivity of the piezoresistive bridge can be suppressed. Is prevented from affecting the. Furthermore, especially when there is a wiring near the edge of the beam 7 with the groove 4, the wiring is not corroded even if the etching solution for forming the beam 7 wraps around to the surface of the beam.

Next, FIGS. 8 to 10 show a second embodiment of the present invention. FIG. 9 is an enlarged view of only the portion near the beam portion in FIG. In this embodiment, the weight portion 25 is connected to and supported by the frame portion 26 by the beam portion 27 having a thin cantilever structure, and the surface portion of the beam portion 27 is provided with the piezo resistances r9 to r12 due to the diffusion resistance of P-type high resistance. It is a full bridge. 24 is a groove. The piezoresistor is adjusted such that its resistance value becomes a predetermined value by folding the pattern a required number of times, and two of r10 and r11 in which the stress direction is parallel to the direction of the current and two of r9 and r12 in which the stress direction is perpendicular are two. It is formed individually. This total of four piezoresistors is used to
The full bridge circuit shown in 0 is formed, and the bridge sensitivity is improved by utilizing the fact that the changes in the resistance values with respect to both stresses are opposite. The wiring on the beam portion 27 for electrically connecting the piezoresistors r9 to r12 has a high concentration in the P-type diffusion layer 12 formed on the surface portion of the N-type epitaxial layer 2 as in the first embodiment. Of the N-type diffusion layer 13. Since the high-concentration N-type diffusion layer 13 has a low sheet resistance, it is possible to make the wiring thin, and even when the width of the beam portion 27 is narrow as in a cantilever structure, a full bridge onto the beam portion 27 is achieved. A plurality of piezoresistors r9 for circuit configuration
The arrangement of r12 and the formation of wiring are facilitated. Other functions are similar to those of the first embodiment.

In the above-mentioned first and second embodiments,
The beam portion is formed by an N-type epitaxial layer portion, the piezoresistor is a P-type diffusion resistance, and the high-concentration N-type diffusion layer 13 which is a wiring portion on the beam portion is formed in the P-type diffusion layer 12. However, the beam portion is formed of a P-type epitaxial layer or the like, an N-type diffusion layer is formed on this surface, and a P-type diffusion resistance that becomes a piezo resistance is further formed on this surface. The high-concentration N-type diffusion layer may be formed directly on the P-type beam portion.

[0018]

As described above, according to the present invention, firstly, the weight portion formed in the substantially central portion of the semiconductor substrate, and the frame portion formed so as to surround the weight portion, At least one N-type beam extending from the weight portion so as to connect and support the frame portion and the weight portion, a P-type diffusion resistance formed on the surface portion of the beam, and the beam A P-type diffusion layer formed on the surface of the semiconductor substrate and having a high-concentration N-type diffusion layer formed in the vicinity thereof, and the diffusion resistance and the N-type diffusion layer are connected to each other at a portion other than the beam portion. Since the metal wiring is provided, the portion on the beam of the wiring pattern for the P-type diffusion resistance which becomes the piezoresistance is formed by the high-concentration N-type diffusion layer in the P-type diffusion layer. As in the case where the part is formed by metal wiring, it is composed of piezoresistive due to residual stress. A bridge circuit from occurring hysteresis in the output can be suppressed that. Since the high-concentration N-type diffusion layer has a low sheet resistance, the wiring can be made thin, and even if the width of the beam is narrow as in the case of a cantilever structure, the piezoresistor for full bridge circuit configuration and the placement on the beam can be obtained. Wiring can be easily formed. Also, since the high-concentration N-type diffusion layer has a small piezoresistance coefficient in the <110> direction, the piezoeffect in this portion can be suppressed by adjusting the formation direction to the <110> direction, and thus the piezoresistance can be suppressed. It is possible to prevent the sensitivity of the bridge from being affected. Further, it is possible to eliminate the erosion of the wiring on the beam due to the invasion of the etching solution when forming the beam.

Secondly, a weight portion formed substantially in the center of the semiconductor substrate, a frame portion formed so as to surround the weight portion, and the frame portion and the weight portion are connected and supported so as to be connected and supported. At least one P-shaped beam extending from the weight portion,
A first N-type diffusion layer formed on the surface of the beam and having P-type diffusion resistance on the surface; a high-concentration second N-type diffusion layer formed near the beam; Since the metal wiring formed on the substrate for connecting the diffusion resistance and the N-type diffusion layer at the portion excluding the beam portion is provided, the same effect as described above can be obtained.

[Brief description of drawings]

FIG. 1 is a plan view showing a first embodiment of a semiconductor acceleration sensor according to the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is an enlarged view of a piezoresistive portion in FIG.

4 is a sectional view taken along line BB of FIG.

FIG. 5 is a circuit diagram of a piezoresistive bridge circuit in the first embodiment.

FIG. 6 is a process drawing showing an example of the manufacturing process of the first embodiment.

FIG. 7 is a process drawing showing an example of the manufacturing process of the first embodiment.

FIG. 8 is a plan view showing a second embodiment of the present invention.

9 is an enlarged view of a piezoresistive portion in FIG.

FIG. 10 is a circuit diagram of a piezoresistive bridge circuit according to the second embodiment.

FIG. 11 is a plan view showing a conventional example of a semiconductor acceleration sensor.

12 is a cross-sectional view taken along the line CC of FIG.

FIG. 13 is a circuit diagram of a piezoresistive bridge circuit in the conventional example.

FIG. 14 is an enlarged view of a piezoresistive portion in another conventional example.

FIG. 15 is a characteristic diagram showing the surface concentration dependence of the piezoresistive coefficient.

[Explanation of symbols]

 3 Semiconductor substrate 5,25 Weight part 6,26 Frame part 7,27 Beam part 12 P-type diffusion layer 13 High-concentration N-type diffusion layer 14 Al wiring (metal wiring) r1 to r12 Piezoresistance composed of P-type diffusion resistance

Claims (2)

[Claims] 1. A weight portion formed in a substantially central portion of a semiconductor substrate, a frame portion formed so as to surround the weight portion, and the weight portion so as to connect and support the frame portion and the weight portion. At least one N-type beam extending further, a P-type diffusion resistance formed on the surface of the beam, and a high-concentration N-type diffusion layer formed near the beam on the surface A P-type diffusion layer, the diffusion resistance and the N formed on the semiconductor substrate.
A semiconductor acceleration sensor, comprising: a mold diffusion layer; and a metal wiring connecting the portion except the beam portion. 2. A weight portion formed in a substantially central portion of a semiconductor substrate, a frame portion formed so as to surround the weight portion, and the weight portion so as to connect and support the frame portion and the weight portion. At least one P-type beam extending further, a first N-type diffusion layer formed on the surface of the beam and having P-type diffusion resistance on the surface, and formed near the beam High concentration second
And an N-type diffusion layer, and a metal wiring formed on the semiconductor substrate for connecting the diffusion resistance and the N-type diffusion layer at a portion excluding the beam portion.