JPH0614689B2 - Video display - Google Patents

Description

The present invention relates to a video display device suitable for application to a television receiver that constitutes a large area video signal display device such as a projector.

[Background Art and its Problems] In the image display by the interlace method, when there are 525 scanning lines, one field is composed of 262.5.
By sending this at 60Hz, surface flicker is suppressed. Further, in order to obtain vertical resolution, scanning is performed in a field next to a certain field with a shift of 1/2 scanning line interval.

In this case, even if the number of images is 60 images / sec macroscopically, one scanning line shines every 1/30 sec from a microscopic perspective, and the display cycle is 1/30 sec. is there. Therefore, the light emission of one scanning line is visually perceived as flicker and hinders the improvement of image quality.

It is known to perform non-interlaced display as a means of obtaining a high quality image without this flicker. For example, an interlaced video signal is converted into a non-interlaced video signal with a horizontal frequency doubled, and this video signal is supplied to a picture tube, and the horizontal deflection frequency is doubled in this picture tube to perform non-interlaced display. It is a thing.

As described above, in order to convert the interlaced video signal into the non-interlaced video signal having the double horizontal frequency, various simple methods have been proposed in which an inexpensive large-capacity memory is not used but an inexpensive line memory is used. ing. In this case, the simplest method is to sequentially write each scanning line signal of the interlaced video signal in the line memory and read each scanning line signal twice at a speed twice as fast as the writing. is there. That is, each scanning line signal of the interlace system is written in the line memory as a, b, c ... And from the line memory, a, a,
b, b, c, c, ... Is read twice.

A television receiver which performs non-interlaced display using a non-interlaced video signal having a horizontal frequency doubled by such a method is sufficiently effective in displaying a moving image or character display. However, when displaying a still small image, the above-mentioned flicker of scanning lines is eliminated, but since two scanning lines are formed by the same signal in succession, the resolution in the vertical direction deteriorates and the image quality is reduced. It may deteriorate.

Therefore, in the case of such a still image display, it has been conventionally proposed to return to the original interlaced display.
It is necessary to switch the horizontal deflection frequency according to the video signal, which is expensive and it is technically difficult to obtain a predetermined performance.

[Object of the Invention]

In view of such a point, the present invention has a built-in double speed conversion circuit, performs non-interlaced horizontal deflection at a frequency twice the normal deflection frequency, and displays the same video signal twice each. In the display device, with a simple configuration,
In the case of displaying a still image, it is intended to propose an interlaced display that can avoid image quality deterioration without switching the horizontal deflection frequency.

[Outline of Invention]

According to the present invention, in a video display device in which a double speed conversion circuit is built-in, non-interlaced horizontal deflection is performed at a frequency twice as high as a normal deflection frequency, and the same video signal is displayed twice each. If the deflection device is provided with vertical deflection switching means and the displayed video signal is a still image,
The vertical deflection switching means switches the electron beam to scan the same line twice with the same video signal.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In the figure, (1) is an antenna, (2) is a tuner, (3) is an intermediate frequency amplifier, and (4) is a video detection circuit. An interlaced color video signal S _V is obtained from the detection circuit (4) and is supplied to the luminance / color separation circuit (5).

The luminance signal Y obtained from the separation circuit (5) is a matrix circuit.
Supplied to (6). The color signal C obtained from the separation circuit (5) is supplied to the color demodulation circuit (7), from which the red color difference signal R
-Y and a blue color difference signal BY are obtained and are respectively provided in matrix circuits.
Supplied to (6). The red, green and blue primary color signals R, G and B are obtained from the matrix circuit (6) and supplied to the double speed conversion circuit (8), respectively.

In this conversion circuit (8), the signal 1 of each scanning line is converted from the signal R.
A signal R ₂ whose horizontal frequency has been doubled twice with a period of / 2H is obtained, and this signal R ₂ is supplied to the color picture tube (11) via the a side of the changeover switch (9R) and the drive circuit (10). It is supplied to the cathode _{K R.} Similarly, this conversion circuit
In (8), the signals G ₂ and B ₂ whose horizontal frequencies are doubled from those of the signals G and B are obtained, and the changeover switches (9G) and (9
Cathodes K _G of kinescope via a side and a drive circuit (10) of B) _(11), it is supplied to the K _B.

The video signal S _V obtained from the detection circuit (4) is supplied to the sync separation circuit (12). The horizontal synchronizing signal P _H obtained from the separation circuit (12) is supplied to a horizontal deflection circuit (14) after being doubled by the multiplier (13). And this deflection circuit (14)
Further, the horizontal deflection coil (15) is supplied with a deflection signal S _HO having a frequency twice the normal frequency as shown in FIG. 2B.

The vertical synchronizing signal P _V obtained from the separating circuit (12) is supplied to the vertical deflection circuit (16). And this deflection circuit (1
6) to the vertical deflection signal S _VO as shown by the solid line in FIG. 2A.
Is supplied to the adder (17). Further, doubled signal of the horizontal synchronizing signal P _H from the multiplier (13) is supplied to the auxiliary deflection signal generating circuit (18), from the generation times circuit (18), as shown in FIG. 2 C Every time, the auxiliary deflection signal S _VO having a predetermined level is obtained. This level is a level at which the beam scanning position can be shifted by 1/2 scanning line interval. This auxiliary deflection signal S
_VO is supplied to the adder (17) via the connection switch (19). Then, the addition signal from the adder (17) is supplied to the vertical deflection coil (20).

Further, in FIG. 1, (21) is a motion detection circuit for determining whether or not it is a still image. This detection circuit
The luminance signal Y is supplied from the separation circuit (5) to (21). Then, the determination is made by comparing the luminance signal Y after a certain field and several fields after, for example, at some points on the screen.

The determination signal S _O from the detection circuit (21) is supplied to the control circuit (22), and this control circuit (22) controls the on / off of the connection switch (19). In this case, the connection switch (19) is turned on when it is determined to be a still image. The connection switch (19) is switched on and off, for example, at the beginning of each field.

In this example, the connection switch (19) is turned off when the detection circuit (21) determines that the image is not a still image, so that the vertical deflection coil (20) receives the deflection signal S _VO ( Second
The solid line in FIG. A) is supplied to the picture tube (11) as shown in FIG.
A non-interlaced display color image is obtained as shown in FIG.

On the other hand, when the detection circuit (21) determines that the image is a still image, the connection switch (19) is turned on, so that the vertical deflection coil (20) receives the deflection signal S _VO (solid line in FIG. 2A). A signal S ′ _VO (shown by a broken line in FIG. 2A) to which the auxiliary deflection signal S _VC (shown in FIG. 2C) is added is supplied to the drawing. Therefore, as shown in FIG. 3B, the electron beam scans the same line twice, so that two scanning lines (shown by a solid line and a broken line) by the same signal in the non-interlaced display are formed at the same position. An interlaced color image can be obtained.

In FIG. 1, (23R), (23G) and (23B) are input terminals for external R, G and B signals. For example, a signal from a character decoder, a high-definition television receiver, or, in the case of a still image, a signal formed by a field interpolation method using a field memory is supplied.
These R, G, and B signals are changeover switches (9R) and (9G), respectively.
And is supplied to the drive circuit (10) via the b side of (9B),
A color image based on these signals is displayed on the picture tube (11). In this case, the R, G and B signals supplied to the terminals (23R), (23G) and (23B) are supplied to the discriminating circuit (24) and connected by the discriminating output of the discriminating circuit (24) when the signal is present. The switch (19) is turned off.

As described above, according to this example, in the case of displaying a still image, interlaced display can be performed without switching the horizontal deflection frequency.

Although the connection switch (19) is automatically turned on and off in the above-described embodiment, the viewer may manually control it.

Further, in the above-mentioned embodiment, the auxiliary deflection signal S _VC is added to the deflection signal S _VO , but a vertical sub-deflection coil is newly provided, and the auxiliary deflection signal S _VC is supplied to the same operation. You may allow it.

〔The invention's effect〕

According to the present invention described above, a video display in which a double speed conversion circuit is built in, non-interlaced horizontal deflection is performed at a frequency twice the normal deflection frequency, and the same video signal is displayed twice. In the device, it is possible to obtain a device having a simple configuration, in which, in the case of displaying a still image, interlaced display can be performed without switching the horizontal deflection frequency, and image quality deterioration can be avoided.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are diagrams for explaining the respective configurations. (8) is a double speed conversion circuit, (11) is a color picture tube, (14) is a horizontal deflection circuit, (15) is a horizontal deflection coil, (16) is a vertical deflection circuit, (18) is an auxiliary deflection signal generation circuit, (19) is a connection switch, and (20) is a vertical deflection coil.

Claims (1)

[Claims] 1. A video display device comprising a double speed conversion circuit, wherein non-interlaced horizontal deflection is performed at a frequency twice as high as a normal deflection frequency, and the same video signal is displayed twice. The vertical deflection switching means is provided in the vertical deflection device, and when the displayed video signal is a still image,
An image display device characterized in that the vertical deflection switching means switches the electron beam so as to scan the same line twice with the same image signal.