JPH057204A - Cell traffic generating circuit - Google Patents

Abstract

PURPOSE:To provide the timing to generate a cell for test for evaluating effectively an asynchronous transfer mode (ATM) cell switch to a fast wide band. CONSTITUTION:In a cell traffic generating device to generate the cell traffic of the multi-channel in one line, a traffic generating part is composed of plural channel output timing generating circuits to set the generation interval of each cell respectively arbitrarily as the function of the time, and an identifier giving circuits to give a channel identifier to the cell with the timing outputted from the channel output timing generating circuits, and plural pieces of channel output information outputted from the traffic generating part are synthesized by an identifier multiplexing circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cell traffic generation circuit for testing the transparency characteristic of a cell switch. The cell switch is the main component of ATM, and ATM (Asynchronous Transfer Mode)
Is a broadband ISDN transmission network construction means.

[0002]

2. Description of the Related Art Transmission network constituent means include a circuit switching network and a packet switching network. The transparency test of a circuit-switched network mainly confirms whether a specific channel that appears periodically passes through the network. The test pattern is generated by generating a frame identification signal that appears at equal intervals in order to identify that a specific channel appears in a fixed cycle, and mounting the test signal of the specific channel at a specified position with this as a starting point. . Therefore, the test signal is required to be periodic.

The transparency test of a packet-switched network mainly confirms whether or not randomly generated packets completely pass through the network, and a test pattern is generated by creating a packet according to a corresponding packet communication procedure. .. Packets are often generated in real time by storage programs. When high speed is required, a test signal is stored in the storage device in advance and is read at high speed to generate a pattern.

[0004]

When the circuit switching network is tested by the method using the storage program, the test pattern generation speed cannot be increased. Further, if the packet switching network is tested by a method of reading it out from a storage device at high speed, the pattern length is limited by the capacity of the memory and the pattern creation becomes complicated.

The ATM cell switch was conceived for the purpose of combining the high speed of the conventional circuit switching switch and the flexibility of the packet switch, and the means for evaluating the ATM cell switch is not conventional. It is enough.
An object of the present invention is to provide a timing for generating a test cell for effectively evaluating an ATM cell switch from low speed to high speed in a concentrated and distributed manner, that is, in a high speed wide band.

[0006]

In order to achieve this object, according to the present invention, in a cell traffic generator for generating multi-channel cell traffic in one line,
A plurality of channel output timing generation circuits that arbitrarily set the generation intervals of each cell, an identifier assignment circuit that assigns a channel identifier to cells at the timing output from the channel output timing generation circuit, and an output from the identifier assignment circuit The plurality of channel output information to be generated are combined by the identifier multiplexing circuit.

Next, the configuration of the cell traffic generating circuit according to the present invention will be described with reference to FIG. 1A to 1C of FIG.
Is a channel output timing generating circuit, 2A to 2C are identifier assigning circuits, and 3 is an identifier multiplexing circuit. The traffic generation unit 1 is composed of 1A to 1C and 2A to 2C. FIG. 1 exemplifies a case where each of the channel output timing generation circuit and the identifier assignment circuit is three.

The channel output timing generating circuit 1A outputs the timing of the traffic function f (x ₁ ) and inputs it to the identifier assigning circuit 2A. The identifier assigning circuit 2A assigns an identifier at this timing and outputs channel output information.

The channel output timing generating circuit 1B outputs the timing of the traffic function f (x ₂ ) and inputs it to the identifier assigning circuit 2B. The identifier assigning circuit 2B assigns an identifier at this timing and outputs channel output information.

The channel output timing generating circuit 1C outputs the timing of the traffic function f (x ₃ ) and inputs it to the identifier assigning circuit 2C. The identifier assigning circuit 2C assigns an identifier at this timing and outputs channel output information. The identifier multiplexing circuit 3 synthesizes the channel output information of the identifier assigning circuits 2A to 2C and outputs a test pattern.

[0011]

The channel output timing generation circuits 1A-1C output the timing f (x _i ), respectively. f
(X _i ) is a traffic distribution function, and fixed effects can be expected, but the channel output timing generation circuit 1A
It is more effective to be able to arbitrarily set every 1C. F by the identifier assigning circuits 2A to 2C
A channel identifier is generated at the timing of (x). As a result, n kinds of f (x _i ) are generated from the traffic generator 1.
The channel identifier is output at the timing of.

In the identifier multiplexing circuit 3, the identifier assigning circuit 2A
The channel identifiers received from ~ 2C are multiplexed and converted into test channel identifiers. At this time, if one channel identifier input output is assigned to one channel identifier input, n-channel cell traffic can be obtained. Also, cell traffic can be combined by assigning multiple channel identifier inputs to one channel identifier output. The cell traffic of the combined channel is the sum of the respective generation timings.

With reference to FIG. 1, the traffic characteristics of the signal source of interest are analyzed, generated individually at f (x ₁ ) to f (x _i ), and combined to approximate them. A test pattern generation timing having traffic characteristics can be created.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an identifier conversion state in the case where the traffic generating unit 1 has four channel output timing generating circuits and identifier assigning circuits will be described with reference to FIG. In FIG. 2A, the generation timing of the identifier “1” is output by the distribution function of f (x ₁ ), and in FIG. 2A, the generation timing of the identifier “2” is output by the distribution function of f (x ₂ ). In FIG. 2C, the generation timing of the identifier “3” is output by the distribution function of f (x ₃ ), and in FIG. 2D, the generation timing of the identifier “4” is f.
It is output by the distribution function of (x ₄ ).

In FIG. 2E, the timings from "1" to "4" are input to the identifier multiplexing circuit 3, and the identifier multiplexing circuit 3 assigns the identifiers "1" → "A", "2" → "B", "3"
By converting from “C”, “4” to “D”, the channels “A”, “B”, “C”, and “D” at the output are respectively traffic functions f (x ₁ ), f (x ₂ ). ), F (x ₃ ),
A pattern generation timing having a distribution function of f (x ₄ ) can be obtained.

FIG. 2F shows an example in which the identifier is converted into "1" → "A", "2" / "3" / "4" → "B" by the identifier multiplexing circuit 3, and f (x ₁ ) The channel A having the distribution function of and the channel B having the distribution function of f (x ₂ ) + f (x ₃ ) + f (x ₄ ) are output. In the embodiment, there are four combined timings, but there is no restriction on the number of timings.

A traffic element such as a band-compressed image signal is a periodically generated component f such as a frame signal.
(A), a component f (B) of small traffic that frequently occurs such as vector information of screen change, and component f (C) of small traffic such as information at the time of screen switching but large traffic. Using FIG. 1, these individual components are generated by respective timing generation circuits to generate timings having components f (A), f (B), and f (C), and are synthesized,
Desired traffic characteristics f (P) = f (A) + f (B) + f (C)
It is possible to create an ATM cell characteristic evaluation test pattern having

An example of combined cell traffic according to the present invention is shown in FIG. The generation timing of f (x ₁ ) shown in FIG. 3A is a binomial distribution centered on the time interval 1000. f
The generation timing of (x ₂ ) is a binomial distribution centered on the time interval 2000. The cell traffic obtained by combining the two is f (x ₁ ) + f (x ₂ ) shown in FIG.

[0019]

According to the present invention, the timing for generating the test cells for effectively evaluating the ATM cell switch can be created from low speed to high speed in a concentrated and distributed manner, that is, in a high speed wide band. .

[Brief description of drawings]

FIG. 1 is a configuration diagram of a cell traffic generation circuit according to the present invention.

FIG. 2 is an identifier conversion state diagram according to an embodiment.

FIG. 3 is an example of traffic composition according to an embodiment.

[Explanation of symbols]

 1 Traffic Generation Section 1A to 1C Channel Output Timing Generation Circuit 2A to 2C Identifier Assigning Circuit 3 Identifier Multiplexing Circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Office reference number FI technical display location 8529-5K H04L 11/20 Z (72) Inventor Koji Suzuki 5-7-1 Shiba, Minato-ku, Tokyo No. NEC Electric Company (72) Inventor Hidenori Nakajima 4-19-7 Kamata, Ota-ku, Tokyo Inside Ando Electric Co., Ltd. (72) Takaya Takabe 4-19-7 Kamata, Ota-ku, Tokyo Ando Denki Co., Ltd.

Claims (1)

Claim: What is claimed is: 1. In a cell traffic generation device for generating multi-channel cell traffic in one line, a plurality of channel output timing generations for arbitrarily setting the generation interval of each cell as a function of time. A circuit, and an identifier assigning circuit that assigns a channel identifier to the cell at the timing output from the channel output timing generation circuit,
A cell traffic generating circuit, wherein a plurality of channel output information output from the identifier assigning circuit is combined by an identifier multiplexing circuit.