JPH0571166B2 - - Google Patents
Info
- Publication number
- JPH0571166B2 JPH0571166B2 JP62121829A JP12182987A JPH0571166B2 JP H0571166 B2 JPH0571166 B2 JP H0571166B2 JP 62121829 A JP62121829 A JP 62121829A JP 12182987 A JP12182987 A JP 12182987A JP H0571166 B2 JPH0571166 B2 JP H0571166B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- positioning
- semiconductor
- positioning mark
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置製造に係り、特に感光性樹
脂の焼き付け露光工程に於いて使用される縮小投
影型露光装置を用いた半導体装置の製造方法に関
するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to the manufacture of semiconductor devices, and in particular to a method for manufacturing semiconductor devices using a reduction projection type exposure apparatus used in the baking exposure process of photosensitive resin. It is related to.
従来、半導体装置製造に使用される縮小投影型
露光装置に於ける半導体基板の位置決め方法は、
第２図に示すように半導体装置素子片間１０に配
置されている位置決めマーク６，７，８，９にレ
ーザー光を当て反射光を検出する事により位置決
めマーク部の位置を換算し半導体基板の位置合せ
を行う方式であつた。
Conventionally, the method for positioning a semiconductor substrate in a reduction projection exposure apparatus used for manufacturing semiconductor devices is as follows:
As shown in FIG. 2, the positioning marks 6, 7, 8, and 9 placed between the semiconductor device element pieces 10 are irradiated with a laser beam and the reflected light is detected to calculate the position of the positioning mark portion. It was a method of alignment.
上述した従来の縮小投影型露光装置の位置合せ
マーク検出方法では、半導体装置素子片間に配置
された位置決めマークに対して、数10ミクロン離
れた位置より、レーザー光をスキヤンさせ、位置
決めマークの反射光を受光し、半導体基板の位置
合せを行うが、この場合、半導体装置素子片間の
下地状態が悪く数ケ所の反射光を発生させたり、
あるいは、位置決めマーク近傍にある半導体装置
素子分離枠等のパターンを位置決めマークと誤認
識したりして半導体装置製造のフオトリソグラフ
イ技術に於いて、パターンの重ね合せ精度にばら
つきを生じさせ、作業能率を低下させたりしてい
た。
In the alignment mark detection method of the conventional reduction projection exposure apparatus described above, a laser beam is scanned from a position several tens of microns away from the alignment mark placed between the semiconductor device element pieces, and the reflection of the alignment mark is detected. The light is received and the semiconductor substrate is aligned, but in this case, the underlying condition between the semiconductor device elements may be poor and reflected light may occur in several places.
Alternatively, a pattern such as a semiconductor device element separation frame near the positioning mark may be mistakenly recognized as a positioning mark, causing variations in pattern overlay accuracy in photolithography technology for semiconductor device manufacturing, and reducing work efficiency. It was also causing a decrease in
又、半導体装置素子片内へと位置合せマークを
配置させている半導体装置もあるが、年々進行す
る半導体装置の高集積化に伴ない、半導体装置素
子片１個当りの面積も縮小化され、数工程に及ぶ
工程の位置合せマークすべてを半導体素子片内へ
と配置するのは困難となつて来た。 In addition, some semiconductor devices have alignment marks placed inside the semiconductor device element piece, but as semiconductor devices become more highly integrated year by year, the area of each semiconductor device element piece is also becoming smaller. It has become difficult to arrange all the alignment marks of several steps into a semiconductor chip.
本発明の縮小投影露光装置を用いた半導体装置
の製造方法は、半導体装置素子片内に配置された
基点となる第の位置決めマークと半導体装置素
子片間に配置された第の位置決めマークとの距
離を記憶回路に記憶させ基点となる第の位置決
めマークを検出した後、記憶された第、第の
位置決めマークの距離分だけステージ移動させ、
第の位置決めマークを検出する事により半導体
基板の位置決めを行う事である。
A method for manufacturing a semiconductor device using a reduction projection exposure apparatus according to the present invention includes a method for manufacturing a semiconductor device using a reduction projection exposure apparatus according to the present invention. is stored in the memory circuit and a first positioning mark serving as a reference point is detected, and then the stage is moved by the distance of the stored first and second positioning marks,
The semiconductor substrate is positioned by detecting the first positioning mark.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例を説明する為の半導
体装置上に描かれた位置決めマークの平面図であ
る。 FIG. 1 is a plan view of positioning marks drawn on a semiconductor device for explaining one embodiment of the present invention.
本実施例の半導体装置の製造方法は、特にレー
ザー光を半導体基板上の位置決めマークへと照射
し、前記位置決めマークからの反射光を検出して
半導体基板の位置決めを行う縮小投影露光装置を
用いた半導体装置の製造方法に係り、半導体装置
素子片内Ａに配置された基点となる第の位置決
めマーク１と、半導体素子片間Ｂに配置された第
の位置決めマーク２との距離を予め記憶回路へ
と記憶させ、基点となる第の位置決めマーク１
を検出した後、記憶された第及び第の位置決
めマークの距離分だけ移動させ、第の位置決め
マーク２を検出する事で半導体基板の位置決めを
行う方法である。 The method for manufacturing a semiconductor device of this embodiment uses a reduction projection exposure apparatus that irradiates a laser beam onto a positioning mark on a semiconductor substrate and detects reflected light from the positioning mark to position the semiconductor substrate. In a method of manufacturing a semiconductor device, the distance between a first positioning mark 1, which is a base point, arranged inside a semiconductor device element piece A, and a second positioning mark 2, which is arranged between semiconductor element pieces B, is stored in advance in a storage circuit. The first positioning mark 1 is stored as the reference point.
After detecting , the semiconductor substrate is moved by the distance of the stored first and second positioning marks, and the first positioning mark 2 is detected, thereby positioning the semiconductor substrate.
以上説明した様に本発明は基点となる位置決め
マーク１を半導体素子片内Ａに配置した事によ
り、従来、半導体装置素子片間Ｂに配置された位
置決めマーク６〜９を基点として検出する時（第
２図）に生じる半導体装置素子片間Ｂの下地荒れ
の状態による誤検出又、半導体装置素子片間枠１
０との間隔がせまい為に生じる誤検出を防止する
事ができ、位置決め精度の向上、作業効率の向上
に期待がもてる。又、半導体装置素子片内Ａに配
置する基点となる位置決めマーク１は１ケ所で良
く、この位置決めマーク１を基点とし半導体素子
片間Ｂに配置される第〜第の位置決めマーク
２〜５を検出させ、半導体基板の位置決めを行え
ば良い訳であり、今後の高密度化高縮小化の支障
とはならない。
As explained above, in the present invention, by arranging the positioning mark 1 as a reference point within the semiconductor element piece A, when conventionally detecting the positioning marks 6 to 9 placed between the semiconductor device element pieces B as the reference point ( In addition, erroneous detection due to the rough state of the base B between the semiconductor device element pieces that occurs in Figure 2), and the frame 1 between the semiconductor device element pieces
It is possible to prevent erroneous detections caused by the narrow distance from zero, and is expected to improve positioning accuracy and work efficiency. Further, it is sufficient to have only one positioning mark 1 as a reference point placed within the semiconductor device element piece A, and using this positioning mark 1 as a reference point, the th to th positioning marks 2 to 5 placed between the semiconductor element pieces B are detected. It is only necessary to position the semiconductor substrate by positioning the semiconductor substrate, and this will not be a hindrance to future high-density and high-reduction efforts.
第１図は本発明の半導体装置上に描かれた位置
決めマークの平面図であり、第２図は従来技術を
説明する為の平面図である。
尚図に於いて、１……基点となる位置決めマー
ク、２〜５……第〜第の位置決めマーク、６
〜９……従来技術の基点となる位置決めマーク、
１０……半導体装置素子片枠、Ａ……半導体装置
素子片内、Ｂ……半導体装置素子片間、である。
FIG. 1 is a plan view of a positioning mark drawn on a semiconductor device of the present invention, and FIG. 2 is a plan view for explaining the prior art. In the figure, 1... positioning mark serving as a base point, 2 to 5... th to th positioning marks, 6
~9...Positioning mark that is the base point of conventional technology,
10...Semiconductor device element piece frame, A...Inside the semiconductor device element piece, B...Between the semiconductor device element pieces.
Claims (1)
と照射し、前記位置決めマークからの反射光へ検
出して、半導体基板の位置決めを行う縮小投影露
光装置を用いた半導体装置の製造方法において、
レーザー光を照射し半導体基板の位置決めを行う
マークが半導体素子片内に配置され、該位置決め
マークを基点として検出した後に半導体装置素子
片間に配置された位置決めマークを検出させ、半
導体基板の位置決めを行う事を特徴とする半導体
装置の製造方法。 In a method for manufacturing a semiconductor device using a reduction projection exposure apparatus, the semiconductor substrate is positioned by irradiating a laser beam onto a positioning mark on a semiconductor substrate and detecting reflected light from the positioning mark,
A mark for positioning the semiconductor substrate by irradiating laser light is placed within the semiconductor element piece, and after detecting the positioning mark using the positioning mark as a reference point, positioning marks placed between the semiconductor device element pieces are detected to position the semiconductor substrate. 1. A method of manufacturing a semiconductor device characterized by performing the following steps.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62121829A JPS63285947A (en) | 1987-05-18 | 1987-05-18 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62121829A JPS63285947A (en) | 1987-05-18 | 1987-05-18 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63285947A JPS63285947A (en) | 1988-11-22 |
| JPH0571166B2 true JPH0571166B2 (en) | 1993-10-06 |
Family
ID=14820959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62121829A Granted JPS63285947A (en) | 1987-05-18 | 1987-05-18 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63285947A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6005294A (en) * | 1996-05-29 | 1999-12-21 | Mitsubishi Denki Kabushiki Kaisha | Method of arranging alignment marks |
| JP3634505B2 (en) * | 1996-05-29 | 2005-03-30 | 株式会社ルネサステクノロジ | Alignment mark placement method |
-
1987
- 1987-05-18 JP JP62121829A patent/JPS63285947A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63285947A (en) | 1988-11-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |