JPH05326956A - Bottom gate type thin-film transistor, semiconductor device and their production - Google Patents

Abstract

(57) [Summary] [Problem] To provide a bottom-gate thin film transistor, a semiconductor device, and a method for manufacturing the same, which can obtain a gate insulating film having good film thickness controllability and good surface flatness without problems such as breakdown voltage performance. To do. [Structure] A Si-based material film 61 of poly-Si, a-Si or the like is formed on a gate 1 through a blocking material portion 5 of SiN or the like,
A bottom gate type TFT in which the gate insulating film 2 is formed by oxidizing the Si-based material film 61. Under the TFT, MIS
A semiconductor device having a transistor. Manufacture of a bottom gate type TFT in which a silicon nitride film 5 or an oxygen-containing silicon nitride film is formed on the gate 1 and then a polysilicon film 61 is formed and the polysilicon film is oxidized to form a gate insulating film 2. Method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bottom gate type thin film transistor, that is, a thin film transistor having a channel region formed on a gate, a semiconductor device having the bottom gate type thin film transistor, and a method of manufacturing the bottom gate type thin film transistor.

[0002]

2. Description of the Related Art Conventionally, a thin film transistor having a channel region and an active region formed on a gate has conventionally been formed with a gate insulating film such as silicon oxide on the gate, and an active layer made of polysilicon or the like on the gate insulating film. It has a structure in which a region is formed. The bottom-gate type thin film transistor is embodied and utilized in a semiconductor device in which a MIS type transistor such as a MOS transistor is formed under the bottom gate type thin film transistor so that contacts of both transistors can be easily made. For example, SRAM, TFT, etc.
(Hereinafter referred to as a thin film transistor, the same applies below)
It is used in an element structure in which a transistor is formed. With this structure, the heat treatment is less likely to affect the lower transistor MOS or the like, and changes in the diffusion region of the MOS or the like can be prevented.

Conventionally, in the bottom gate type TFT,
The gate insulating film is formed by CVD of SiO ₂ ,
Alternatively, the gate is formed by polysilicon and the surface of the gate polysilicon is oxidized.

[0004]

Problems to be Solved by the Invention These conventional techniques have the following problems. In the technique of forming the gate insulating film by oxidizing the gate polysilicon, first, referring to FIG.
As shown in (a), a gate 1 is formed of polysilicon on the underlayer 10, and then this gate polysilicon is thermally oxidized to form a SiO ₂ gate insulating film. For example, generally, first, polysilicon for forming the gate 1 is formed to a thickness of about 50 nm by the LPCVD method, and P or B is set to 1 × 10 ¹⁵ / cm ^3.
Implant and activate by ion implantation. After the gate pattern is formed, it is oxidized by wet oxidation at 850 ° C. for 20 nm to form a gate insulating film 2a (oxide film). However, in this case, the heating for the thermal oxidation causes the surface of the gate polysilicon 1 to have irregularities as schematically shown in FIG. 4B, which increases the surface roughness and deteriorates the flatness. The gate insulating film 2a also has a shape with unevenness and poor flatness. Further, it is difficult to control the film thickness. The finished TFT having the diffusion regions of the source 31 and the drain 32 and the channel region 4 also has unevenness on the surface as shown in FIG. 4C.
It is considered that such surface roughness occurs because the crystal grain of polysilicon is large, and thus such surface deformation occurs due to heat treatment. Generally, heating for thermal oxidation is conventionally about 800 to 850 ° C., and at this temperature, the unevenness described above is inevitably produced. If the temperature is lower than this, the unevenness is reduced, but the unevenness is still unavoidable, and if the temperature is low, the process of obtaining the insulating film takes time, which is not practical.

On the other hand, in the conventional technique for forming a gate insulating film by CVD, for example, SiO is formed by low temperature CVD.
_{When 2} etc. are formed, since this has poor pressure resistance, annealing (heat treatment) etc. is required thereafter, and the same problem as thermal oxidation eventually arises (for example, in SRAM etc., there is a problem such as a large step difference in structure). Therefore, pressure resistance is important).

Due to the above-mentioned drawbacks, there arises a problem that the S value of the transistor is lowered and the ON / OFF ratio is deteriorated.

[0007]

It is an object of the present invention to solve the above-mentioned problems of the prior art, and to obtain a gate insulating film which has no problem of withstand voltage performance, good film thickness controllability, and good surface flatness. An object is to provide a thin film transistor, a semiconductor device, and a method for manufacturing the same.

[0008]

According to the invention of claim 1 of the present application, a Si-based material film is formed on a gate via a blocking material portion, and the Si-based material film is oxidized to form a gate insulating film. A formed bottom gate type thin film transistor, which achieves the above object.

The invention of claim 2 of the present application is a bottom gate type thin film transistor comprising a gate insulating film formed on a gate and a channel region formed on the gate insulating film, wherein the gate and the gate insulating film are formed. A bottom gate type thin film transistor characterized in that a blocking material portion is provided between the film and the film, thereby achieving the above object.

According to a third aspect of the present invention, there is provided a bottom gate type thin film transistor comprising a gate insulating film formed on a gate and a channel region formed on the gate insulating film. A blocking material portion is provided between the film and the gate insulating film, and the gate insulating film is formed by oxidizing or nitriding a Si-based material film formed on the blocking material portion. A bottom gate type thin film transistor having the above-mentioned structure, which achieves the above object.

According to a fourth aspect of the present invention, a bottom gate type thin film transistor having a gate insulating film formed on a gate and a channel region formed on the gate insulating film, and a bottom gate type thin film transistor formed below the thin film transistor are formed. A semiconductor device comprising a MIS transistor, characterized in that a blocking material portion is provided between the gate and the gate insulating film, thereby achieving the above object. It is a thing.

According to a fifth aspect of the present invention, a gate insulating film is formed by forming a polysilicon film after forming a silicon nitride film or an oxygen-containing silicon nitride film on the gate. A method of manufacturing a bottom gate type thin film transistor, which comprises:

According to a sixth aspect of the present application, a gate insulating film is formed by forming a silicon nitride film or an oxygen-containing silicon nitride film on a gate, forming an amorphous silicon film, and oxidizing the amorphous silicon film. A method of manufacturing a bottom gate type thin film transistor, which comprises:

According to a seventh aspect of the present invention, a gate is formed of polysilicon, the gate surface is nitrided, an amorphous silicon film is formed, and the amorphous silicon film is oxidized to form a gate insulating film. A method of manufacturing a bottom gate type thin film transistor, characterized in that the above object is achieved.

According to an eighth aspect of the present invention, a gate is formed of polysilicon, the surface of the gate is nitrided, a polysilicon film is formed, and the polysilicon film is oxidized to form a gate insulating film. A method of manufacturing a bottom gate type thin film transistor, characterized in that the above object is achieved.

[0016]

According to the invention of the present application, since the gate insulating film is formed via the blocking material portion such as SiN, the influence of the gate material on the gate insulating film is suppressed, and the surface becomes uneven. It is also possible to obtain a gate insulating film having good pressure resistance and good film thickness control. Therefore, by this, a bottom gate type thin film transistor, a semiconductor device, and a method for manufacturing the same, which solve the conventional problems, can be obtained.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. However, as a matter of course, the present invention is not limited to the examples described below.

Embodiment 1 This embodiment embodies the invention of claims 1, 2, 3, 4, and 5 of the present application, and particularly, a bottom gate type TF.
T and S having a MOS transistor under the T
This is applied to the RAM.

In the bottom gate type thin film transistor of this embodiment, as shown in a cross section in FIG. 1C, a Si type material film 61 is formed on the gate 1 through the blocking material 5 (FIG. 1B).
), A bottom gate type thin film transistor in which the gate insulating film 2 is formed by oxidizing the Si-based material film 61.

Further, the bottom gate type thin film transistor of this embodiment has a gate 1 as shown in a cross section in FIG.
A bottom gate type thin film transistor comprising a gate insulating film 2 formed on the gate insulating film 2, and active regions 31 and 32 and a channel region 4 formed on the gate insulating film 2.
A bottom gate type thin film transistor in which a blocking material portion 5 is provided between the gate insulating film 2 and the gate insulating film 2.

Further, in the bottom gate type thin film transistor of this embodiment, the gate insulating film 2 is formed on the gate 1.
A bottom gate type thin film transistor having active regions 31, 32 and a channel region 4 formed on the gate insulating film 2, wherein a blocking material portion 5 is provided between the gate 1 and the gate insulating film 2. And the gate insulating film 2
Is a Si-based material film 61 (FIG. 1) formed on the blocking material portion 5.
A bottom gate type thin film transistor, wherein the bottom gate type thin film transistor is formed by being oxidized.

The SRAM of this embodiment is shown in FIG.
As shown in FIG. 3, a bottom gate type thin film transistor in which a gate insulating film 2 is formed on a gate 1 and active regions 31, 32 and a channel region 4 are formed on the gate insulating film 2, A semiconductor device comprising a MIS transistor formed under the thin film transistor, wherein a blocking material portion 5 is provided between the gate 1 and the gate insulating film 2. It is a device.

In the method of manufacturing the bottom gate type thin film transistor according to this embodiment, the polysilicon film 61 is formed after the silicon nitride film (or the oxygen-containing silicon nitride film may be used) is formed on the gate (see FIG. 1 (b)), the polysilicon film 61 is oxidized to form a gate insulating film (FIG. 1 (c)).

The SRAM of this embodiment is a bottom gate type T
Although there is a MIS transistor, especially a MOS transistor, under the FT, since the method of manufacturing the bottom gate type TFT of the present invention is used, it does not necessarily require high temperature treatment.
Therefore, the diffusion change of the lower MOS transistor can be prevented, which is advantageous.

More specifically, in this embodiment, as shown in FIG. 1A, a gate 1 is first formed of poly-Si on the underlayer 10 in the same manner as in the prior art, and then the blocking material portion 5 is used in this embodiment. As SiN is formed by LPCVD method with a thickness of about 5 to 10 nm. Subsequently, poly-Si is used as the Si-based material film 61.
With a thickness of 15 nm. This is performed at about 610 ° C. by the LPCVD method. As a result, the structure shown in FIG. 1B is obtained. Then 8
The gate oxide film 2 is formed by performing a wet oxidation at 50 ° C. for 15 nm.

In this embodiment, after forming SiN which functions as the blocking material portion 5 on the gate polysilicon, poly S is formed.
Since i is oxidized, the gate polysilicon is not oxidized,
Further, the surface roughness of the gate insulating film 2 (oxide film) on the gate 1 can be improved. The film thickness controllability is also improved.

According to this embodiment, when the gate insulating film 2 is formed on the gate 1 as described above, the gate poly S
Since SiN is thinly formed on i and then poly-Si is deposited and oxidized, the film thickness controllability can be improved and the surface flatness can be improved.

Although silicon nitride (typically Si ₃ N ₄ ) was used in this embodiment, oxygen-containing silicon nitride (SiNO, its atomic composition is arbitrary, provided that O is not too much. Better) may be used.

Embodiment 2 This embodiment embodies the inventions of claims 1, 2, 3, 4, and 6 of the present application. Similar to Example 1, miniaturization
It was applied to an integrated SRAM.

In this embodiment, FIGS. 2A to 2C are used.
2A, a silicon nitride film (or an oxygen-containing silicon nitride film similar to that in the first embodiment) may be formed on the gate 1 as the blocking material portion 5 as shown in FIG. An amorphous silicon film is formed as the film 62, the amorphous silicon film is oxidized to form the gate insulating film 2, and the structure shown in FIG. 2C is obtained.

More specifically, in this embodiment, first, as shown in FIG. 2A, the gate 1 is formed in the same manner as the conventional one. Further, SiN is formed as the blocking material portion 5, and thereafter, a-Si of 15 nm is formed as the silicon-based material film 62 (FIG. 2B). This is performed by the 550 ° C. CVD method. Then, a-Si is crystallized. That is, annealing is performed at 600 ° C. for 10 hours for crystallization. Continuing,
It is oxidized by wet oxidation at 850 ° C. for 15 nm to obtain the structure of FIG. 2C as the gate insulating film 2 (oxide film) (the channel region and the like are omitted).

In this example, it is considered that a-Si is crystallized into poly-Si by annealing at a relatively low temperature.
The size is about 100 nm, and the normal poly-Si is about 10 n
On the other hand, the oxide film having a good surface flatness can be obtained on SiN which is the blocking material portion 5 as compared with m.

In this embodiment, Si is formed on the gate polysilicon.
Since the crystallized poly-Si of a-Si is oxidized after forming N, the surface flatness is improved as compared with the case where poly-Si is simply added and oxidized, and the same effect as in Example 1 is obtained.

Embodiment 3 This embodiment embodies the invention of claims 1, 2, 3, 4, 7 (or 8) of the present application. Similar to the first embodiment, it is applied to a miniaturized and integrated SRAM.

In this embodiment, FIGS. 3A to 3C are used.
As shown in FIG. 3A, a gate 1 is formed of polysilicon, and then the gate surface is nitrided to form a blocking material portion 5 as shown in FIG. 3B. An amorphous silicon film is formed, the amorphous silicon film is formed, and the amorphous silicon film is crystallized to form a poly-Si film that is the Si-based material film 63 (FIG. 3B). This is oxidized to form the gate insulating film 2. To obtain the structure of FIG. 3 (c).

It is also possible to directly form a poly-Si film without interposing a-Si and oxidize it.

More specifically, in this embodiment, first, the gate 1 is formed in the same manner as in the prior art to form the structure of FIG. After that, the surface is nitrided at 1050 ° C. for about 30 seconds by using RTN (Rapid Thermal Nitrization). The RTN can be achieved by heat treatment in a nitriding atmosphere, and the nitriding atmosphere can be performed, for example, in an NH ₃ gas atmosphere, an N ₂ O gas atmosphere, or an N ₂ or N ₂ + H ₂ gas atmosphere. Then, a-Si is formed by the CVD method at a deposition temperature of 20 nm and 550 ° C. Anneal in nitrogen at 600 ℃ for 10 hours for crystallization. As a result, a-Si becomes poly-Si. Then, the gate insulating film 2 (oxide film) is oxidized by wet oxidation at 850 ° C. for 15 nm to obtain the structure of FIG.

In this embodiment, since the surface of the gate polysilicon is nitrided, the gate polysilicon is not oxidized by the subsequent polysilicon oxidation, and the control of the thickness of the gate insulating film and the surface flatness can be improved. The same effect as that of the first embodiment can be obtained.

[0039]

According to the invention of the present application, a bottom gate type thin film transistor, a semiconductor device, which can obtain a gate insulating film having good film thickness controllability and good surface flatness without problems such as deterioration of breakdown voltage performance, And a method for manufacturing the same.

[Brief description of drawings]

1A to 1C are sectional views showing steps of Example 1 in order.

2A to 2C are sectional views showing steps of Example 2 in order.

3A to 3C are sectional views showing steps of Example 3 in order.

FIG. 4 shows the prior art.

[Explanation of symbols]

 1 gate 2 gate insulating film 31, 32 diffusion region (source / drain region) 4 channel region 5 blocking material part (SiN, SiNO) 61 silicon material part (poly Si) 62 silicon material part (a-Si crystallized poly) Si) 63 Silicon material (a-Si crystallized poly Si)

Claims (8)

[Claims] 1. A bottom gate type thin film transistor in which a Si-based material film is formed on a gate via a blocking material portion, and the Si-based material film is oxidized to form a gate insulating film. 2. A bottom gate type thin film transistor comprising a gate insulating film formed on a gate and a channel region formed on the gate insulating film, wherein a cutoff is provided between the gate and the gate insulating film. A bottom gate type thin film transistor having a material portion. 3. A bottom gate type thin film transistor comprising a gate insulating film formed on a gate and a channel region formed on the gate insulating film, wherein a gate is cut off between the gate and the gate insulating film. A bottom gate type thin film transistor, wherein a material portion is provided, and the gate insulating film is formed by oxidizing or nitriding a Si-based material film formed on the blocking material portion. 4. A semiconductor device comprising a bottom gate thin film transistor having a gate insulating film formed on a gate and a channel region formed on the gate insulating film, and a MIS transistor formed below the thin film transistor. A semiconductor device, wherein a blocking material portion is provided between the gate and the gate insulating film. 5. A gate insulating film is formed by forming a silicon nitride film or an oxygen-containing silicon nitride film on a gate, forming a polysilicon film, and oxidizing the polysilicon film. Method of manufacturing bottom gate type thin film transistor. 6. A gate insulating film is formed by forming a silicon nitride film or an oxygen-containing silicon nitride film on a gate, forming an amorphous silicon film, and oxidizing the amorphous silicon film. Method of manufacturing bottom gate type thin film transistor. 7. A bottom gate type wherein a gate is formed of polysilicon, the surface of the gate is nitrided, an amorphous silicon film is formed, and the amorphous silicon film is oxidized to form a gate insulating film. Method of manufacturing thin film transistor. 8. A bottom gate type wherein a gate is formed of polysilicon, the gate surface is nitrided, a polysilicon film is formed, and the polysilicon film is oxidized to form a gate insulating film. Method of manufacturing thin film transistor.