JPH05291551A - Solid-state image sensing device - Google Patents
Solid-state image sensing deviceInfo
- Publication number
- JPH05291551A JPH05291551A JP4094102A JP9410292A JPH05291551A JP H05291551 A JPH05291551 A JP H05291551A JP 4094102 A JP4094102 A JP 4094102A JP 9410292 A JP9410292 A JP 9410292A JP H05291551 A JPH05291551 A JP H05291551A
- Authority
- JP
- Japan
- Prior art keywords
- photoelectric conversion
- type
- charge transfer
- type layer
- solid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 238000003384 imaging method Methods 0.000 claims description 8
- 239000012535 impurity Substances 0.000 description 11
- 230000000593 degrading effect Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000035945 sensitivity Effects 0.000 description 4
- 238000000926 separation method Methods 0.000 description 3
- 238000002955 isolation Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、固体撮像装置に関し、
より詳しくは、インターライン転送CCD(電荷転送素
子)型の固体撮像装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device,
More specifically, the present invention relates to an interline transfer CCD (charge transfer device) type solid-state imaging device.
【0002】[0002]
【従来の技術】一般に、この種のインターライン転送C
CD型の固体撮像装置は、図2に示すように、N型半導
体基板21上に低不純物濃度のP-型ウェル22が形成
され、このP-型ウェル22上に、低不純物濃度の光電
交換用N-型層23からなる光電交換部201が、横方
向に、等間隔に複数設けられている。2. Description of the Related Art Generally, this kind of interline transfer C
As shown in FIG. 2, the CD-type solid-state imaging device has a low impurity concentration P − type well 22 formed on an N type semiconductor substrate 21, and a low impurity concentration photoelectric conversion on the P − type well 22. A plurality of photoelectric conversion units 201 including the N − type layer 23 are provided at equal intervals in the lateral direction.
【0003】さらに、P+型層からなる画素分離領域2
5を挟んで上記各光電変換部201に隣接する電荷転送
部200が設けられている。各電荷転送部200は、N
-型の転送チャンネル27とゲート絶縁膜28とゲート
電極29とで構成されている。Further, a pixel separation region 2 composed of a P + type layer
A charge transfer unit 200 is provided adjacent to each of the photoelectric conversion units 201 with 5 interposed therebetween. Each charge transfer unit 200 has N
- it is composed of a transfer channel 27 and the gate insulating film 28 and the gate electrode 29 of the mold.
【0004】また、24および26はP型不純物層であ
り、26は省略可能である。上記画素分離領域25,2
5が挟む各1組の光電変換部201と電荷転送部200
とがそれぞれ1つの列を構成している。Further, 24 and 26 are P-type impurity layers, and 26 can be omitted. The pixel separation areas 25 and 2
One pair of photoelectric conversion unit 201 and charge transfer unit 200 sandwiched by 5
And each form one column.
【0005】上記各列の光電変換部201が入射光を信
号電荷に変換し、この信号電荷を上記列の電荷転送部2
00が転送する。The photoelectric conversion units 201 in each of the columns convert incident light into signal charges, and the signal charges are transferred to the charge transfer units 2 in the columns.
00 transfers.
【0006】[0006]
【発明が解決しようとする課題】ところで、近年の固体
撮像装置は、使用レンズのサイズが1/2インチから1
/3インチ、さらには1/4インチへと小型化される傾
向にあり、これに伴って上記半導体基板21のサイズ
(チップサイズ)を縮小することが望まれている。しか
し、上記転送部200,光電変換部201のサイズを縮
小することは、最大信号電荷量、感度などが低下して、
性能劣化を招くため好ましくない。このため、性能を落
とさずにチップサイズを縮小するためには、図2に示し
たゲート電極29の下方の無効領域A,Bを有効に利用
することが必要となる。By the way, in the recent solid-state image pickup devices, the size of the lens used is from 1/2 inch to 1 inch.
The size of the semiconductor substrate 21 tends to be reduced to ⅓ inch, and further to ¼ inch.
It is desired to reduce (chip size). However, reducing the sizes of the transfer unit 200 and the photoelectric conversion unit 201 reduces the maximum signal charge amount, sensitivity, etc.
It is not preferable because it causes performance deterioration. Therefore, in order to reduce the chip size without degrading the performance, it is necessary to effectively use the ineffective regions A and B below the gate electrode 29 shown in FIG.
【0007】そこで、本発明の目的は、ゲート電極下方
の無効領域を有効に利用することによって、性能を低下
させることなくチップサイズを縮小できる固体撮像装置
を提供することにある。Therefore, an object of the present invention is to provide a solid-state image pickup device capable of reducing the chip size without lowering the performance by effectively utilizing the ineffective region below the gate electrode.
【0008】[0008]
【課題を解決するための手段】上記目的を達成するた
め、本発明は、N型基板上に形成されたP型ウェル上に
形成された光電変換用N型層を含む光電変換部と、上記
光電変換部と並んで形成され、上記P型ウェル上に形成
された電荷転送用N型層と、上記電荷転送用N型層上に
ゲート絶縁膜を介して形成されたゲート電極とを含む電
荷転送部とを有する固体撮像装置において、上記光電変
換用N型層は、上記ゲート電極の下方を上記電荷転送用
N型層に向かって延びる延長部を含むことを特徴として
いる。In order to achieve the above object, the present invention provides a photoelectric conversion section including an N-type layer for photoelectric conversion formed on a P-type well formed on an N-type substrate, and A charge including an N-type layer for charge transfer formed on the P-type well formed in parallel with the photoelectric conversion unit, and a gate electrode formed on the N-type layer for charge transfer via a gate insulating film. In the solid-state imaging device having a transfer part, the photoelectric conversion N-type layer includes an extension part extending below the gate electrode toward the charge transfer N-type layer.
【0009】[0009]
【作用】上記構成によれば、ゲート電極下方の、従来無
効領域であった領域を、上記光電変換用N型層の延長部
として有効に利用でき、フォトダイオード容量の向上,
斜め入射光によるスミアー成分発生の防止,感度の向上
が図れ、性能を劣化させることなくチップサイズを縮小
できるようになる。According to the above structure, the region, which is a conventional ineffective region, below the gate electrode can be effectively used as an extension of the photoelectric conversion N-type layer, and the photodiode capacitance is improved.
It is possible to prevent the generation of smear components due to obliquely incident light, improve sensitivity, and reduce the chip size without degrading performance.
【0010】[0010]
【実施例】以下、本発明を図示の実施例により詳細に説
明する。The present invention will be described in detail below with reference to the embodiments shown in the drawings.
【0011】図1に本発明の固体撮像装置の実施例を示
す。FIG. 1 shows an embodiment of the solid-state image pickup device of the present invention.
【0012】図1に示す実施例の製造工程を説明する。
まずN型半導体基板11の上面11aを含む上層に低不
純物濃度のP-型ウェル12を形成する。次に、このP-
型ウェル12内に光電変換部101を形成するためのN
-型不純物層13を上記P-型ウェル12の上層の全面
(有効画素領域全面)に形成する。その後、P+型不純物
を注入することによって、P+型不純物層14を形成す
ることによって、光電変換部101をなす光電変換用N
型層13を等間隔に分離する。さらに、P+型層からな
るチャンネルストップ部である画素分離領域15,N-型
層からなる転送チャンネル17,光電変換部101で発
生した電荷を電荷転送部100に転送するトランスファ
ーゲート部をなすP-型層20,ゲート絶縁膜18,ゲート
電極19を形成する。The manufacturing process of the embodiment shown in FIG. 1 will be described.
First, a P − type well 12 having a low impurity concentration is formed in an upper layer including the upper surface 11 a of the N type semiconductor substrate 11. Then, the P -
N for forming the photoelectric conversion portion 101 in the mold well 12
- type impurity layer 13 above P - the upper layer of the type well 12 the whole surface
It is formed on the entire effective pixel area. After that, a P + -type impurity is implanted to form a P + -type impurity layer 14 to form a photoelectric conversion N forming the photoelectric conversion unit 101.
The mold layer 13 is separated at equal intervals. Further, a pixel isolation region 15 which is a channel stop portion formed of a P + type layer, a transfer channel 17 formed of an N − type layer, and a transfer gate portion which transfers charges generated in the photoelectric conversion portion 101 to the charge transfer portion 100 are formed. The -type layer 20, the gate insulating film 18, and the gate electrode 19 are formed.
【0013】上記固体撮像装置は、上記N-型不純物層
13が光電変換部101を構成し、上記ゲート電極19
とゲート絶縁膜18と転送チャンネル17とが電荷転送
部100を構成している。また、上記N-型不純物層1
3は上記ゲート電極19の下方を上記転送チャンネル1
7に向かって延びる延長部13aを含んでいる。In the solid-state image pickup device, the N -- type impurity layer 13 constitutes the photoelectric conversion portion 101, and the gate electrode 19 is formed.
The gate insulating film 18 and the transfer channel 17 constitute the charge transfer section 100. In addition, the N − type impurity layer 1
3 is the transfer channel 1 below the gate electrode 19.
7 includes an extension 13a extending toward 7.
【0014】上記画素分離領域15,15が挟む各1組
の光電変換部101と電荷転送部100とがそれぞれ1
つの列を構成している。Each pair of the photoelectric conversion section 101 and the charge transfer section 100 sandwiched by the pixel separation regions 15 and 15 is one.
It consists of two columns.
【0015】上記各列の光電変換部101が入射光を信
号電荷に変換し、この信号電荷を上記列の電荷転送部1
00が転送する。The photoelectric conversion units 101 in each column convert incident light into signal charges, and the signal charges are transferred to the charge transfer units 1 in the columns.
00 transfers.
【0016】上記構成によれば、ゲート電極19下方
の、従来無効領域であった領域を、上記光電変換用N型
層13の延長部13aとして有効に利用でき、フォトダ
イオード容量の向上,斜め入射光によるスミアー成分発
生の防止,感度の向上が図れ、性能を劣化させることな
くチップサイズを縮小できるようになる。According to the above-mentioned structure, the region below the gate electrode 19 which is a conventional ineffective region can be effectively used as the extension 13a of the photoelectric conversion N-type layer 13 to improve the photodiode capacitance and oblique incidence. The generation of smear components due to light can be prevented, the sensitivity can be improved, and the chip size can be reduced without degrading performance.
【0017】[0017]
【発明の効果】以上の説明より明らかなように、本発明
の固体撮像装置は、光電変換用N型層が、ゲート電極の
下方を電荷転送用N型層に向かって延びる延長部を含む
ので、ゲート電極下方の、従来無効領域であった領域
を、上記光電変換用N型層の延長部として有効に利用で
き、フォトダイオード容量の向上,斜め入射光によるス
ミアー成分発生の防止,感度の向上が図れ、性能を劣化
させることなくチップサイズを縮小できるようになる。As is apparent from the above description, in the solid-state imaging device of the present invention, the photoelectric conversion N-type layer includes the extension portion extending below the gate electrode toward the charge-transfer N-type layer. The area under the gate electrode, which was the ineffective area in the past, can be effectively used as an extension of the N-type layer for photoelectric conversion, and the photodiode capacity is improved, the smear component is prevented from being generated by obliquely incident light, and the sensitivity is improved. The chip size can be reduced without degrading the performance.
【図1】 本発明の固体撮像装置の実施例の断面図であ
る。FIG. 1 is a sectional view of an embodiment of a solid-state imaging device of the present invention.
【図2】 従来の固体撮像装置の断面図である。FIG. 2 is a sectional view of a conventional solid-state imaging device.
11 N型半導体基板 12 P-型ウェル 13 N-型不純物層 14 P+型不純物層 15 画素分離領域 17 転送チャンネル 18 ゲート絶縁膜 19 ゲート電極 20 P-型層 100 電荷転送部 101 光電変換部11 N-type semiconductor substrate 12 P − type well 13 N − type impurity layer 14 P + type impurity layer 15 Pixel isolation region 17 Transfer channel 18 Gate insulating film 19 Gate electrode 20 P − type layer 100 Charge transfer part 101 Photoelectric conversion part
Claims (1)
形成された光電変換用N型層を含む光電変換部と、上記
光電変換部と並んで形成され、上記P型ウェル上に形成
された電荷転送用N型層と、上記電荷転送用N型層上に
ゲート絶縁膜を介して形成されたゲート電極とを含む電
荷転送部とを有する固体撮像装置において、 上記光電変換用N型層は、上記ゲート電極の下方を上記
電荷転送用N型層に向かって延びる延長部を含むことを
特徴とする固体撮像装置。1. A photoelectric conversion part including an N-type layer for photoelectric conversion formed on a P-type well formed on an N-type substrate; and a photoelectric conversion part formed in parallel with the photoelectric conversion part. A solid-state imaging device comprising a formed charge transfer N-type layer and a charge transfer unit including a gate electrode formed on the charge transfer N-type layer via a gate insulating film. The solid-state imaging device, wherein the mold layer includes an extension that extends below the gate electrode toward the charge transfer N-type layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4094102A JPH05291551A (en) | 1992-04-14 | 1992-04-14 | Solid-state image sensing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4094102A JPH05291551A (en) | 1992-04-14 | 1992-04-14 | Solid-state image sensing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05291551A true JPH05291551A (en) | 1993-11-05 |
Family
ID=14101083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4094102A Pending JPH05291551A (en) | 1992-04-14 | 1992-04-14 | Solid-state image sensing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05291551A (en) |
-
1992
- 1992-04-14 JP JP4094102A patent/JPH05291551A/en active Pending
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