JPH05291493A - Multi-chip module - Google Patents
Multi-chip moduleInfo
- Publication number
- JPH05291493A JPH05291493A JP9510892A JP9510892A JPH05291493A JP H05291493 A JPH05291493 A JP H05291493A JP 9510892 A JP9510892 A JP 9510892A JP 9510892 A JP9510892 A JP 9510892A JP H05291493 A JPH05291493 A JP H05291493A
- Authority
- JP
- Japan
- Prior art keywords
- chip module
- thick film
- wire bonding
- film printed
- bonded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】
【目的】ワイアボンディングで接続されたデバイスを実
装したマルチチップモジュールの低コストで高密度な実
装構造を得る。
【構成】ワイアボンディング３で接続され且つ複数のデ
バイス２をそれぞれ実装した２枚の片面実装の基板１
ａ，１ｂを各々実装面を表側として裏側同士を貼り合
せ、外部接続用のクリップ端子４ではさむとともに２枚
の基板１ａ，１ｂ間の電気的接続を行い、１つのマルチ
チップモジュールとする。
(57) [Abstract] [Purpose] To obtain a low-cost and high-density mounting structure of a multi-chip module mounting devices connected by wire bonding. [Structure] Two single-sided boards 1 which are connected by wire bonding 3 and each of which is mounted with a plurality of devices 2.
A and 1b are bonded to each other with their mounting surfaces on the front side and the back sides are bonded to each other, sandwiched by the clip terminal 4 for external connection, and electrically connected between the two substrates 1a and 1b to form one multichip module.
Description
【０００１】[0001]
【産業上の利用分野】本発明はハイブリッドＩＣの一種
であるマルチチップモジュールに関し、特にマルチチッ
プモジュールの高密度な実装構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip module which is a kind of hybrid IC, and more particularly to a high-density mounting structure of the multi-chip module.
【０００２】[0002]
【従来の技術】従来、この種のマルチチップモジュール
は、図２に示されるように、厚膜印刷セラミック基板，
低温焼成多層基板等の印刷配線基板（以下、基板）１１
上に複数のデバイス２を実装し、ワイアボンディング３
で接続し、外部接続用のクリップ端子１４を取り付けた
後、外装樹脂等でコーティング５をほどこしてなってい
た。2. Description of the Related Art Conventionally, as shown in FIG. 2, a multi-chip module of this type has a thick film printed ceramic substrate,
A printed wiring board (hereinafter referred to as a board) 11 such as a low temperature baked multilayer board
Mount multiple devices 2 on top and wire bond 3
After the connection, the clip terminal 14 for external connection was attached, and then the coating 5 was applied with an exterior resin or the like.
【０００３】[0003]
【発明が解決しようとする課題】従来、このようなマル
チチップモジュールにおいて、デバイス接続のためのワ
イアボンディングには超音波併用熱圧着ワイアボンディ
ングが用いられており、熱が均一に加わるように基板の
裏面側からホットプレートで加熱するため、基板の両面
にデバイスを実装することができず、実装の高密度化が
できないという問題点があった。Conventionally, in such a multi-chip module, thermocompression bonding wire bonding combined with ultrasonic wave is used for wire bonding for device connection, and the substrate is bonded so that heat is uniformly applied. Since heating is performed by the hot plate from the back surface side, devices cannot be mounted on both surfaces of the substrate, and there has been a problem that the mounting density cannot be increased.
【０００４】[0004]
【課題を解決するための手段】本発明は厚膜印刷基板等
の基板上にデバイスを実装しワイアボンディングで接続
されるマルチチップモジュールにおいて、前記デバイス
を表面側に実装した前記厚膜印刷基板を２枚備え、これ
ら２枚の厚膜印刷基板を各々実装面を表側として裏側同
士を貼り合わせ且つ外部接続用の端子ではさんでなり、
また前記２枚の厚膜印刷基板間を前記端子によって電気
接続している。SUMMARY OF THE INVENTION The present invention is a multi-chip module in which a device is mounted on a substrate such as a thick film printed substrate and connected by wire bonding, and the thick film printed substrate having the device mounted on the surface side is provided. Two thick film printed boards are provided, and the back surfaces are bonded together with the mounting surface as the front side and sandwiched by terminals for external connection.
Further, the two thick film printed boards are electrically connected by the terminals.
【０００５】[0005]
【実施例】次に、本発明について図面を参照して説明す
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
【０００６】図１は本発明の一実施例のマルチチップモ
ジュールの断面図である。FIG. 1 is a sectional view of a multichip module according to an embodiment of the present invention.
【０００７】本実施例は、厚膜セラミック基板，低温焼
成多層基板等の印刷配線基板（以下、基板）を２枚有
し、それぞれ基板１ａ，１ｂとする。これらの基板１
ａ，１ｂの表面側にそれぞれ複数のデバイス２を実装
し、ワイアボンディング３で接続する。これら２枚の基
板１ａ，１ｂを実装面が表側となるように裏側同士を貼
り合わせ、更に基板１ａ，１ｂの両端部において外部接
続用のクリップ端子４を用いて挟みつける。またクリッ
プ端子４によって２枚の基板１ａ，１ｂ間の電気的接続
をも行う。その後、外装樹脂等で全体にコーティング５
を施し、１つのマルチチップモジュールとする。In this embodiment, two printed wiring boards (hereinafter referred to as "substrates") such as a thick film ceramic substrate and a low temperature fired multilayer substrate are provided as substrates 1a and 1b, respectively. These substrates 1
A plurality of devices 2 are mounted on the front surfaces of a and 1b, and are connected by wire bonding 3. These two boards 1a and 1b are attached to each other so that their mounting surfaces are on the front side, and further sandwiched at both ends of the boards 1a and 1b by using clip terminals 4 for external connection. Further, the clip terminal 4 also electrically connects the two substrates 1a and 1b. Then, coat the entire surface with exterior resin, etc. 5
To obtain one multi-chip module.
【０００８】[0008]
【発明の効果】以上説明したように本発明は、表面のみ
にワイアボンディングで接続されたデバイスをそれぞれ
実装した２枚の基板を裏面同士で貼り合わせることによ
り、両面実装相当のマルチチップモジュールの高密度実
装を低コストで実現できる効果がある。As described above, according to the present invention, two substrates, each having a device connected by wire bonding only on the front surface, are mounted on the back surfaces, so that a multi-chip module having a double-side mounting capability can be obtained. There is an effect that the density mounting can be realized at a low cost.
【図１】本発明の一実施例のマルチチップモジュールの
断面図である。FIG. 1 is a cross-sectional view of a multi-chip module according to an embodiment of the present invention.
【図２】従来のマルチチップモジュールの一例の断面図
である。FIG. 2 is a sectional view of an example of a conventional multi-chip module.
１ａ，１ｂ，１１ 印刷配線基板 ２ デバイス ３ ワイアボンディング ４，１４ クリップ端子 ５ コーティング 1a, 1b, 11 Printed wiring board 2 Device 3 Wire bonding 4, 14 Clip terminal 5 Coating
Claims (2)
装しワイアボンディングで接続されるマルチチップモジ
ュールにおいて、前記デバイスを表面側に実装した前記
厚膜印刷基板を２枚備え、これら２枚の厚膜印刷基板を
各々実装面を表側として裏側同士を貼り合わせ且つ外部
接続用の端子ではさんでなることを特徴とするマルチチ
ップモジュール。1. A multi-chip module in which a device is mounted on a substrate such as a thick film printed circuit board and connected by wire bonding is provided with two thick film printed circuit boards having the device mounted on the front surface side. The multi-chip module, wherein the thick film printed circuit boards are attached to each other with the mounting surface on the front side and the back sides are bonded to each other and are sandwiched by terminals for external connection.
よって電気接続したことを特徴とする請求項１記載のマ
ルチチップモジュール。2. The multi-chip module according to claim 1, wherein the two thick film printed boards are electrically connected by the terminals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9510892A JPH05291493A (en) | 1992-04-15 | 1992-04-15 | Multi-chip module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9510892A JPH05291493A (en) | 1992-04-15 | 1992-04-15 | Multi-chip module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05291493A true JPH05291493A (en) | 1993-11-05 |
Family
ID=14128669
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9510892A Withdrawn JPH05291493A (en) | 1992-04-15 | 1992-04-15 | Multi-chip module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05291493A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100381892B1 (en) * | 1999-11-24 | 2003-04-26 | 삼성전자주식회사 | Dual-lead Type Square Semiconductor Package And Dual In-line Memory Module Using The Same |
-
1992
- 1992-04-15 JP JP9510892A patent/JPH05291493A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100381892B1 (en) * | 1999-11-24 | 2003-04-26 | 삼성전자주식회사 | Dual-lead Type Square Semiconductor Package And Dual In-line Memory Module Using The Same |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Application deemed to be withdrawn because no request for examination was validly filed |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990706 |