JPH05275301A - Manufacture of substrate for semiconductor device - Google Patents

Abstract

(57) [Summary] [Object] With respect to a substrate for a semiconductor device, an object thereof is to prevent convex and concave warpage that occurs when mixed with the substrate due to heat treatment. [Structure] Heat treatment is applied to a region having a warp having a convex surface and a region having a warp having a concave shape, with a film having a lower coefficient of thermal expansion and a film having a higher coefficient of thermal expansion than a substrate, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for preventing warpage due to heat treatment of a semiconductor substrate having an insulating layer having a different coefficient of thermal expansion formed on or near the surface.

[0002]

2. Description of the Related Art A silicon oxide (SiO ₂ ) film is used as an insulating layer constituting a semiconductor device, but SiO ₂ has a smaller coefficient of thermal expansion than silicon crystal. Therefore, when a silicon wafer with a SiO ₂ film formed on one surface is cooled at high temperature, warpage occurs so that the surface side becomes convex. Such warpage may cause a decrease in the accuracy of the exposed pattern in the lithographic process, or may cause uncertain wafer movement and fixation by the vacuum adsorption method in other processing processes, leading to a decrease in yield. Becomes

In order to suppress the warp of the semiconductor substrate as described above, an SiO ₂ film or other film having a low coefficient of thermal expansion is previously formed on the back surface of the substrate, and a process involving formation of an insulating layer or other high temperature treatment is performed. Various methods have been proposed (see, for example, JP-A-61-069135).

[0004]

The conventional measures against the above-mentioned warp are intended for the warp in which the entire substrate surface is convex or concave. However, the so-called SOI
In a substrate having a (silicon on insulator) structure, a convex warp and a concave warp may coexist on a part of the surface. For example, the so-called ZMR (zone melting recrystalliza
The SOI wafer 1 manufactured by the
As shown in (a), the convex warped region (A) and the concave warped region (B) are symmetrically distributed with respect to the center of the wafer 1. Pass through the center of wafer 1 <
The cross sections in the 011> direction and the <101> direction are shown in FIGS. 2 (b) and 2 (c), respectively.

The magnitude of such a warp is, for example, 4 mm in diameter.
30 inch on both convex and concave sides of inch wafer 1
The amount of warp represented by the difference in height between the lowest point and the highest point when the wafer 1 is placed on a flat surface is about 60 μm.
By the way, the warp of a normal silicon wafer with a diameter of 4 inches is at most about 10 μm. For a wafer 1 that causes a warp as shown in FIG. 2, even if a SiO ₂ film or the like is formed on the entire back surface of the wafer as in the conventional method, the warp of the entire wafer cannot be suppressed. Depending on the material of the warp prevention film, the warp may be increased.

The present invention improves the flatness over the entire surface of a substrate having a complicated warp by forming a film for suppressing the warp according to the distribution of the convex warp and the concave warp as described above. The purpose is to do.

[0007]

The above-mentioned object is to provide the first surface of the semiconductor substrate having a front surface on which a first region in which a convex warp is generated and a second region in which a concave warp is formed by heat treatment are mixed. A first insulating layer having a coefficient of thermal expansion lower than that of the semiconductor substrate is formed in a region corresponding to the region of 2 and a second insulating layer having a coefficient of thermal expansion higher than that of the semiconductor substrate is formed in a region corresponding to the second region. This is achieved by the method for manufacturing a semiconductor device according to the present invention, which comprises the step of performing the heat treatment after forming the insulating layer.

[0008]

[Function] For example, when a silicon wafer is heat-treated, tensile stress is generated on the surface of the warped area where the surface side is convex, and on the other hand, on the surface of the warped area where the surface side is concave. Is under compressive stress. Therefore, it suffices to form a film that produces compressive stress and tensile stress corresponding to these stresses on the back surface of each region. That is, a SiO ₂ film having a smaller coefficient of thermal expansion than silicon is formed on the back surface of the region where convex warpage occurs, and a coefficient of thermal expansion is larger than silicon on the back surface of the region where concave warp occurs.
By forming the Si ₃ N ₄ films respectively, the stresses on the front and back surfaces of the respective regions are balanced, so that they are flattened.

[0009]

[Embodiment] FIG. 1 is a process explanatory drawing of an embodiment in which the present invention is applied to the fabrication of a substrate having an SOI structure by the ZMR method. As shown in FIG. The surface of a silicon wafer 1 having a diameter of 4 inches, which exposes the (100) surface, is formed by a well-known CVD (chemical vapor deposition) method to a thickness of about 0.4 μm.
SiO ₂ film 5, 0.2 μm thick polycrystalline silicon layer 6 and Si
A protective film 7 made of O ₂ and having a thickness of about 1.0 μm is sequentially deposited.
As will be described later, the protective film 7 prevents contamination by the heater 11 made of, for example, graphite when the polycrystalline silicon layer 6 is recrystallized by the heater 11, and the surface of the recrystallized silicon layer. It is provided as a mold for smoothing.

On the other hand, on the back surface of the wafer 1, as shown in FIG. 2 (b), the first region (A) in which the surface side is convex due to heat treatment and the second area in which the warp is concave are formed.
Corresponding to the region (B), the SiO ₂ film 8 having a thickness of 0.2 μm and the Si ₃ N ₄ film 9 having a thickness of 0.1 μm are deposited respectively. In addition,
In FIGS. 1A and 1C showing the cross section of the wafer 1, the SiO ₂ film 8 and the Si ₃ N ₄ film 9 are collectively referred to as a warp prevention film 4. The first area (A) and the second area (B) are usually
It is distributed in a region defined by two center lines that intersect at an angle of 45 degrees with respect to an orientation flat (OF) provided perpendicular to the <011> direction.

Next, referring again to FIG. 1A, for example, a rod-shaped heater 11 is moved along the surface of the wafer 1, the polycrystalline silicon layer 6 is heated to its melting point of about 1400 ° C., and recrystallized. Let After that, the wafer 1 is cooled to room temperature and etched by, for example, a hydrofluoric acid solution to remove the protective film 7 as shown in FIG. In this etching, the SiO ₂ film 8 on the back surface of the wafer 1 is also removed. Reference numeral 3 in FIG. 3C indicates a single crystal silicon layer in which the polycrystalline silicon layer 6 is recrystallized.

As described above, the warp of the wafer 1 which has been subjected to the recrystallization heat treatment in the state where the warp prevention film 4 including the SiO ₂ film 8 and the Si ₃ N ₄ film 9 is provided is about 25 μm,
A significant improvement was observed compared to the conventional 60 μm.

The present invention can also be applied to flatten a wafer that has once been warped. That is, the SiO ₂ film 8 and the SiO ₂ film 8 are formed on the back surface of a silicon wafer which is manufactured by the conventional method and has a mixture of convex and concave warps
After forming a warp prevention film made of the Si ₃ N ₄ film 9, the wafer is annealed at about 900 ° C. to reduce the initial warp. Further, the warp prevention film is not limited to the combination of the SiO ₂ film and the Si ₃ N ₄ film, and it goes without saying that it can be arbitrarily selected in relation to the coefficient of thermal expansion of the substrate material such as a wafer.
It is also clear that a composite film having a desired average coefficient of thermal expansion formed by laminating films having different coefficients of thermal expansion may be used.

[0014]

According to the present invention, it is possible to reduce the convex warp and the concave warp that occur in a mixed manner in the semiconductor substrate, and in particular, there is an effect of improving the flatness of the semiconductor substrate having the SOI structure. As a result, high-performance
It greatly contributes to promotion of development of high-density semiconductor integrated circuits and improvement of manufacturing yield.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of an embodiment of the present invention

FIG. 2 is an explanatory diagram of conventional problems

[Explanation of symbols]

1 Wafer 7 Protective Film 3 Single Crystal Silicon Layer 8 SiO ₂ Film 4 Warp Prevention Film 9 Si ₃ N ₄ Film 5 Embedded Insulation Layer 11 Rod-shaped Heater 6 Polycrystalline Silicon Layer

Claims (3)

[Claims] 1. A first warp that is formed by heat treatment
Of the first substrate having a lower coefficient of thermal expansion than the semiconductor substrate in the region corresponding to the first region on the back surface of the semiconductor substrate having a surface in which the second region and the second region where concave warpage occurs are mixed.
And forming a second insulating layer having a higher coefficient of thermal expansion than the semiconductor substrate in a region corresponding to the second region, and then performing the heat treatment. Manufacturing method of substrate for semiconductor device. 2. The semiconductor substrate according to claim 1, further comprising a step of forming a silicon layer on the surface via a silicon oxide layer before at least the heat treatment step, wherein the semiconductor substrate is a silicon wafer. Method for manufacturing device substrate. 3. The semiconductor substrate is a silicon wafer, and the method further comprises the step of epitaxially growing a group III-V compound semiconductor layer on the surface after forming the first and second insulating layers. The method for manufacturing a semiconductor device substrate according to claim 1.