JPH05265812A - Information processor with micro-diagnostic device - Google Patents

Abstract

PURPOSE:To apply this device to an information processor of work station or the like smaller than a minicomputer. CONSTITUTION:This device is provided with an error information register 5 equipped with plural error detecting circuits so as to converge those outputs, a non-volatile logging buffer 7, logging means for an operation processor itself to log fault information, a logging completion informing means 61 to inform a micro-diagnostic device 6 of logging end, and a logging completion informing means 61 to monitor that the micro-diagnostic device 6 can receive the logging completion information within specified time, to log the error information register 5 by the micro-diagnostic device 6 when that information can not be received, and to output an alarm to an external warning device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having a plurality of error detection circuits, the error being notified to an arithmetic processing unit, and detailed information of the error being collected and logged by the arithmetic processing unit, In particular, the present invention relates to an information processing device with a micro diagnostic device which monitors the completion of logging and when the logging fails, the micro diagnostic device logs the contents of the error information register instead of the arithmetic processing device.

[0002]

2. Description of the Related Art An information processing apparatus of a class more than a conventional minicomputer has a system control apparatus including a diagnostic apparatus therein, and the diagnostic apparatus performs collection and logging of fault information, and the arithmetic processing apparatus mainly operates. I didn't do it. The reason is that, in general, the failure rate of the arithmetic processing device in the information processing device is high, and in the case of a failure of the arithmetic processing device itself, failure collection and logging by the arithmetic processing device are impossible. .. Therefore, in the conventional technique, a system control device that collects fault information and starts up the information processing device is provided on the system bus for diagnosis and fault data collection.

In an information processing device such as a workstation or a personal computer of a class smaller than that of a conventional mini computer, a special diagnostic device is not provided for collecting fault information and start-up processing, and all processing is performed by an arithmetic processing device.

FIG. 2 shows the configuration of a conventional minicomputer class information processing apparatus. Reference numeral 11 is a system controller, 12 is a gateway, 21, 31, 41 and 51 are error detection circuits, and 52 is an error information register interrupt signal. The fault detected by the arithmetic processing unit 2, the main storage unit 3, and the bus interface unit 4 is the system control unit 11
The system controller 11 reports to the system bus 1
Alternatively, the failure information is directly collected from the failed device via the diagnostic bus. The failure of the system bus 1 is caused by the system control device 1
1 monitor itself. The system control device 11 may stop the clock of the system bus 1 when a failure occurs to completely stop the operation of the entire information processing device including the arithmetic processing device 2.

[0005]

In the above-mentioned information processing apparatus of the mini computer or higher class, the system control unit is connected to the system bus, and the system control unit itself collects fault data using the system bus. Therefore, although it is very reliable, it is expensive and cannot be applied to a workstation class information processing device smaller than a minicomputer.

Therefore, a technical object of the present invention is to provide an information processing apparatus with a micro-diagnostic device which is inexpensive in view of the above-mentioned drawbacks and which can be applied to an information processing apparatus such as a workstation below a minicomputer.

[0007]

According to the present invention, an arithmetic processing unit, a bus interface unit, and a main memory unit are connected by a system bus, and the bus interface unit has one or more peripheral buses. An error detection circuit that outputs an error signal when an error is detected in an information processing device in which a micro-diagnostic device is connected to one of the peripheral buses and an external warning device is connected to the micro-diagnostic device A plurality of memory cells connected to the same peripheral bus as the micro diagnostic device, collecting error signals detected by the error detection circuit, and using the logical sum of the error signals as an interrupt, the arithmetic processing unit and the micro diagnostic device. Error information that can be notified and can be accessed from the arithmetic processing unit and the micro-diagnostic unit and can be reset from the arithmetic processing unit. A register, a non-volatile logging buffer connected to the same peripheral bus as the micro diagnostic device and accessible from the arithmetic processing device and the micro diagnostic device, and the arithmetic processing device received an interrupt from the error information register. After that, the error cause is recognized, detailed error information is collected, error logging means for storing in the logging buffer, and logging completion notifying means for notifying the micro diagnostic device of logging completion from the arithmetic processing device, After the micro-diagnostic device receives the interrupt from the error information register, it monitors that the notification by the logging completion notifying means is performed within a predetermined time, and when the logging is not completed within the predetermined time, , The micro diagnostic device accesses the error information register and logs its contents Stored in the Ffa,
It is possible to obtain an information processing apparatus with a micro-diagnostic device, which has a logging completion monitoring means for issuing a warning to the external warning device.

Further, according to the present invention, in the information processing apparatus with the micro-diagnostic device according to claim 1, a first interrupt for causing an interrupt from the arithmetic processing unit to the micro-diagnostic device in the bus interface device. A port and a first interrupt communication area indicating an interrupt factor from the arithmetic processing unit to the micro-diagnostic unit are provided in the logging buffer, and the error logging unit or software detects a predetermined error in the system. In this case, an external alarm device alarm output request means for setting an external alarm device alarm output code in the first interrupt communication area and generating an interrupt to the micro-diagnostic device via the first interrupt port. , Receiving an interrupt from the arithmetic processing unit in the micro-diagnostic device, and communicating the first interrupt. Information processing with a micro-diagnostic device, characterized in that it has an external alarm alarm output generation means for confirming that a code for an external alarm alarm output is set at the rear and outputting an alarm to the external alarm. The device is obtained.

According to the present invention, in the information processing apparatus with the micro diagnostic device according to claim 2, a system reset signal line which is output from the micro diagnostic device and resets the entire information processing device except the micro diagnostic device. And a system reset output request means for causing the arithmetic processing unit to set a system reset request code in the first interrupt communication area and for generating an interrupt to the micro diagnostic device via the first interrupt port. In the micro-diagnostic device, an interrupt from the arithmetic processing device is received, it is confirmed that a system reset output request code is set in the first interrupt communication area, and a system reset signal is driven. System reset generating means for resetting the entire information processing apparatus. Micro-diagnostic apparatus with the information processing apparatus can be obtained.

Further, according to the present invention, in the information processing apparatus with the micro diagnostic device according to claim 3, a plurality of power supply control devices for controlling a power supply device in the information processing device are connected to the micro diagnostic device. A power control interface, a second interrupt port in the bus interface device for generating an interrupt from the micro-diagnostic device to the arithmetic processing device, and a micro-diagnostic device to the arithmetic processing device in the logging buffer. A second interrupt communication area indicating an interrupt factor is provided, and when an abnormality occurs in the power supply device, the micro-diagnostic device collects an error status from the power supply control device via the power supply control interface and performs the logging. Power failure logging means for storing in a buffer, and the micro diagnostic device,
A power failure notification means for setting a power failure code in the second interrupt communication area and generating an interrupt in the arithmetic processing unit via the second interrupt port; And a power failure blocking means for starting the blocking processing after confirming that the power failure code is set in the second interrupt communication area. An additional information processing device is obtained.

According to the present invention, in the information processing apparatus with the micro diagnostic device according to claim 4, a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device is provided, and the micro diagnostic device is provided. When the device receives a power-on instruction from the power switch via the power switch interface, the device instructs the power control device to power on via the power control interface and powers on the entire information processing device. When the closing means and the micro-diagnostic device receive a power-off instruction from the power switch via the power switch interface, the micro-diagnostic device sets a code of a blocking request in the second interrupt communication area, Generates an interrupt to the arithmetic processing unit via the second interrupt port The blocking process requesting means for enabling the blocking process and the arithmetic processing unit receive the interrupt from the micro-diagnostic device, confirm that the blocking request code is set in the second interrupt communication area, and start the blocking process. After the closing process and the arithmetic processing unit complete the closing process, a code for a power-off request is set in the first interrupt communication area, and an interrupt is generated in the micro-diagnostic device through the first interrupt port. It is confirmed that the power-off requesting means and the micro-diagnostic device have received an interrupt from the arithmetic processing unit, and that the power-off request code has been set in the first interrupt communication area, To the power control interface via the power control interface to all the information processing devices except the peripheral bus to which the micro diagnostic device is connected. Micro diagnostic apparatus with the information processing apparatus is obtained, characterized in that it comprises a power-off means for the power-off.

[0012]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 shows an information processing apparatus with a micro-diagnosis apparatus according to an embodiment of the present invention.

1 is a system bus, 2 is an arithmetic processing unit, 3
Is a main memory device, 4 is a bus interface device, 5 is an error information register, 6 is a micro diagnostic device, 7 is a logging buffer, 8 is a peripheral bus, 31, 41 and 51 are error detection circuits, and 52 is an error information register interrupt signal. , 61 is an error logging completion notifying means, and 62 is an external warning device.

FIG. 3 is a flow chart of the error logging means. FIG. 4 is a flowchart of the error logging completion monitoring means. FIG. 5 shows the inside of the error logging buffer. FIG. 6 shows details of the log header section. FIG. 7 shows details of the log record.

FIG. 8 is a configuration diagram 2 of the embodiment. 9 is a calendar clock, 10 is a serial input / output port, 42 is a first interrupt port, 43 is a second interrupt port, and 63.
Is an interrupt signal from the arithmetic processing male value to the micro diagnostic device,
64 is a system reset signal line, 65 is a power supply control device,
66 is a power supply device, 67 is a power supply control interface, 10
Reference numeral 0 is a console, 601 is a power switch interface, 602 is a dump switch interface, 603 is an unmanned operation controller interface, 610 is a power switch, 620 is a dump switch, and 630 is an unmanned operation controller.

FIG. 9 is a flow chart of the external alarm device alarm output requesting means, FIG. 10 is a flow chart of the external alarm device alarm output generating means, FIG. 11 is a flow chart of the system reset output requesting means, and FIG. 12 is a flow chart of the system reset output generating means. FIG. 13 is a flowchart of the power failure logging means, FIG. 14 is a flowchart of the power failure notification means, FIG. 15 is a flowchart of the power failure blocking means, and FIG. 16 is a flowchart of the power-on means.
FIG. 17 is a flowchart of the blocking process requesting means, FIG. 18 is a flowchart of the blocking means, FIG. 19 is a flowchart of the power-off requesting means, FIG. 20 is a flowchart of the power-off means, and FIG.
22 is a flowchart of the forced power-off means, FIG. 23 is a list of interrupt codes in the first communication area, FIG. 24 is a list of second communication area interrupt codes, FIG. 25 is a list of startup parameter codes, and FIG. 26 is a boot information area. Details of Figure 2
7 is the details of the startup time area.

The error detection circuit in the information processing device is LS
It is a diagnostic circuit mounted inside the I, a parity checker outside the LSI, and the like. When these error detection circuits detect an error, the error information register 5 is notified by a signal line. When at least one of the error detection circuits detects an error, the error information register 5 causes an interrupt to the micro diagnostic device 6 and the arithmetic processing device 2 through the signal line 52, and prompts the start of logging.

Next, the arithmetic processing unit 2 reads the error information register 5 and recognizes the cause of the error when receiving the interrupt from the error information register 5, as shown by the logging means of FIG. The arithmetic processing unit 2 collects detailed error information corresponding to the cause of the error. For example, when the error detection circuit in the main storage device 3 detects a 1-bit error in the memory, it reports a memory failure error to the error information register 5 and an interrupt occurs from the error information register 5 to the arithmetic processing device 2. .. The arithmetic processing unit 2 reads the error information register 5, recognizes that a memory failure has occurred, and collects information such as the error type, error address, and error syndrome held in the main storage unit 3.

The collected error data is stored in the areas of the log header section 780 and the log data section 790 shown in FIG. The storage format of the log header 780 is shown in FIG. The start address 781 of the valid record indicates the start address in the log data section 790 of the oldest valid log record. The number of valid records 782 indicates the number of log records stored in the log data section 790, and the log number 783 of the next log record is smaller than the log number of the latest log record currently logged. 1
The larger value is set. The log number is uniquely given to the log record. The format of the log record is log number 791, log type 7 as shown in FIG.
93, a log data length 794, and a data portion 795. The log record type 793 is defined in units of log record error detection modules. Also, log record length 7
In 94, the number of bytes of the log record is stored.

The logging completion notifying means is the processing unit 2
However, after completing the log in the logging buffer 7, the error logging completion notification signal 61 is driven to notify the micro diagnostic device 6 that the log is normally completed.

As shown in FIG. 4, when the micro-diagnostic device 6 receives the interrupt from the error information register 5, the logging completion monitoring means waits for a predetermined time to elapse,
After the lapse of the predetermined time, the logging completion notifying means checks whether or not the logging is completed, and if so, the monitoring of the logging is terminated without doing anything. It is suitable that the predetermined time is twice the maximum time required for the arithmetic processing unit 2 to complete logging. When the logging completion notification is not received by the lapse of the predetermined time, the micro diagnostic device 6 reads the error information register 5 and stores it in the logging buffer 7. Further, the external warning device 62 is caused to generate a warning.

An application example of the information processing apparatus with the micro-diagnosis apparatus will be shown below.

When the error logging ends normally, but a fatal failure is logged in the operation of the system,
Alternatively, a mechanism for outputting an alarm to an external alarm device by software when the OS falls into a state in which it cannot operate although there is no failure report from the error information register 5 will be described below.

The external alarm device alarm output requesting means is shown in FIG.
As shown in FIG. 5, the software which has detected the fatal error sets the code (40H) of the alarm output to the external alarm in the first interrupt history area 710 provided in the logging buffer 7 shown in FIG. This is realized by writing 1 to the first interrupt port 42 in the bus interface device 4 shown in FIG. 8 to drive the interrupt signal line 63 and generate an interrupt to the micro diagnostic device 6.

In the external alarm device alarm output generating means, as shown in FIG. 10, the micro-diagnostic device 6 receives the interrupt from the arithmetic processing device 2 and the external alarm device alarm is displayed in the first interrupt history area 710. Output code (40
H) is set and the external alarm 61
It is realized by outputting an alarm to.

Next, a mechanism adopted in the present embodiment to restore the system by resetting the entire information processing apparatus immediately after the occurrence of a fatal failure will be described.

As shown in FIG. 11, the system reset request means, after collecting the fault data, the software executed by the arithmetic processing unit 2 sets the system reset request code (04H) in the first interrupt history area 710. , 1 is written in the first interrupt port 42 to drive the interrupt signal line 63, and the micro diagnostic device 6 is caused to generate an interrupt.

The system reset output generating means is
As shown in FIG. 12, the micro-diagnostic device 6 receives the interrupt from the arithmetic processing unit 2, and the system reset output request code (04H) is input to the first interrupt history area 710.
Is set and the system reset signal 64 is driven to reset the entire information processing apparatus. The system reset signal 64 is spread all over the information processing device and resets almost all except the micro diagnostic device 6.

Next, a fault processing method used in this embodiment when a power source fault occurs will be described.

As shown in FIG. 13, the power supply abnormality logging means collects an abnormality status from the power supply control device 65 via the power supply control interface 67 by the micro-diagnostic device 6 when an abnormality occurs in the power supply device 66. The failure data is stored in the logging buffer 7. The power supply abnormality includes a power failure of the input AC of the information processing device, a DC abnormality of the power supply device, a failure of the cooling device of the information processing device, a temperature abnormality in the information processing device, and the like.

In the power failure notification means, the micro-diagnostic device 6 sets a power failure code (10H) in the second interrupt history area 720 and writes 1 to the second interrupt port 43, as shown in FIG. This drives the interrupt signal 22 to cause the arithmetic processing unit 2 to generate an interrupt.

As shown in FIG. 15, the power failure obstructing means is as follows.
This is realized by starting the blocking process when the arithmetic processing unit 2 receives the interrupt from the micro diagnostic device 6 and the power failure code (10H) is set in the second interrupt history area 720. Depending on the type of power failure, the DC of the information processing device may not be guaranteed until the blocking process is completed. However, the blocking process should be performed during the period from the occurrence of AC disconnection to the battery discharge limit when a certain amount of battery is built in the information processing device, or during the period from the fan failure to the temperature abnormality. You can

Next, a method of normal closing processing adopted in this embodiment will be described.

When the micro-diagnostic device 6 receives a power-on instruction from the power switch 610 through the power switch interface 601, the power-on means receives the power-on instruction from the power switch 610 via the power control interface 67 with respect to the power controller 65, as shown in FIG. To instruct power-on and power on the entire information processing apparatus.

Further, as shown in FIG. 17, when the micro-diagnostic device 6 receives a power-off instruction from the power switch 610 through the power switch interface 601, the blocking process requesting means causes the micro-diagnostic device 6 to execute a second interrupt. The code (21H) of the blocking request is set in the history area 720, and the interrupt signal 22 is driven by writing 1 to the second interrupt port 43 to generate an interrupt in the arithmetic processing unit 2.

As shown in FIG. 18, the closing means receives the interrupt from the micro-diagnostic device 6 by the arithmetic processing unit 2 and outputs the closing request code (21) to the second interrupt history area 720.
Confirm that h) is set and start the blocking process.

Next, as shown in FIG. 19, the power-off requesting means sets the power-off request code (10h) in the first interrupt history area 710 after the arithmetic processing unit 2 completes the blocking process, and the first interrupt history area 710 is set. By writing 1 to the interrupt port 42, the interrupt signal line 64 is driven to cause the micro diagnostic device 6 to generate an interrupt.

As shown in FIG. 20, the power-off means is such that the micro-diagnostic device 6 receives an interrupt from the arithmetic processing unit 2 and a power-off request code (10h) is set in the first interrupt history area 710. The power supply control device 65 is instructed to cut off the power supply via the power supply control interface 67, and the power supply of the entire information processing device except the peripheral bus 8 to which the micro diagnostic device 6 is connected is cut off.

The power-off requesting means and the power-off means allow the power to be turned off by a software command of an operator without using the power switch 610.

However, with the above power-off method, power-off cannot be performed when the software is stalled. To solve this problem, the mechanism realized in this embodiment will be described.

As shown in FIG. 21, the closing processing means means that the arithmetic processing unit 2 puts a code (06H) being closed in the first interrupt history area 710 within a certain time interval while the closing processing is being executed. Set, first interrupt port 4
Driving the interrupt signal 64 by writing 1 to 2
An interrupt is generated in the micro diagnostic device 6.

As shown in FIG. 22, the forced power-off means is
The micro-diagnostic device 6 receives the interrupt from the arithmetic processing device 2 within a fixed time interval, and the first interrupt history area 7
When it is not confirmed that the code (06H) being closed is set in 10, the power control device 65 is instructed to turn off the power via the power control interface 67, and the micro diagnostic device 6 is connected. The power to the entire information processing apparatus except for the peripheral bus 8 is cut off.

Next, the serial input / output access control means employed in the present embodiment is configured so that the serial input / output port 10 and the console 100 capable of inputting / outputting data from / to the micro diagnostic device 6 and the arithmetic processing device 2 are connected to the micro diagnostic device 6. By connecting to the same peripheral bus 8, the micro-diagnostic device 6 inhibits access to the serial input / output port 10 during the period from turning on the power of the entire information processing device to turning off the power. Has been realized.

Further, the power supply status output means checks the data input from the serial input / output port 10 by the micro-diagnostic device 6 while the power of the information processing device is off, and holds it in the micro-diagnostic device 6 in advance. When the power supply status display password is matched, the power supply status data is output to the console 100. The reason these restrict the user with a password is that this function is for maintenance, not for the user.

The console power-on means checks the data input from the console 100 through the serial input / output port 10 as in the above case, and matches the power-on password held in advance in the micro diagnostic device 6. In this case, the power control device 65 is instructed to power on via the power control interface 67 to power on the entire information processing device. This is the password because the power-on function should not be released to all users, and should be done only by the system administrator for security reasons.

Next, in this embodiment, when the power-on password is input from the console 100 via the serial input / output port 10, the micro-diagnostic device 6 simultaneously inputs the start-up parameters by the start-up parameter setting means to start up. Set in the parameter area 730, and the arithmetic processing unit 2
However, after the system reset is released by turning on the power, the boot means reads the startup parameter setting area 730, and the boot processing is performed according to the boot information area 770 in the logging buffer. The boot information area is shown in FIG.

Next, in the dump processing request means adopted in this embodiment, the micro-diagnostic device 6 uses the dump switch 620.
When a dump instruction is received from the dump switch interface 602 from the dump switch interface 602, a dump activation request code (20H) is set in the second interrupt history area 720, and the arithmetic processing unit 2 is set in the second interrupt port 43. Generate an interrupt.

The dump means confirms that the arithmetic processing unit 2 has received the interrupt from the micro-diagnostic unit 6 and that the code (20H) of the dump request is set in the second interrupt history area 720, Start processing.

However, in the above method, the dump means does not operate when the software is stalled and the interrupt from the micro diagnostic device 6 cannot be received. Therefore, in the present embodiment, the dump start notification means sets a dump start notification code (20H) in the second interrupt history area 720, and interrupts the micro diagnostic device 6 via the second interrupt port 43. Is generated, and the micro-diagnostic device 6 is operated by the dump restart means within a certain period of time to cause the arithmetic processing device 2 to operate.
When it is not possible to confirm that the dump start notification code (20H) has been set in the first interrupt history area 710 after receiving an interrupt from, the startup parameter area 730 has a code (0DH) indicating a dump restart. ) Is set and the system reset signal is driven to reset the entire information processing apparatus. Subsequently, after the processing unit 2 releases the system reset by the reset dump means, the startup parameter area 730 is read out, and when the code (0DH) indicating the dump restart is set, the dump is started.

Next, the external signal of the information processing device is received,
An upper-level host computer that has an unmanned operation control interface 603 that connects the unmanned operation control device 630 that issues a power-on instruction or a power-off instruction to the information processing apparatus and the micro-diagnostic device 6 and that is connected by a network or a dedicated line An embodiment will be described in the case where it is desired to turn on / off the power from the device.

The unattended power-on means is the micro diagnostic device 6
When the power-on instruction is received from the unmanned power supply control device 630 via the unmanned operation control interface 603, the power supply control device 65 is instructed to turn on the power supply via the power supply control interface 67, and the power of the entire information processing device is turned on. ..

When the micro-diagnosis device 6 receives a power-off instruction from the unmanned power supply controller 630 through the unmanned operation control interface 603, the blockage processing request means causes the micro-diagnosis device 6 to display the second interrupt history area 720. The interrupt request code is set and the second interrupt port 4
An interrupt is generated in the arithmetic processing unit 2 via 3.

Next, in this embodiment, in order to leave the time at which a failure has occurred as log information, it is connected to the same peripheral bus 8 as the micro diagnostic device 6 and is accessible from the arithmetic processing unit 2 and the micro diagnostic device 6. It has a calendar clock 9 that constantly updates and holds the time of the current year, month, day, hour, minute, second.

The calendar clock power-on means uses the calendar clock 9 described above, and when the power supply of the entire information processing apparatus except the peripheral bus 8 to which the micro diagnosis apparatus 6 is connected is cut off, The startup time area 740 and the calendar clock 9 are compared at regular time intervals, and when the two times match, the power control device 65 is instructed to turn on the power via the power control interface 67, and the entire information processing device. Turn on the power. This startup time area 740 is set by software.

Next, the power-on factor setting means sets the power-on factor in the power-on factor area 750 shown in FIG. 5 when the power is turned on, whereby the software can change the processing depending on the power-on factor at startup. Becomes For example, when the software sets the startup time in the startup time area 740 and has the shutdown time in the software file, when the current time matches the shutdown time in the own file, the calendar clock 9 is used. Only when starting up, the software cuts off the power by the power-off requesting means, but when starting up due to another factor, it is possible to do nothing.

Next, the mechanism of the watchdog timer using the interrupt communication between the arithmetic processing unit 2 and the micro diagnostic unit 6 will be described.

In the watchdog timer start request means, the arithmetic processing unit 2 sets a count value in the watchdog timer count value area 760, and the watchdog timer start request code (08) is set in the first interrupt history area 710.
H) is set and an interrupt is generated in the micro diagnostic device 6 via the first interrupt port 42.

In the watchdog timer processing means, the micro-diagnostic device 6 receives the interrupt from the arithmetic processing device 2,
It is confirmed that the watchdog timer start request code (06H) is set in the first interrupt history area 710, and then the watchdog timer update area is updated at regular intervals indicated by the watchdog timer count value area 760. It is confirmed that 765 has been updated by the arithmetic processing unit 2, and if it has been updated, the watchdog timer update area 765 is cleared. If it has not been updated, the watchdog timer is set in the second interrupt history area 720. A code for runout is set, and an interrupt is generated in the arithmetic processing unit 2 via the second interrupt port. Alternatively, an error bit of watchdog timer runout is added to the error information register 5, and when the watchdog timer update area 765 is not updated within the predetermined time, the micro diagnostic device 6 sets the corresponding bit of the error information register 5. It is also possible to cause the arithmetic processing unit 2 to generate an interrupt via the error information register 5.

Next, the mechanism for individually resetting the peripheral bus 8 will be described.

In the individual peripheral bus reset output request means, the arithmetic processing unit 2 sets the code of each peripheral bus reset request corresponding to each individual peripheral bus in the first interrupt history area 710, and the first interrupt port 42 An interrupt is generated in the micro diagnostic device 6 via.

The individual peripheral bus reset generation means means that the micro-diagnostic device 6 receives the interrupt from the arithmetic processing unit 2 and that the code of each individual reset output request is set in the first interrupt history area 710. After confirmation, the corresponding individual peripheral bus reset signal 605 is driven to individually reset the peripheral bus 8.

The embodiments will be listed below.

1. The processing device, the bus interface device, and the main memory device are connected by a system bus, the bus interface device has one or more peripheral buses, and one of the peripheral buses is connected with a micro-diagnostic device. In an information processing device in which an external warning device is connected to a micro-diagnostic device, the information processing device has a plurality of error detection circuits that output an error signal when an error is detected,
The error signal detected by the error detection circuit is connected to the same peripheral bus as the micro-diagnostic device, and the arithmetic processing device and the micro-diagnostic device are notified by using the logical sum of the error signals as an interrupt. An error information register accessible from the device and the microdiagnostic device and resettable from the arithmetic processing unit;
A non-volatile logging buffer connected to the same peripheral bus as the micro-diagnostic device and accessible from the arithmetic processing device and the micro-diagnostic device, and an error after the arithmetic processing device receives an interrupt from the error information register. Error logging means for recognizing a cause, collecting detailed error information, and storing it in the logging buffer; logging completion notifying means for notifying the micro diagnostic device of the completion of logging from the arithmetic processing device; and the micro diagnostic device. After the device receives the interrupt from the error information register, the device monitors the notification of the logging completion notifying means within a predetermined time, and if the logging is not completed within the predetermined time, the micro The diagnostic device accesses the error information register and stores the contents in the logging buffer. , Micro diagnostic apparatus with the information processing apparatus characterized by having a logging completion monitoring means for generating a warning to the external warning device.

2. In the information processing device with the micro-diagnosis device according to the above 1, in the bus interface device,
A first interrupt port for generating an interrupt from the arithmetic processing device to the micro diagnostic device, and a first interrupt communication area indicating an interrupt factor from the arithmetic processing device to the micro diagnostic device in the logging buffer. Provided,
When a predetermined error is detected in the system by the error logging means or software, an external alarm alarm output code is set in the first interrupt communication area, and the code is output via the first interrupt port. External alarm device alarm output requesting means for generating an interrupt in the micro diagnostic device, and a code of the external alarm device alarm output in the micro diagnostic device for receiving an interrupt from the arithmetic processing device and in the first interrupt communication area. An information processing device with a micro diagnostic device, comprising: an external alarm alarm output generating means for confirming that the alarm is set and outputting an alarm to the external alarm device.

3. In the information processing device with the micro diagnostic device according to the above item 2, a system reset signal line that is output from the micro diagnostic device and resets the entire information processing device except the micro diagnostic device is provided, and the arithmetic processing device is the first device. System reset output request means for setting a system reset request code in the interrupt communication area and generating an interrupt to the micro diagnostic device via the first interrupt port; and the arithmetic processing device in the micro diagnostic device. System reset generating means for receiving an interrupt from the device, confirming that a system reset output request code is set in the first interrupt communication area, and driving a system reset signal to reset the entire information processing apparatus. An information processing apparatus with a micro-diagnostic device, comprising:

4. In the information processing apparatus with the micro-diagnostic device described in 3, the power supply control interface for connecting a plurality of power supply control devices for controlling the power supply device in the information processing device and the micro-diagnostic device, and in the bus interface device, A second interrupt port for generating an interrupt from the micro diagnostic device to the arithmetic processing device, and a second interrupt communication area indicating an interrupt factor from the micro diagnostic device to the arithmetic processing device in the logging buffer. A micro-diagnostic device, which collects an abnormal status from the power control device via the power control interface when an abnormality occurs in the power supply device and stores the abnormal status in the logging buffer; The diagnostic device sets a power failure code in the second interrupt communication area A power source failure notifying means for generating an interrupt in the arithmetic processing unit via the second interrupt port, and the arithmetic processing unit receiving an interrupt from the micro-diagnostic device, and transmitting the interrupt to the second interrupt communication area. An information processing apparatus with a micro-diagnostic device, comprising: power failure blocking means for confirming that the power failure code has been set and starting blocking processing.

5. 4. The information processing apparatus with the micro diagnostic device according to 4, wherein a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device is provided, and the micro diagnostic device is operated from the power switch via the power switch interface. When the power-on instruction is received by the micro-diagnostic device, the power-on means for instructing the power-supply control device to turn on the power via the power-supply control interface, and the micro-diagnostic device includes the power switch. Upon receiving a power-off instruction from the power switch interface from the micro-diagnostic device, the micro-diagnostic device sets a blocking request code in the second interrupt communication area, and the arithmetic processing is performed via the second interrupt port. Blocking processing requesting means for generating an interrupt to the device, The device receives the interrupt from the micro-diagnostic device, confirms that the code of the blocking request is set in the second interrupt communication area, and starts the blocking process, and the processing unit is blocked. After the processing is completed, a power-off request code is set in the first interrupt communication area, and a power-off request means for generating an interrupt to the micro diagnostic device via the first interrupt port; and the micro diagnostic device. Receives an interrupt from the arithmetic processing unit, confirms that a power-off request code is set in the first interrupt communication area, and sends the power-off control device to the power-supply control unit via the power-supply control interface. A power-off means for instructing power-off and powering off the entire information processing apparatus except the peripheral bus to which the micro-diagnostic device is connected. Micro diagnostic apparatus with the information processing apparatus according to claim and.

6. In the information processing apparatus with the micro-diagnosis device according to the above 5, while the blocking process is being executed in the blocking unit, the arithmetic processing device outputs a code being blocked to the first interrupt communication area within a predetermined time interval. Set, and the blocking processing notification means for generating an interrupt to the micro diagnostic device and the micro diagnostic device receive the interrupt from the arithmetic processing device within a fixed time interval via the first interrupt port. When it is not possible to confirm that the code being blocked is set in the first interrupt communication area, the power control device is instructed to turn off the power via the power control interface, And a forced power-off means for turning off the power of the entire information processing apparatus except the peripheral bus to which the diagnostic apparatus is connected. With a cross-sectional device information processing apparatus.

7. The information processing device with a micro diagnostic device according to 5 or 6 above, further comprising a serial input / output port connected to the same peripheral bus as the micro diagnostic device and accessible from the arithmetic processing device and the micro diagnostic device. When the power of the entire apparatus is turned on, only the arithmetic processing unit can access the serial input / output port, and the power of the entire information processing apparatus except the peripheral bus to which the micro diagnostic apparatus is connected is cut off. The information processing apparatus with a micro-diagnostic device, characterized in that only the micro-diagnostic device has a serial input / output access control means that enables access to the serial input / output port.

8. 7. The information processing apparatus with a micro diagnostic device according to 7, wherein the micro diagnostic device has a power supply status display password in advance, and the power of the entire information processing device except the peripheral bus to which the micro diagnostic device is connected is turned on. It has a power status output means for checking the data input from the serial I / O port when disconnected and outputting the power status data to the serial I / O port if the data matches the power status display password. An information processing device with a micro-diagnostic device, characterized in that

9. In the information processing apparatus with the micro-diagnostic device according to 7 or 8, a power-on password is provided in advance in the micro-diagnostic device, and the power of the entire information-processing device except for the peripheral bus to which the micro-diagnostic device is connected is turned on. When disconnected, it checks the data input from the serial I / O port, and if it matches the power-on password, it instructs the power control device to turn on the power via the power control interface. And a console power-on means for powering on the entire information processing apparatus.

10. In the information processing apparatus with the micro-diagnosis device according to the above 9, a startup parameter area is provided in the logging buffer, and startup parameters are simultaneously input when a power-on password is input from the serial input / output port, and the startup parameter is set. A startup parameter setting means for setting the parameter area, a boot information area in which the startup parameter and boot debus type are set in the logging buffer, and the startup parameter read in the locking buffer, An information processing apparatus with a micro-diagnostic device, comprising: a boot unit that performs a boot process according to a boot information area.

11. The information processing device with a micro diagnostic device according to the above 10, wherein a dump switch interface for connecting a dump switch of the information processing device and the micro diagnostic device is provided, and the micro diagnostic device is provided from the dump switch via the dump switch interface. Receiving a dump instruction, a dump activation request code is set in the second interrupt communication area, and dump processing request means for generating an interrupt to the arithmetic processing unit via the second interrupt port; The arithmetic processing device receives an interrupt from the micro-diagnostic device, confirms that the code of the dump request is set in the second interrupt communication area, and has a dump means for starting the dump process. An information processing device with a micro diagnostic device.

12. 11. The information processing apparatus with the micro-diagnostic device according to 11, wherein the first means is provided in the dump means.
A dump start notification code for setting a dump start notification code in the interrupt communication area of the micro-diagnostic device via the first interrupt port; , A code indicating a dump restart in the startup parameter area when it is not possible to confirm that the code of the dump start notification is set in the first interrupt communication area after receiving the interrupt from the arithmetic processing unit And dump restart means for driving the system reset signal to reset the entire information processing device, and after the arithmetic processing unit releases the system reset, reads the startup parameter,
An information processing apparatus with a micro-diagnostic device, comprising: reset dump processing means for starting a dump when the code indicating the dump restart is set.

13. 13. The information processing device with a micro-diagnosis device according to any one of 5 to 12 above, which receives an external signal from the information processing device and issues a power-on instruction or a power-off instruction to the information processing device. And an unmanned operation control interface for connecting the micro diagnostic device to the micro diagnostic device, and the micro diagnostic device receives a power-on instruction from the unattended power supply control device via the unattended power supply control interface, the power supply to the power supply control device. An unattended power-on means for instructing power-on via a control interface and powering-on the entire information processing apparatus, and the micro-diagnostic device receiving a power-off instruction from the unattended power controller via the unattended power interface , The micro-diagnostic device stores the block request code in the second interrupt communication area. Sets, via the second interrupt port, the micro-diagnostic system with an information processing apparatus characterized by having a closing process request means for generating an interrupt to the processor.

14. The information processing device with a micro diagnostic device according to any one of 5 to 13 above, which is connected to the same peripheral bus as the micro diagnostic device and is accessible from the arithmetic processing device and the micro diagnostic device. The calendar clock that constantly updates and holds the time, and the logging completion means and the logging completion monitoring means access the calendar clock when writing data to the logging buffer and store the current time in the logging buffer. An information processing device with a micro-diagnostic device, comprising: time stamp means.

15. 15. The information processing apparatus with the micro diagnostic device according to the above 14, wherein a startup time area is provided in the logging buffer, and the entire information processing device except the peripheral bus to which the micro diagnostic device is connected is powered off. The micro diagnostic device compares the start-up time area and the calendar clock at regular time intervals, and when both times match, power is turned on to the power control device via the power control interface. And an unattended power-on means for turning on the power of the entire information processing apparatus.

16. 15. The information processing apparatus with the micro-diagnostic device according to 15, wherein a power-on factor area is provided in the logging buffer, and a power-on factor setting unit sets a power-on factor in the power-on factor area when power is turned on. An information processing device with a micro-diagnostic device, characterized in that

17. In the information processing device with the micro-diagnosis device according to the above 16, a watchdog timer count value area and a watchdog update area are provided in the logging buffer, and the arithmetic processing device stores a count value in the watchdog timer count value area. Set,
A watchdog timer start request means for setting a watchdog timer start request code in the first interrupt communication area and generating an interrupt to the micro diagnostic device via the first interrupt port; and the micro diagnostic device. Receives an interrupt from the arithmetic processing unit, confirms that the code of the watchdog timer start request is set in the first interrupt communication area, and then confirms that the code indicated by the watchdog timer counter is constant. At each interval, it is confirmed that the watchdog timer update area is updated by the arithmetic processing unit, and if it is updated, the watchdog timer update area is cleared. Set the code of the watchdog timer runout in the interrupt communication area of 2. Through the second interrupt port, the micro-diagnostic system with an information processing apparatus characterized by having a watch dog timer processing means for generating an interrupt to the processor.

18. 18. In the information processing device with the micro diagnostic device described in 17, the error bit of a watchdog timer runout is provided in the error information register, and if the micro diagnostic device is not updated within a preset time of the watchdog timer update area, the micro diagnostic device causes the error to occur. An information processing apparatus with a micro-diagnostic device, comprising: a run-out notifying unit for setting a corresponding bit of an information register and causing an interrupt to the arithmetic processing unit via the error information register.

19. 20. In the information processing device with the micro diagnostic device according to any one of 2 to 19, an individual peripheral bus reset signal line which is output from the micro diagnostic device and resets each peripheral bus except the peripheral bus to which the micro diagnostic device is connected The arithmetic processing unit sets a code of each peripheral bus reset request corresponding to each individual peripheral bus in the first interrupt communication area, and sets the code to the micro diagnostic device via the first interrupt port. An individual peripheral bus reset output request means for generating an interrupt and an interrupt from the arithmetic processing unit are received in the micro diagnostic device, and a code for each individual reset output request is set in the first interrupt communication area. Individual peripheral bus reset signal by driving the corresponding individual peripheral bus reset signal. Micro diagnostic apparatus with the information processing apparatus characterized by comprising a bus reset generation.

[0083]

As described above, in an information processing device of a class lower than that of a minicomputer, by connecting an inexpensive micro diagnostic device on the peripheral bus, it has been adopted in the information processing device of a class higher than that of the conventional minicomputer. It is possible to realize a function comparable to the conventional system controller dedicated to fault collection.

Further, this application field is wide, and it is possible to realize the function higher than that of the conventional system control device.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

[Fig. 2] Conventional configuration diagram

FIG. 3 is a flowchart of a logging means.

FIG. 4 is a flowchart of a logging completion notifying means.

[Figure 5] Contents of logging buffer

[Fig. 6] Details of the log area header section

[Figure 7] Details of the log area data section

FIG. 8 is a configuration diagram of an embodiment.

FIG. 9 is a flowchart of an external alarm device alarm output requesting means.

FIG. 10 is a flowchart of an external alarm device alarm output generating means.

FIG. 11 is a flowchart of system reset output requesting means.

FIG. 12 is a flowchart of system reset output generation means.

FIG. 13 is a flowchart of power failure logging means.

FIG. 14 is a flowchart of power failure notification means.

FIG. 15 is a flow chart of power failure blocking means.

FIG. 16 is a flowchart of power-on means.

FIG. 17 is a flowchart of a blocking process requesting unit.

FIG. 18 is a flowchart of the closing means.

FIG. 19 is a flow chart of power-off request means.

FIG. 20 is a flowchart of the power supply disconnecting means.

FIG. 21 is a flowchart of a blocking processing notification means.

FIG. 22 is a flowchart of forced power-off means.

FIG. 23 is a list of interrupt codes in the first communication area

FIG. 24 is a second communication area interrupt code list

[Figure 25] List of startup parameter codes

FIG. 26: Details of boot information area

FIG. 27: Details of startup time area

[Explanation of symbols]

1 system bus 2 arithmetic processing unit (EPU) 3 main memory unit (MEM) 4 bus interface unit (BIU) 5 error information register (EIR) 6 micro diagnostic unit (MDG) 7 logging buffer (LBF) 8 peripheral bus 9 calendar clock (TOD) 10 Serial input / output port (SIO) 11 System control unit (SCU) 12 Gateway (GW) 13 Peripheral control unit (PCU) 21 Error detection circuit in arithmetic processing unit 22 Interrupt signal from micro diagnostic device to arithmetic processing unit 31 main memory error detection circuit 41 bus interface device error detection circuit 42 first interrupt port 43 second interrupt port 51 system bus error detection circuit 52 error information register interrupt signal 61 error logging completion notifying means 62 external warning device 63 Interrupt signal from the arithmetic processing male value to the micro diagnostic device 64 System reset signal line 65 Power supply control device (PCM) 66 Power supply device (POW) 67 Power supply control interface 100 Console (CNL) 601 Power switch interface 602 Dump switch interface 603 Unmanned Operation controller interface 610 Power switch 620 Dump switch 630 Unattended operation controller (APU) 710 First interrupt communication area 720 Second interrupt communication area 730 Startup parameter area 740 Startup time area 750 Power-on factor area 760 Watchdog Timer count value area 765 Watchdog timer update area 770 Boot information area 780 Log area header 781 Effective record start address 82 valid record number 783 next record number is the log 790 the log data unit 791 log number 792 log time 793 logs code type 794 log record data length 795 data unit

Claims (5)

[Claims] 1. An arithmetic processing unit, a bus interface unit, and a main memory unit are connected by a system bus, and the bus interface unit has one or more peripheral buses, and one of the peripheral buses has a micro diagnostic function. In an information processing device to which a device is connected and an external warning device is connected to the micro-diagnostic device, the information processing device has a plurality of error detection circuits that output an error signal when an error is detected, It is connected to the same peripheral bus as the device, collects error signals detected by the error detection circuit, notifies the arithmetic processing device and the micro-diagnostic device as a logical sum of the error signals as an interrupt, the arithmetic processing device and the An error information register accessible from the micro diagnostic device and resettable from the arithmetic processing device; A non-volatile logging buffer connected to the same peripheral bus as the disconnection device and accessible from the arithmetic processing unit and the micro-diagnostic unit, and after the arithmetic processing unit receives an interrupt from the error information register An error logging unit that recognizes and collects detailed error information and stores the detailed error information in the logging buffer; a logging completion notifying unit that notifies the micro diagnostic device of logging completion from the arithmetic processing device; and the micro diagnostic device. After receiving the interrupt from the error information register, it is monitored that the notification by the logging completion notifying means is performed within a predetermined time, and when the logging completion is not performed within the predetermined time, the micro diagnostic device Accesses the error information register, stores the contents in the logging buffer, Micro diagnostic apparatus with the information processing apparatus characterized by having a logging completion monitoring means for generating a warning to tell device. 2. The information processing device with a micro diagnostic device according to claim 1, wherein the bus interface device includes a first interrupt port for generating an interrupt from the arithmetic processing device to the micro diagnostic device, and the logging buffer. A first interrupt communication area indicating an interrupt factor from the arithmetic processing device to the micro-diagnostic device is provided therein, and when the error logging unit or software detects a predetermined error in the system, External alarm alarm output requesting means for setting an external alarm alarm output code in one interrupt communication area, and generating an interrupt to the micro diagnostic device via the first interrupt port; and inside the micro diagnostic device. And receives an interrupt from the arithmetic processing unit, and an external alarm device is provided in the first interrupt communication area. Ensure that the code of the alarm output is set, the micro-diagnostic system with an information processing apparatus characterized by having an external alarm Alarm output generating means for outputting an alarm to the external alarm. 3. The information processing device with a micro diagnostic device according to claim 2, further comprising a system reset signal line which is output from the micro diagnostic device and resets the entire information processing device except the micro diagnostic device, A device for setting a system reset request code in the first interrupt communication area and generating an interrupt to the micro-diagnostic device via the first interrupt port; , Receives an interrupt from the arithmetic processing unit, confirms that the code of the system reset output request is set in the first interrupt communication area, and drives a system reset signal to operate the entire information processing apparatus. With a micro-diagnostic device characterized by having a system reset generating means for resetting Information processing device. 4. The information processing apparatus with a micro-diagnostic device according to claim 3, wherein a power supply control interface for connecting a plurality of power supply control devices for controlling a power supply device in the information processing device and the micro-diagnostic device, A second interrupt port in the bus interface device for generating an interrupt from the micro-diagnostic device to the arithmetic processing device; and a second interrupt port in the logging buffer showing an interrupt factor from the micro-diagnostic device to the arithmetic processing device. When an abnormality occurs in the power supply device, the micro-diagnostic device collects an abnormality status from the power supply control device via the power supply control interface and stores it in the logging buffer. The logging means and the micro-diagnostic device cause a power failure in the second interrupt communication area. And a power failure notification means for setting an interrupt code to the arithmetic processing unit via the second interrupt port, and the arithmetic processing unit receives an interrupt from the micro-diagnostic device, An information processing apparatus with a micro-diagnostic device, comprising: a power failure blocking means for confirming that the power failure code is set in the interrupt communication area and starting blocking processing. 5. The information processing apparatus with the micro diagnostic device according to claim 4, further comprising a power switch interface for connecting a power switch of the information processing device and the micro diagnostic device, wherein the micro diagnostic device is connected to the power switch. When a power-on instruction is received via the power switch interface, a power-on means for instructing the power control apparatus to turn on the power via the power control interface and turning on the power of the entire information processing apparatus; When the diagnostic device receives a power-off instruction from the power switch via the power switch interface, the micro-diagnostic device sets a blocking request code in the second interrupt communication area and sets the second interrupt port. Through the block processing requesting unit that causes an interrupt to the arithmetic processing unit via And a closing means for confirming that the arithmetic processing unit receives an interrupt from the micro-diagnostic device, sets a code of a closing request in the second interrupt communication area, and starts the closing process. After the processing unit completes the blocking process, a power-off request code is set in the first interrupt communication area and an interrupt request is issued to the micro-diagnostic device via the first interrupt port. And the micro-diagnostic device receives an interrupt from the arithmetic processing unit, confirms that a power-off request code is set in the first interrupt communication area, A power supply for instructing power off via a power control interface and powering off the entire information processing apparatus except the peripheral bus to which the micro-diagnostic device is connected Micro diagnostic apparatus with the information processing apparatus characterized by having a cross section.