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JPH0524671B2 - - Google Patents

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Publication number
JPH0524671B2
JPH0524671B2 JP58118526A JP11852683A JPH0524671B2 JP H0524671 B2 JPH0524671 B2 JP H0524671B2 JP 58118526 A JP58118526 A JP 58118526A JP 11852683 A JP11852683 A JP 11852683A JP H0524671 B2 JPH0524671 B2 JP H0524671B2
Authority
JP
Japan
Prior art keywords
charge
output
junction layer
charge detection
photoelectric conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58118526A
Other languages
Japanese (ja)
Other versions
JPS6010671A (en
Inventor
Tetsuo Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58118526A priority Critical patent/JPS6010671A/en
Publication of JPS6010671A publication Critical patent/JPS6010671A/en
Publication of JPH0524671B2 publication Critical patent/JPH0524671B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10Integrated devices
    • H10F39/12Image sensors
    • H10F39/15Charge-coupled device [CCD] image sensors
    • H10F39/153Two-dimensional or three-dimensional array CCD image sensors

Landscapes

  • Solid State Image Pick-Up Elements (AREA)

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、光電変換素子と、この光電変換素子
の信号電荷を転送する電荷転送手段と、転送され
た信号電荷を電圧信号としてとり出す出力回路
と、入射光を遮蔽するとともに電気遮蔽する導電
性光遮蔽膜とを具えた固体撮像装置に関する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a photoelectric conversion element, a charge transfer means for transferring signal charges of the photoelectric conversion element, and an output circuit for extracting the transferred signal charges as a voltage signal. and a conductive light shielding film that shields incident light and electrically shields it.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来の固体撮像装置を第1図、第2図に示す。
この固体撮像装置は、複数の光電変換素子1と、
この光電変換素子1の信号電荷を転送する電荷転
送装置2と、この電荷転送装置2により転送され
た信号電荷を出力電圧としてとり出す出力回路3
を有しており、光電変換素子1以外の部分は光シ
ールド膜4で遮蔽されている。この光シールド膜
4はアルミニウム等の導電性物質の膜として形成
され、電磁シールドの役割も果たしている。信号
電荷の転送経路をできるだけ短くする必要がある
ため、出力回路3は光電変換素子1の近くに配さ
れている。このため出力回路3も光シールド膜4
でおおわれている。
A conventional solid-state imaging device is shown in FIGS. 1 and 2.
This solid-state imaging device includes a plurality of photoelectric conversion elements 1,
A charge transfer device 2 that transfers the signal charge of this photoelectric conversion element 1, and an output circuit 3 that extracts the signal charge transferred by this charge transfer device 2 as an output voltage.
The portion other than the photoelectric conversion element 1 is shielded by a light shield film 4. This optical shield film 4 is formed as a film of a conductive material such as aluminum, and also plays the role of an electromagnetic shield. Since it is necessary to make the signal charge transfer path as short as possible, the output circuit 3 is arranged near the photoelectric conversion element 1. Therefore, the output circuit 3 also has a light shield film 4.
covered with

この固体撮像装置の出力回路3は第2図aに示
すような断面構造をしている。電荷転送装置2の
転送電極8は半導体基板5の上に酸化膜24をは
さんで形成されている。出力ゲート電極7は転送
電極8に隣接して形成され、電荷転送装置2と出
力回路3との間に障壁電位を形成する。リセツト
電極9は、電荷検出接合層6と所定電位の接合層
10とを電気的に接続し、電荷検出接合層6を所
定電位にリセツトするためのものである。導電線
11は電荷検出接合層6の電位ソースホロワ回路
の入力ゲート12に接続するものである。ソース
ホロワ回路は、この入力ゲート12と、電源電圧
に設定されたドレイン接合層13と、負荷トラン
ジスタのソース接合層16と、ゲート15と、出
力電圧をとり出す出力接合層14とを有してい
る。導電性の光シールド膜4は絶縁層24の上を
おおうようにして形成され、基板電圧に設定され
ている。
The output circuit 3 of this solid-state imaging device has a cross-sectional structure as shown in FIG. 2a. The transfer electrode 8 of the charge transfer device 2 is formed on the semiconductor substrate 5 with an oxide film 24 interposed therebetween. The output gate electrode 7 is formed adjacent to the transfer electrode 8 and forms a barrier potential between the charge transfer device 2 and the output circuit 3. The reset electrode 9 is for electrically connecting the charge detection bonding layer 6 and the bonding layer 10 at a predetermined potential, and resetting the charge detection bonding layer 6 to a predetermined potential. The conductive line 11 is connected to the input gate 12 of the potential source follower circuit of the charge detection junction layer 6. The source follower circuit has this input gate 12, a drain junction layer 13 set to the power supply voltage, a source junction layer 16 of the load transistor, a gate 15, and an output junction layer 14 for taking out the output voltage. . The conductive light shield film 4 is formed to cover the insulating layer 24 and is set to a substrate voltage.

この固体撮像装置の電荷検出の動作を説明する
と、リセツト電極9をオンすると第2図bに示す
ようにリセツト電極9下の電位は破線25で示す
ようになり、電荷検出接合層6の電位は接合層1
0の電位27と同じ電位になる。リセツト電極9
をオフするとリセツト電極9下の電位は破線26
で示すようになり、電荷検出接合層6はフローテ
イング状態となる。この状態で電荷転送装置2で
転送された電荷29が出力ゲート電極7の障壁電
位30を超えて流れ込み電荷検出接合層6の電位
を実線28のように変化させる。この電位変化を
ソースホロワ回路に入力して出力を得る。
To explain the charge detection operation of this solid-state imaging device, when the reset electrode 9 is turned on, the potential under the reset electrode 9 becomes as shown by the broken line 25 as shown in FIG. 2b, and the potential of the charge detection junction layer 6 becomes Bonding layer 1
It becomes the same potential as the potential 27 of 0. Reset electrode 9
When turned off, the potential under the reset electrode 9 becomes the broken line 26.
The charge detection junction layer 6 is in a floating state as shown in FIG. In this state, the charge 29 transferred by the charge transfer device 2 exceeds the barrier potential 30 of the output gate electrode 7 and flows in, changing the potential of the charge detection junction layer 6 as shown by a solid line 28. This potential change is input to the source follower circuit to obtain an output.

この電荷検出接合層6の電位変化Vsは、電荷
検出接合層6の有する全静電容量CTと転送され
た電荷量Qsで定まり、Vs=Qs/CTであらわされ
る。したがつて検出感度を高くするためには、全
静電容量CTを充分小さくする必要がある。電荷
検出接合層6の有する全静電容量CTは半導体基
板5との間の静電容量CFRと、出力ゲート電極7
との間の静電容量CFOと、リセツト電極9との間
の静電容量CFRと、光シールド膜4との間の静電
容量CFL1と、導電線11の対地容量CFL2と、入力
ゲート12の対地容量CG1との総和で表わされる。
すなわち、 CT=CFS+CFO+CFR+CFL1+CFL2+CG1 …(1) となる。ここでCFL1とCFL2とCG1の値は大きく、
このために電荷検出感度を十分大きくすることは
できなかつた。また出力接合層14の出力線の対
地容量CLOも大きく、等価的に出力負荷容量が増
加し周波数応答が劣化するという問題があつた。
The potential change Vs of the charge detection junction layer 6 is determined by the total capacitance CT of the charge detection junction layer 6 and the amount of transferred charge Qs, and is expressed as Vs=Qs/ CT . Therefore, in order to increase the detection sensitivity, it is necessary to make the total capacitance CT sufficiently small. The total capacitance C T of the charge detection junction layer 6 is equal to the capacitance C FR between the charge detection junction layer 6 and the semiconductor substrate 5 and the output gate electrode 7 .
The capacitance C FO between , the capacitance C FR between the reset electrode 9 , the capacitance C FL1 between the light shield film 4 , and the ground capacitance C FL2 of the conductive wire 11 , It is expressed as the sum total with the ground capacitance C G1 of the input gate 12.
That is, C T =C FS +C FO +C FR +C FL1 +C FL2 +C G1 (1). Here, the values of C FL1 , C FL2 , and C G1 are large,
For this reason, it has not been possible to sufficiently increase the charge detection sensitivity. Furthermore, the ground capacitance C LO of the output line of the output junction layer 14 is also large, resulting in the problem that the output load capacity equivalently increases and the frequency response deteriorates.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情を考慮してなされたもので、
電荷検出感度が高く、周波数応答のよい固体撮像
装置を提供することを目的とする。
The present invention was made in consideration of the above circumstances, and
An object of the present invention is to provide a solid-state imaging device with high charge detection sensitivity and good frequency response.

〔発明の概要〕[Summary of the invention]

この目的を達成するために本発明による固体撮
像装置は、導電性光遮蔽膜の光電変換素子上の領
域に開口部を設けるとともに、出力回路上の少な
くとも一部の領域に開口部を設けることを特徴と
する。
In order to achieve this object, the solid-state imaging device according to the present invention includes an opening in the area above the photoelectric conversion element of the conductive light shielding film, and an opening in at least a part of the area above the output circuit. Features.

〔発明の実施例〕 本発明の第1の実施例による固体撮像装置を第
3図に示す。この固体撮像装置は、複数の光電変
換素子1と、この光電変換素子1の信号電荷を転
送する電荷転送装置2と、この電荷転送装置2に
より転送された信号電荷を出力電圧としてとり出
す出力回路3とを有しており、光電変換素子1上
に開口部を有する導電性の光シールド膜4でおお
われている。本実施例では出力回路3上の領域に
も光シールド膜4に開口部30を設けている点が
特徴である。
[Embodiment of the Invention] A solid-state imaging device according to a first embodiment of the invention is shown in FIG. This solid-state imaging device includes a plurality of photoelectric conversion elements 1, a charge transfer device 2 that transfers signal charges of the photoelectric conversion elements 1, and an output circuit that extracts the signal charges transferred by the charge transfer device 2 as an output voltage. 3, and is covered with a conductive light shield film 4 having an opening on the photoelectric conversion element 1. This embodiment is characterized in that an opening 30 is provided in the light shield film 4 also in the region above the output circuit 3.

この出力回路3を第4図、第5図に詳細に示
す。第4図はこの出力回路3の平面構成を示し、
第5図は断面構成を示す。ただし第5図の断面構
成は本実施例を理解しやすくするため変形してあ
り、実際の断面とは少し異なるところがある。本
実施例の出力回路3は、フローテイング接合型の
電荷検出回路と、2段構成のソースホロワ回路と
からなつている。出力ゲート電極7は転送電極8
に隣接して形成され障壁電位を形成する。リセツ
ト電極9は、電荷検出接合層6と所定電位の接合
層10とを電気的に接続し、電荷検出接合層6を
所定電位にリセツトするためのものである。導電
線11は電荷検出接合層6の電位をソースホロワ
回路の入力ゲート12に接続するものである。ソ
ースホロワ回路は、2段構成である。第1段目の
ソースホロワ回路は、ドレイン接合層10と、入
力ゲート12と、出力接合層14と、負荷トラン
ジスタのソース接合層32とゲート31とで構成
されており、第2段目のソースホロワ回路は、ド
レイン接合層10と、入力ゲート34と、出力接
合層35と、負荷トランジスタのソース接合層3
2とゲート31とで構成されている。第1段目の
ソースホロワ回路の出力接合層14と第2段目の
ソースホロワ回路の入力ゲート34は導電線36
で接続されている。導電線45はソースホロワ回
路のソース接合層32を基準電位とするので、通
常半導体基板5の電位に接地される。導電線46
はソースホロワ回路の出力、すなわち出力回路3
の出力をとりだすものである。導電線47は電源
電圧を供給するものである。
This output circuit 3 is shown in detail in FIGS. 4 and 5. FIG. 4 shows the planar configuration of this output circuit 3,
FIG. 5 shows a cross-sectional configuration. However, the cross-sectional configuration in FIG. 5 has been modified to make it easier to understand this embodiment, and there are some differences from the actual cross-section. The output circuit 3 of this embodiment consists of a floating junction type charge detection circuit and a two-stage source follower circuit. Output gate electrode 7 is transfer electrode 8
is formed adjacent to and forms a barrier potential. The reset electrode 9 is for electrically connecting the charge detection bonding layer 6 and the bonding layer 10 at a predetermined potential, and resetting the charge detection bonding layer 6 to a predetermined potential. A conductive line 11 connects the potential of the charge detection junction layer 6 to the input gate 12 of the source follower circuit. The source follower circuit has a two-stage configuration. The first stage source follower circuit is composed of a drain junction layer 10, an input gate 12, an output junction layer 14, a source junction layer 32 and a gate 31 of a load transistor, and a second stage source follower circuit is the drain junction layer 10, the input gate 34, the output junction layer 35, and the source junction layer 3 of the load transistor.
2 and a gate 31. The output junction layer 14 of the first stage source follower circuit and the input gate 34 of the second stage source follower circuit are connected to the conductive wire 36.
connected with. Since the conductive line 45 uses the source junction layer 32 of the source follower circuit as a reference potential, it is normally grounded to the potential of the semiconductor substrate 5. Conductive wire 46
is the output of the source follower circuit, that is, output circuit 3
It extracts the output of The conductive wire 47 supplies power supply voltage.

導電性の光シールド膜4は、従来のように全面
をおおわずに開口部100を有している。本実施
例では開口部100は、出力回路3のうちフロー
テイング接合型の電荷検出回路と第1段目のソー
スホロワ回路の一部の領域の上部に設けられてい
る。具体的には、出力ゲート電極7の一部と、電
荷検出接合層6と、接合層10と、リセツト電極
9の一部と、導電線11と、入力ゲート12の上
部である。
The conductive light shield film 4 does not cover the entire surface as in the conventional case, but has an opening 100. In this embodiment, the opening 100 is provided above a part of the floating junction type charge detection circuit and the first stage source follower circuit in the output circuit 3. Specifically, they are a part of the output gate electrode 7, the charge detection junction layer 6, the junction layer 10, a part of the reset electrode 9, the conductive line 11, and the upper part of the input gate 12.

このようにして本実施例では光シールド膜4の
一部が除去されているため、電荷検出接合層6の
有する全静電容量CTは、半導体基板との間の静
電容量CFSと、出力ゲート電極7との間の静電容
量CFOと、リセツト電極9との間の静電容量CFR
と、入力ゲート12が有する静電容量CFDとの和
であらわされる。すなわち、 CT=CFS+CFO+CFR+CFD …(2) となる。すなわち、従来の(1)式と比較すればわか
るように、対光シールド膜との間の静電容量
CFL1,CFL2がなくなり、静電容量CTは小さくな
る。したがつて、電荷検出接合層6の電位変化
Vsと転送された電荷量Qsとの比である電荷検出
感度Vs/Qs=1/CTは、非常に高くなる。
In this way, in this embodiment, a part of the optical shield film 4 is removed, so that the total capacitance C T of the charge detection junction layer 6 is equal to the capacitance C FS between the charge detection junction layer 6 and the semiconductor substrate. Capacitance C FO between output gate electrode 7 and capacitance C FR between reset electrode 9
and the capacitance C FD of the input gate 12. That is, CT = C FS + C FO + C FR + C FD (2). In other words, as can be seen by comparing with the conventional equation (1), the capacitance between the light shielding film and
C FL1 and C FL2 disappear, and the capacitance C T becomes smaller. Therefore, the potential change of the charge detection junction layer 6
The charge detection sensitivity Vs/Qs=1/ CT , which is the ratio between Vs and the transferred charge amount Qs, becomes very high.

本実施例の動作を説明すると、リセツト電極9
をオンすると、リセツト電極9下の電位は高くな
つて、電荷検出接合層6の電位は接合層10の電
位と同じになる。リセツト電極9をオフすると、
リセツト電極9下の電位は低くなり、電荷検出接
合層6はフローテイング状態となる。この状態で
電荷検出装置からの転送電荷が出力ゲート電極7
の障壁電位を超えて流れ込み電荷検出接合層6の
電位を変化させる。この電位変化Vsを2段構成
のソースホロワ回路で検出する。前述したように
本実施例では電荷検出接合層6の全静電容量CT
が小さいので、電位変化Vsは転送電荷Qsに対し
て大きくなり、検出感度が高くなる。
To explain the operation of this embodiment, the reset electrode 9
When turned on, the potential under the reset electrode 9 becomes high, and the potential of the charge detection junction layer 6 becomes the same as the potential of the junction layer 10. When the reset electrode 9 is turned off,
The potential under the reset electrode 9 becomes low, and the charge detection junction layer 6 enters a floating state. In this state, the charge transferred from the charge detection device is transferred to the output gate electrode 7.
The potential of the inflow charge detection junction layer 6 is changed beyond the barrier potential of . This potential change V s is detected by a two-stage source follower circuit. As mentioned above, in this embodiment, the total capacitance C T of the charge detection junction layer 6
is small, the potential change Vs becomes larger than the transferred charge Qs, and the detection sensitivity becomes higher.

なお、光シールド膜4がないため、入射光によ
り、電荷検出接合層6、接合層10と半導体基板
5とで構成されるPn接合で光電変換され電荷が
発生するが、転送電荷の検出とリセツトとを例え
ば1MHz以上の高速で周期動作させればこの電荷
をほとんど無視することができるので問題はな
い。
Note that since there is no light shield film 4, incident light causes photoelectric conversion to occur at the Pn junction consisting of the charge detection bonding layer 6, the bonding layer 10, and the semiconductor substrate 5, and charges are generated; however, the transfer charge cannot be detected and reset. If this is operated periodically at a high speed of 1 MHz or higher, for example, this charge can be almost ignored, so there is no problem.

本発明の第2の実施例による固体撮像装置の出
力回路3を第6図第7図に示す。本実施例は第1
の実施例と光シールド膜4の開口部101の形状
が異なる。すなわち第1の実施例における開口部
101よりも、広い領域の光シールド膜4が除去
されている。具体的には、出力ゲート7の一部
と、電荷検出接合層6と、接合層10と、リセツ
ト電極9の一部と、導電線11との上部の領域に
加えて、第1段目のソースホロワ回路の出力接合
層14と第2段目のソースホロワ回路の入力ゲー
ト34とを接続する導電線36と、第2段目のソ
ースホロワ回路の入力ゲート36と出力接合層3
5との上部の領域の光シールド膜4が除去されて
いる。本実施例では、静電容量CFL1,CFL2に加え
て、出力接合層14の出力導電線36の対地容量
CLOもなくなることになる。したがつて電荷検出
感度が高くなるとともに、静電容量10の存在の
ために劣化していた周波数応答が改善される。
An output circuit 3 of a solid-state imaging device according to a second embodiment of the present invention is shown in FIGS. 6, 7, and 7. This example is the first
The shape of the opening 101 of the light shield film 4 is different from that of the embodiment. That is, a wider area of the light shield film 4 is removed than the opening 101 in the first embodiment. Specifically, in addition to a part of the output gate 7, the charge detection junction layer 6, the junction layer 10, a part of the reset electrode 9, and the area above the conductive line 11, the first stage A conductive wire 36 connecting the output junction layer 14 of the source follower circuit and the input gate 34 of the second stage source follower circuit, and the input gate 36 of the second stage source follower circuit and the output junction layer 3
The light shielding film 4 in the upper region with 5 has been removed. In this embodiment, in addition to the capacitances C FL1 and C FL2 , the ground capacitance of the output conductive wire 36 of the output junction layer 14 is
CLO will also be eliminated. Therefore, the charge detection sensitivity is increased, and the frequency response, which has been degraded due to the presence of the capacitance 10, is improved.

なお、第8図は、第4図から第7図に示す出力
回路の等価回路である。第1の実施例におけるよ
うに開口部を設ければ、参照番号61で示す静電容
量CFL(=CFL1+CFL2)がなくなるため検出感度が
向上することがわかる。また第2の実施例におけ
るように開口部を設ければ、さらに参照番号62で
示す静電容量CLOがなくなるので周波数応答が改
善することがわかる。
Note that FIG. 8 is an equivalent circuit of the output circuits shown in FIGS. 4 to 7. It can be seen that if an opening is provided as in the first embodiment, the capacitance C FL (=C FL1 +C FL2 ) indicated by reference numeral 61 is eliminated, so that the detection sensitivity is improved. Furthermore, it can be seen that if an opening is provided as in the second embodiment, the capacitance C LO indicated by reference numeral 62 is further eliminated, so that the frequency response is improved.

以上の実施例は出力回路がフローテイング接合
形の検出回路であつたが、フローテイングゲート
形あるいはその他の容量蓄積形検出回路の場合に
も適用できる。また固体撮像装置の他の回路上の
光遮蔽膜を除けば、その回路の周波数応答を改善
できる。
In the above embodiments, the output circuit is a floating junction type detection circuit, but the present invention can also be applied to a floating gate type or other capacitance storage type detection circuit. Furthermore, by removing the light shielding film on other circuits of the solid-state imaging device, the frequency response of that circuit can be improved.

〔発明の効果〕〔Effect of the invention〕

以上の通り、本発明によれば導電性光遮蔽膜の
光遮蔽機能を損うことなく電荷検出感度の高い出
力回路を有する固体撮像装置を実現できる。また
光遮蔽膜を除去する領域により周波数応答を改善
することができる。
As described above, according to the present invention, a solid-state imaging device having an output circuit with high charge detection sensitivity can be realized without impairing the light shielding function of the conductive light shielding film. Furthermore, the frequency response can be improved by removing the light shielding film from the region.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の固体撮像装置の平面図、第2図
aは同固体撮像装置の出力回路の断面図、第2図
bは同出力回路の動作を示すポテンシヤル図、第
3図は本発明の第1の実施例による固体撮像装置
の平面図、第4図は同固体撮像装置の出力回路の
平面図、第5図は同出力回路の断面図、第6図は
本発明の第2の実施例による固体撮像装置の出力
回路の平面図、第7図は同出力回路の断面図、第
8図は同出力回路の回路図である。 1…光電変換素子、2…電荷転送装置、3…出
力回路、4…光シールド膜、5…半導体基板、6
…電荷検出接合層、7…出力ゲート電極、8…転
送電極、9…リセツト電極、10…接合層、11
…導電線、12…入力ゲート、13…ドレイン接
合層、14…出力接合層、15…ゲート、16…
ソース接合層、24…絶縁層、31…ゲート、3
2…ソース接合層、34…入力ゲート、35…出
力接合層、36…導電線、100…開口部、10
1…開口部。
FIG. 1 is a plan view of a conventional solid-state imaging device, FIG. 2a is a sectional view of an output circuit of the solid-state imaging device, FIG. 2b is a potential diagram showing the operation of the output circuit, and FIG. 3 is a diagram of the present invention. FIG. 4 is a plan view of the output circuit of the solid-state imaging device according to the first embodiment of the invention, FIG. 5 is a sectional view of the output circuit, and FIG. FIG. 7 is a plan view of the output circuit of the solid-state imaging device according to the embodiment, FIG. 7 is a sectional view of the output circuit, and FIG. 8 is a circuit diagram of the output circuit. DESCRIPTION OF SYMBOLS 1... Photoelectric conversion element, 2... Charge transfer device, 3... Output circuit, 4... Light shield film, 5... Semiconductor substrate, 6
... Charge detection junction layer, 7... Output gate electrode, 8... Transfer electrode, 9... Reset electrode, 10... Bonding layer, 11
...Conductive line, 12...Input gate, 13...Drain junction layer, 14...Output junction layer, 15...Gate, 16...
Source junction layer, 24... Insulating layer, 31... Gate, 3
2... Source junction layer, 34... Input gate, 35... Output junction layer, 36... Conductive line, 100... Opening, 10
1...Opening.

Claims (1)

【特許請求の範囲】 1 入射光に応じた信号電荷を発生する複数の光
電変換素子と、 これらの光電変換素子により発生された信号電
荷を転送する電荷転送手段と、 この電荷転送手段により転送された信号電荷を
検出する電荷検出部及びこの電荷検出部の検出信
号を増幅して電圧信号としてとり出す増幅部を有
する出力回路と、 入射光を遮蔽するとともに電気遮蔽する導電性
光遮蔽膜と、 を備え、前記導電性光遮蔽膜は、前記光電変換素
子上の領域に開口部を有するとともに前記出力回
路上の領域のうち少なくとも電荷検出部上の領域
に開口部を有することを特徴とする固体撮像装
置。
[Claims] 1. A plurality of photoelectric conversion elements that generate signal charges according to incident light, a charge transfer means that transfers the signal charges generated by these photoelectric conversion elements, and a charge transfer means that transfers the signal charges generated by the photoelectric conversion elements. an output circuit having a charge detection section that detects a signal charge detected by the charge detection section and an amplification section that amplifies the detection signal of the charge detection section and takes it out as a voltage signal; a conductive light shielding film that shields incident light and electrically shields it; , wherein the conductive light shielding film has an opening in a region above the photoelectric conversion element and has an opening in at least a region above the charge detection section among the regions above the output circuit. Imaging device.
JP58118526A 1983-06-30 1983-06-30 Solid state image sensor Granted JPS6010671A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58118526A JPS6010671A (en) 1983-06-30 1983-06-30 Solid state image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58118526A JPS6010671A (en) 1983-06-30 1983-06-30 Solid state image sensor

Publications (2)

Publication Number Publication Date
JPS6010671A JPS6010671A (en) 1985-01-19
JPH0524671B2 true JPH0524671B2 (en) 1993-04-08

Family

ID=14738784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58118526A Granted JPS6010671A (en) 1983-06-30 1983-06-30 Solid state image sensor

Country Status (1)

Country Link
JP (1) JPS6010671A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63292286A (en) * 1987-05-25 1988-11-29 Matsushita Electric Ind Co Ltd character recognition device
JPS63312671A (en) * 1987-06-15 1988-12-21 Nec Corp Charge transfer image sensor
JPH01119884A (en) * 1987-11-02 1989-05-11 Matsushita Electric Ind Co Ltd Character recognizing device
JP2751376B2 (en) * 1989-04-27 1998-05-18 凸版印刷株式会社 Solid-state imaging device
JPH05304280A (en) * 1992-04-27 1993-11-16 Mitsubishi Electric Corp Semiconductor integrated circuit device
JP5645513B2 (en) * 2010-07-07 2014-12-24 キヤノン株式会社 Solid-state imaging device and imaging system
JP6494539B2 (en) * 2016-02-02 2019-04-03 三菱電機株式会社 Solid-state imaging device and manufacturing method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5645086A (en) * 1979-09-21 1981-04-24 Hitachi Ltd Photosensor
JPS5869176A (en) * 1981-10-20 1983-04-25 Fuji Photo Film Co Ltd solid-state imaging device

Also Published As

Publication number Publication date
JPS6010671A (en) 1985-01-19

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