JPH05207407A - Electronic still camera device - Google Patents

Abstract

PURPOSE:To confirm whether or not data transfer with a memory card is correctly implemented by providing an error check means writing/reading dummy data prior to data exchange with a recording medium so as to check a data transfer error to the camera device. CONSTITUTION:The device consists of a camera main body and a memory card attachable to/detachable from the camera main body. A memory area comprising lots of memories loaded to the memory card is roughly divided into a dummy data area 27 used for writing/reading of the dummy data, a card header area 28 in which data provided specifically to the memory card itself, a directory area 29 storing a start address 29a and an end address 29b of the area in which picture data are stored, and a picture data area 30 in which picture data are actually recorded. Then write/read of the dummy data are implemented just before write/read in the image pickup operation to confirm whether or not data transfer is correctly implemented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic still camera device using a semiconductor memory element as a storage medium.

[0002]

2. Description of the Related Art Currently, an electronic photographic system capable of instantly viewing a photographed image by converting an optical image into an electric signal and displaying the image on a television receiver without using a silver salt film as a recording medium. Has been commercialized. However, these use a magnetic material such as a floppy disk as a storage medium, and the analog image is recorded on this rotating medium, so that the image quality is unstable, and the image is deteriorated when copied or edited. In order to make up for these drawbacks, a digital electronic still camera device for digitally recording image data on a memory card equipped with a semiconductor memory device has been devised and developed.

In this electronic still camera device, a memory card, which is a storage medium, is mounted by, for example, the Japan Electronic Industry Development Association (JEIDA) IC memory card guideline Ver. As shown in 4, the detection is performed by electrically connecting the pin for card detection and the main body.
(Some do not specify card detection. For example,
JEIDA IC Memory Card Guidelines Ver. Two
However, if you use a compliant memory card) However, the correct physical connection of the memory card detection pin does not guarantee that the data transfer is error free. If the contact of other terminals is bad, the data cannot be read / written correctly, but it cannot be confirmed by the conventional method.

[0004]

As described above, the conventional electronic still camera device confirms only the mounting of the memory card and does not guarantee error-free data transfer. Therefore, data may not be recorded due to poor contact at the contacts of the memory card.

The present invention has been made in view of the above circumstances, and an object thereof is to provide an electronic still camera device for confirming whether data transfer with a memory card is correctly performed.

[0006]

To achieve the above object, in an electronic still camera device of the present invention, a recording medium having a dummy data writing / reading area in a recording area, and this recording medium are provided. Before the data exchange, the dummy data writing / reading is performed, and an error detecting means for detecting a data transfer error is provided.

Further, the error detecting means is capable of detecting the mounting of the memory card by writing / reading the dummy data.

[0008]

In the electronic still camera device configured as described above, it is possible to prevent the data transfer failure due to the contact failure of the terminals of the memory card. Further, since it can be used for detecting the mounting of the memory card, the memory card detection pin is not required, and the number of pins of the memory card can be reduced.

[0009]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a schematic perspective view of an electronic still camera according to an embodiment of the present invention. The electronic still camera shown in FIG. 1 includes a camera body 1 and a memory card 2 which is detachable from the body 1. The camera body 1 includes a lens barrel 3, a finder 4, a shutter 5 and the like, as well as an ordinary camera, and an opening 6 into which the memory card 2 is inserted. The memory card 2 functions as a film used in a normal camera.

FIG. 2 is a block diagram for explaining the structure of the camera body 1.

In the figure, a lens denoted by reference numeral 7 is arranged in the lens barrel 3, and is projected on a CCD 8 arranged on the back surface of this lens 7. The CCD 8 outputs an analog electric signal according to the lightness and darkness of the projected image. The electric signal is converted into a digital signal by the A / D converter 9 and then the band compression circuit. 1
Bandwidth is compressed by 0 and input to the memory card control circuit 11.

Further, reference numeral 36 is a microphone arranged outside the main body 1, and a voice signal inputted from the microphone 36 is passed through an A / D converter 37 and a digital voice circuit 38 to the memory card control circuit 11 Entered in.
A CPU denoted by reference numeral 12 performs overall control of the entire electronic still camera including the memory card 2. For example, the CPU 8 controls the drive of the CCD 8 via the drive system 13.
The memory card control circuit 11 and the memory card 2 are also controlled.

FIG. 3 shows a memory card control circuit 11
FIG. 3 is a block diagram for explaining the configuration of the and surroundings.

In the figure, reference numeral 14 is a band compression circuit 1.
0 or an I / O control circuit for controlling input / output between the CPU 12 and the memory card 2 in order to exchange data signals between them.

That is, the data input terminal indicated by reference numeral 15 is for inputting the data signal relating to the image from the band compression circuit 10, and the data input terminal indicated by reference numeral 39 is the data signal relating to the voice from the digital voice circuit 38. Are input to the memory card 2 from the data input / output terminal 16 via the I / O control circuit 14. On the other hand, the data signal from the memory card 2 input from the data input / output terminal 16 is the I / O control circuit 1
It is sent to the CPU 12 via 4.

Here, the CPU 12 and the I / O control circuit 14
A memory 17 is inserted on the data line between the and, and an interface for the data transfer rate is provided between them. That is, since the data signal input / output to / from the CPU 12 is a serial signal and is low speed, while the data signal input / output to / from the I / O control circuit 14 is a parallel signal and is high speed, the memory 17 stores these signals. Converts a serial signal or parallel signal to a parallel signal or serial signal.

Reference numeral 18 is an address generating circuit. The address generating circuit 18 sequentially generates an address signal corresponding to an initial address value designated by the CPU 12, hereinafter, this value is sequentially incremented by "1". This address signal is sent from the address output terminal 19 to the memory card 2.

Further, reference numeral 20 is a timing signal generating circuit, and this timing signal generating path 20 is a CPU 12
I / O control circuit 14, memory 1 based on the designation from
7. A predetermined timing signal is generated from the address generation circuit 18 or the timing output terminal 21 to the memory card 2.

FIG. 4 is a schematic diagram of the memory card 2. This memory card 2 has a large number of RAMs or E2PROMs or other electrically rewritable memory 23 on a substrate 22.
, And the connection terminals 24 connected to the camera body 1 are arranged in a row at one end.

FIG. 5 is a block diagram for explaining the structure of such a memory card 2. Reference numeral 24a is the main body 1
A data input / output terminal connected to the terminal 16 on the side,
The data input / output terminal 24 a is connected to each data input / output terminal of the memory 23 via the I / O control circuit 25. Further, reference numeral 24b is an address input terminal connected to the terminal 19 on the main body 1 side, and the address input terminal 24b is connected to each address input terminal of the memory 23 and the chip select circuit 26.

Further, 24c is a timing input terminal connected to the terminal 21 on the main body 1 side, and the timing input terminal 24c is connected to each timing input terminal of the memory 23. The chip select circuit 26 selects a predetermined memory to be operated according to an address signal from the main body 1 side.

FIG. 6 is a memory map for explaining a memory area composed of a large number of memories 23 mounted on the memory card 2.

As shown in the figure, this memory area includes a dummy data area 27 used for writing / reading dummy data, a card header area 28 in which data unique to the memory card 2 itself is recorded, and each image data. A directory area 29 in which a start address 29a and an end address 29b of an area in which is recorded are stored,
4 of the image data area 30 where each image data is actually recorded
Broadly divided into areas.

The dummy data area 27 is prepared for writing / reading dummy data. This area is 2
7 is provided at the head of the memory area regardless of the memory size of the memory card 2.

The card header area 28 is a card No. in which data unique to the memory card 2 itself is recorded. An area 28a, a residual memory capacity area 28b in which remaining amount data of an area in which data can be written in the image data area 30 is recorded, a captured image number area 28c in which data of the number of captured images of the memory card 2 is recorded, and an image data area 30.
In the image data final address area 28d in which the data of the last used address of the image data is recorded.

The data areas 30 are recorded in 1-screen data areas 30a ... Which are divided for each screen, and these 1-screen data areas 30a are images in which image header areas 30b and actual image data are recorded. The data area 30c. The image header area 30b includes an information classification area 30d that indicates what type of data is recorded in the image data area 30c of the screen data area 30a, for example, data such as images and sounds, and how the image data area 30c is stored. Image processing methods such as NTSC,
A method area 30e indicating whether data is recorded by a method such as CCIR, a screen number area 30f in which screen number data is recorded, an image quality mode area 30g set by the compression ratio of the band compression circuit 10, a recording time Time area 30h to 30m in which the data of the above is recorded, title area 3 in which the data of the title of the recorded image is recorded
It consists of 0n.

Next, the photographing operation of the electronic still camera thus constructed will be described.

First, when a memory card is mounted in the camera body 1 through the opening 6, the terminals 16, 19, 21 of the memory card control circuit 11 in the body 1 and the terminals 24a, 24b, 24c in the memory card 2 are respectively connected. Connected.

Thereafter, the CPU 12 causes the timing signal generating circuit 20 to generate a signal for reading data from the memory 23, and causes the address generating circuit 18 to generate an address in the card header area 28.

As a result, a signal relating to the data in the card header area 28 of the memory 23 of the memory card 2 is transferred to the CPU 12 via the I / O control circuit 25, the I / O control circuit 14 and the memory 17, and the CPU 12 Whether the image data can be written from the data of the card header area 28 to the memory 23 of the memory card 2 is determined by writing the next image data from which address (start address) to which address (end address) in the memory. Confirm whether it is good, etc.

When the image data can be written, the CPU 12 sets the start address in the address generation circuit 18. As a result, the camera is in a state of waiting for the shutter ON of the user.

Then, when the user presses the shutter 5, C
The PU 12 has a memory 2 for the timing signal generation circuit 20.
A signal for writing data in 3 is generated, and the address signal set in the address generating circuit 18 is generated at a predetermined timing. Therefore, after this, the image data signal from the CCD 8 is A / D
Converter 9, band compression circuit 10 and I / O control circuit 14
And is sent to the memory card 2 side. At the same time, the address signal generated by the address generation circuit 18 is also sent to the memory card 2 side.

As a result, in the memory card 2,
Address generation circuit 1 of image data area 30 of memory 23
Image data is sequentially written to the addresses corresponding to the address signals from 8. When such writing is completed, the signal of the updated card header data from the CPU 12 is input to the memory 23 via the memory 17, the I / O control circuit 14, and the I / O control circuit 25, and the card header area 28 At the same time as the update, data signals of the start address and end address corresponding to the written image data are also sent from the CPU 12 to the memory 23, and these data are written in the directory area 29.

After that, the CPU 12 causes the timing signal generation circuit 20 to generate a signal for stopping a series of write operations to the memory 23.

The writing / reading of the dummy data is performed immediately before all the writing / reading operations in the above photographing operation, and it is confirmed that the data transfer is performed correctly.
Since the process is exactly the same as the actual data transfer,
You can surely confirm the operation. The reason (contact failure, etc.)
When the transfer of the dummy data fails in, the actual data writing / reading is not performed and a warning of the data transfer failure is issued.

Here, it is necessary to randomly change the dummy data or to clear the dummy data area 27 after writing / reading the dummy data.

By the way, between the main body 1 and the memory card 2, as described above, image data, address data,
Since it is necessary to exchange signals at various other timings, a minimum number of input / output pins corresponding to these are usually required.

In the following embodiment, the number of input / output pins is reduced and the memory card 2 can be attached / detached well.

FIGS. 7 and 8 are diagrams for explaining the configuration of the memory card control circuit 11 'and its peripherals in the second embodiment, which is different from the above-described embodiments. The memory card control circuit 11 'shown in the figure is different from the memory card control circuit 11 shown in FIG. 3 in that the address generation circuit 18 is removed and a status generation circuit is newly provided.

FIG. 7 and FIG. 8 are views showing the configuration of the memory card 2'of the second embodiment. Reference numeral 24a is a data input / output terminal connected to the terminal 16 on the main body 1, and the data input / output terminal 24a is an I / O control circuit 25.
Is connected to each data input / output terminal of the memory 23 via.

Reference numeral 24d is a terminal 19 'on the main body 1 side.
The status input terminal 24d is connected to the status decoder 32. Further, 24 e is a timing input terminal connected to the terminal 21 on the main body 1 side, and the timing input terminal 24 e is connected to the timing control circuit 33. Reference numeral 34 is an address counter that generates a predetermined address.

In this embodiment, the data bus and the address bus are commonly used. That is, the image data signal and the address signal are transferred to the common bus line indicated by reference numeral 35. As the address signal transferred in this way, not the address data corresponding to each image data as in the above-described first embodiment, but only the start address data for starting the reading or writing of the image data is transferred. , Address data corresponding to each image data is generated by the address counter 34, and this is input to the memory 23 and the chip select 26.

By the way, since the data bus and the address bus are shared in this way, it is necessary to distinguish whether the signal being transferred is an image data signal or an address signal. Further, regarding image data, the transfer direction must be distinguished.

Therefore, the number of status occurrences is 3 on the main body 1 side.
1. The status decoder 32 is provided on the side of the memory card 2. The status generation circuit 31 sends the status signal shown in FIG. 9 to the status decoder 32, and the timing generation circuit 20 sends the enable signal to the timing control circuit 33. It

In FIG. 9, "x" indicates don't car.
e and "O" indicate low level, and "1" indicates high level.

Then, the case 1 is in a non-operating state, that is, the bus line 35 is in a high impedance state.
In case 2 to case 7, it is a mode in which the address data of continuous or write is transferred. In addition,
The existence of a plurality of modes is because the address data consists of a maximum of 24 bits, while the bus line 35 is 8 bits. That is, case 2 is a mode in which the lower byte start address for reading is transferred. case3 is a mode in which the lower byte start address for writing is transferred. case4 is a mode for transferring the middle byte start address for reading.
case 5 is a mode for transferring the middle byte start address for writing. The case 6 is a mode for transferring the upper byte start address for reading. cas
e7 is a mode for transferring the upper byte start address for writing. However, by combining these modes, it is possible to transfer the start address data for each of read and write.

Case 8 is a mode for outputting read data, and case 9 is a mode for outputting write data.

As described above, in the present embodiment, writing of data to the memory card 2 or reading of data from the memory card 2 is performed using each of these modes. That is, when reading arbitrary data from the memory card 2, the CPU 12 first loads the start address corresponding to the data to be read in the modes of case 2, case 4, and case 6 from the status generation circuit 31 into the address counter 34, and then the case 8
The necessary data is read according to the mode.

With the above operation, the read preparation is completed.
Then, the address counter 34 starts counting up from the loaded address and supplies the value to the memory 23. As a result, the data corresponding to these addresses is read out from the memory 23.

On the other hand, when writing data into the memory card 2, the CPU 12 first loads the start address corresponding to the data to be written into the address counter 34 from the status generation circuit 31 in the modes of case 3, case 5, and case 7, and then in case 9 of case 9. Depending on the mode, the data should be written in the memory 23.

With the above operation, the data write preparation is completed. Then, the address counter 34 starts counting up from the loaded address and stores the value in the memory 2
Supply to 3. As a result, data is written in the memory 23 in correspondence with these addresses.

Also in the second embodiment, the writing / reading of the dummy data is performed immediately before all the writing / reading operations in the above photographing operation to confirm the data transfer. Next, a procedure for reproducing the image data thus recorded on the memory card 2 by using a reproducing device (not shown) will be described.

When the memory card 2 is mounted on the player, the player plays card header information and directory information from the memory card 2, the number of screens recorded on the memory card 2, the start address and end address of each recorded image. To detect. Then, when the user designates a screen to be reproduced, the start address corresponding to the screen is transferred to the memory card 2, and the target image data is read and reproduced.

The reproducing device does not write data to the memory card, but if dummy data is written / read out,
You can be sure that you are in proper contact.

[0056]

As described above, the present invention can prevent data loss due to poor contact between the memory card and the camera body. Also, since the mounting of the memory card can be confirmed, the memory card mounting detection pin is not required.

[Brief description of drawings]

FIG. 1 is a schematic perspective view of an electronic still camera according to an embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of FIG.

3 is a block diagram showing a configuration of a memory card control circuit shown in FIG.

FIG. 4 is a schematic perspective view showing the inside of the memory card shown in FIG.

5 is a block diagram showing the configuration of the memory card shown in FIGS. 1 and 4. FIG.

FIG. 6 is a diagram for explaining a memory area of a memory in the memory card shown in FIG.

FIG. 7 is a diagram for explaining the second embodiment of the present invention.

FIG. 8 is a diagram for explaining the second embodiment of the present invention.

FIG. 9 is a diagram for explaining the second embodiment of the present invention.

[Explanation of symbols]

1 ... Camera body, 2 ... Memory card, 7 ... Lens, 8 ...
CCD, 9 ... A / D converter, 11 ... Memory card control circuit, 12 ... CPU, 14, 25, ... I / O control circuit, 17 ... Memory, 18 ... Address generation circuit, 20 ...
Timing signal generating circuit, 23 ... Memory, 27 ... Dummy data area, 28 ... Card header area, 29 ... Directory area, 30 ... Data area.

Claims (2)

[Claims] 1. A recording medium having a writing area for writing / reading dummy data in a recording area, and an error detecting the data transfer error by writing / reading the dummy data before exchanging data with the recording medium. An electronic still camera device comprising a detection means. 2. The electronic still camera device according to claim 1, wherein the error detection means can detect the memory card mounting by writing / reading the dummy data.