JPH0516101B2 - - Google Patents

Abstract

PURPOSE:To easily obtain a regenerating signal having a good quality, which is brought to tangent approximation, by integrating a ratio of an amplitude value in digital data and a value showing a sampling period, and executing interpolation of a signal. CONSTITUTION:For instance, a voice is converted to an electric signal by a microphone, and thereafter, is sampled by a sampling period of an A/D converter ADC, and its amplitude value is quantized. It is controlled by a controlling circuit CCT, and is stored in the second memory M2 as data consisting of a group of the amplitude value and information related to a zero point interval. In case of regeneration, this data group is read out and is provided to a D/A converter DAC, the digital amplitude value and the information related to the zero point interval are converted to an analog value, and a signal is applied to an interpolating circuit CP. The interpolating circuit CP consists of a divider and an integrator, and by the divider, a ratio of the amplitude value of the analog value and the information related to the zero point interval is calculated, and its output is integrated by the integrator, and is made approximate to its original AC signal by tangent approximation.

Description

[Detailed Description of the Invention] When an audio signal is encoded and transmitted or recorded or reproduced as a digital signal, conventional methods for reducing the amount of data as much as possible include logarithmically compressing the signal amplitude or calculating the difference. Tsutari,
It is well known that various methods such as digital modulation have been adopted, but since these conventional methods seek to reduce the amount of data in the amplitude direction, reproduction is reduced by quantization distortion. There was a problem that the quality of the signal deteriorated.

When the amount of data decreases significantly, the applicant company does not calculate the decrease in bits in the amplitude direction, but rather calculates it in the time axis direction. The amplitude of the original signal can be reduced by an encoding device with a variable sampling period, that is, an encoding device in which the sampling period is variable according to the state of change on the time axis of the original signal. We propose various encoding devices with variable sampling periods that can obtain digital data in which a sample value indicating a value is paired with data indicating a sampling period for obtaining the sample value. I'm getting used to it.

The present invention combines a sample value regarding the amplitude value of an original signal in digital data encoded by an encoding device with a variable sampling period, and data indicating a sampling period for obtaining the sample value. When a reproduced signal is obtained by decoding digital data that has been previously used, it is now possible to easily obtain a reproduced signal approximated by a broken line using the amplitude difference value in the digital data and the value representing the sampling period. The present invention has been made for the purpose of providing a signal encoding, storing and reproducing apparatus, and the specific contents of the signal encoding, storing and reproducing apparatus of the present invention will be described below with reference to the accompanying drawings.

1 and 7 are block diagrams of different embodiments of the signal encoding, storage and reproducing apparatus of the present invention, respectively.
MIC is a microphone, LPFr, LPFp are low-pass filters, ADC is an AD converter,
CCT is a control circuit including, for example, a microcomputer, M1 is a first storage device (first memory, buffer memory), M2 is a second storage device (second memory), and DAC is a DA converter. ,
CP is an interpolation circuit, SP is a speaker, and
OP is an operation section, and the operation section OP has record buttons Br,
A play button Bp and a stop button Bs are provided. In addition,
CG in FIG. 7 is a clock pulse generator.

The devices shown respectively in FIGS. 1 and 7 are both under the control of a control circuit CCT.
A sampling period for obtaining a sample value by performing encoding such that the sampling period is variable according to the state of change on the time axis of the input analog signal, and obtaining a sample value regarding the amplitude value of the original signal. Create digital data in which the data indicating the amplitude value and the data of the difference value of the amplitude value are combined, and store it in the second memory M2.
and during reproduction, under the control of the control circuit CCT, by dividing the ratio of the amplitude difference value in the digital data sequentially read out from the second memory M2 and the value representing the sampling period. The apparatus shown in FIG. 1 and the apparatus shown in FIG. Since there are differences in the specific contents of encoding between the two devices, first, the device shown in the first figure will be explained.

Figure 2 shows how the sampling period changes in response to the state of change of the signal on the time axis when the signal is encoded by the apparatus shown in Figure 1. This is a waveform diagram for illustrating and explaining how the signal is encoded. In this figure, Sa is an AC signal to be encoded, and
The 0-0 line in the figure indicates the AC axis.

In Fig. 2, t ₁ , t ₂ , t ₃ ... are AC signal Sa
T ₁₂ , T ₂₃ , T ₃₄ , etc. are the time positions at which the AC axis line 0-0 is successively cut off, that is, the time positions of successive zero points in the AC signal Sa, and T 12 , T 23 , T 34 , etc. It shows the time interval between adjacent zero points at time positions t ₁ , t _{2 .} . . (hereinafter sometimes referred to as zero point interval).

Now, the intervals between successive zero points in the AC signal Sa
T ₁₂ , T ₂₃ , T ₃₄ ... indicate a constant time value corresponding to 1/2 of the period of the AC signal when the AC signal is a sine wave signal with a constant frequency, but in the case of an audio signal. In this case, the signal shown in Figure 2 corresponds to the signal content.
The time values are changed like T ₁₂ , T ₂₃ , T ₃₄ , etc.

By the way, conventionally, when sampling and quantizing an analog signal to generate a digital signal, the AC signal is converted into a digital signal by sampling pulses Ps having a constant time interval Tp shown on the AC axis line 0-0 in FIG. Sa
As is well known, according to the conventional method, the AC signal Sa in Fig. 2 is sampled.
As an example, it is clear that the number of sampled values sampled at successive zero point intervals increases as the zero point interval becomes longer. Regardless of the length of the successive zero point intervals in It was designed so that

In other words, the time obtained when successive zero point intervals in the AC signal Sa are equally divided by a predetermined number α (α is an integer greater than or equal to 2 and is a predetermined number). A digital encoding device for an alternating current signal can be constructed that can reduce the amount of data by making the value equal to the sampling period for obtaining sample values from the signal portion corresponding to each zero point interval. In order to divide each zero point interval into α equal parts, α
It goes without saying that whether to set it to 2, 3, or 4 or more should be determined appropriately by taking into consideration the degree of fidelity required for the reproduced signal, the cost of the encoding device, etc. .

In the device shown in Figure 1, the digital encoding device for AC signals detects successive zero points on the time axis in the AC signal to be digitally encoded, and The time interval between zero points, that is, the zero point interval is measured, and the time value obtained by dividing the measured zero point interval by α (however, α is a predetermined integer of 2 or more) is determined as the sampling period. Since (α-1) sample values can be obtained from the signal portion corresponding to the zero point interval, the configuration of the device is such that the above operations can be performed satisfactorily. , most of the operations may be performed by analog signal processing, or substantially all operations may be performed by digital signal processing; Since the configuration of the device can be simplified if all operations are performed by digital signal processing, the operation of the digital signal encoder section in the device shown in FIG. An exemplary configuration is shown in which all operations are performed by digital signal processing.

Next, the configuration and operation of the apparatus shown in the first figure will be explained.

The microphone MIC in Figure 1 converts sound waves into electrical signals (audio signals) and uses a low-pass filter LPFr.
give to In the example shown in the first figure, the signal source is the microphone MIC, but it goes without saying that the signal source may be another audio signal generator. The aforementioned low-pass filter LPFr is assumed to have a cut-off frequency of 4 KHz in the following description of the embodiment.

The audio signal converted into a frequency band of 4KHz or less by the low-pass filter LPFr is converted into a digital signal of a predetermined number of bits (8 bits in the following explanation) by the AD converter ADC. In the following explanation, the sampling frequency (sampling frequency) of the AD converter ADC is 8KHz,
The AD converter ADC always samples the input audio signal at a sampling period of 1/8000 seconds, quantizes the amplitude value of each sample, and quantizes the amplitude value of each sample.
Convert to bit digital signal.

The digital signal output from the AD converter ADC is converted into a digital signal with the amount of data reduced by performing predetermined signal processing under the control of a control circuit CCT that includes a microcomputer. However, in the device having the configuration shown in the first diagram, the signal processing operation is performed by the control circuit CCT, the first storage device M ₁ (first memory M ₁ ), and the second storage device.
M ₂ (second memory M ₂ ) or the like.
In the following description, the first memory _M1 is
It is said that the memory is 256 bytes, and the second memory _M2 is said to be 64K bytes of memory.

Next, with reference to the flowchart shown in FIG.
The encoding of signals performed sequentially by manipulating Br will be explained.

The program starts by operating the record button Br on the operation unit OP ("Start" in Figure 3).
Then, in step (1), an 8-bit counter provided in the control circuit CCT for measuring the zero point interval is reset. AD converter in step (2)
The successive 8-bit (1 byte) digital signal from the ADC is stored in the 256-byte first memory _M1 , and each time the said 1 _- byte digital signal is stored in the first memory M1. Then, an 8-bit counter for measuring the zero point interval is counted up one by one.

1 stored in the first memory _M1 in step (3)
It is determined whether the amplitude value of the AC signal with respect to that indicated by the digital signal of the byte is zero or not. If it is determined that it is not zero, the process returns to step (2), and if it is determined that it is zero, the process returns to step (4). ).

In step (4), 8
(α - 1) such that the zero point interval indicated by the count value of the bit counter can be equally divided into α parts (α is a predetermined number from an integer greater than or equal to 2). [For example, if the count value indicating the zero point interval is A, then α is 2, α is 3,
When α is 4, the numerical value obtained in step (4) is A/2 when α is 2, A/3 when α is 3,
2A/3, and if α is 4, A/4,
2A/4, 3A/4. Generally, the zero point interval is A
When , the numerical value obtained in step (4) is A/α,
{2A/α}...{(α-1)A/α} becomes (α-1) pieces]. In the following explanation, for simplicity, the case where α is 2 will be described as an example.

In step (5), the first value corresponding to 1/2 of the count value of the 8-bit counter for measuring the zero point interval is
The amplitude value data of the first memory M1 at the address position of the first memory M1 is read out, and the data of the amplitude difference value obtained from that data and the count value of the 8-bit counter for measuring the zero point interval described above are calculated. 1/2 and the second 64K byte.
(The amplitude difference value obtained from the adjacent sample values of the sequential data read from the first memory M1 and the measurement value of the zero point interval indicating the time value of the zero point interval) In other words, the smaller the 8-bit counter count value read from the 64K byte second memory M2, the smaller the required number of bits. Therefore, in the following explanation, the value to be used in combination with the amplitude difference value data is 1/2 of the count value of the 8-bit counter for measuring the zero point interval. (described for numeric values).

In step (6), an 8-bit counter for measuring the zero point interval is reset to a count value of 0, and an 8-bit counter is set to 0 to count the number of data sets stored in the second memory M2. Each time a new data set is stored in the second memory M2, the 15-bit counter is incremented by one, and the process proceeds to step (7).

In step (7), it is determined whether the second memory M2 has reached a full count or whether the stop button Bs on the operation section OP is pressed,
A state where the second memory M2 has reached full count,
Or, if it is detected that the stop button Bs is pressed, the program ends; otherwise, it returns to step (2).

In the above explanation, in order to simplify the explanation, it has been described that the zero point of the signal is simply determined based on whether or not the amplitude value stored in the first memory M1 is 0, but the first memory M1 The amplitude values sequentially stored in are discrete values obtained at each sampling period in the AD converter AD, so it is not always the case that the zero point of the AC signal is always sampled. However, if the polarity of the information indicating the amplitude values sequentially stored in the first memory M1 is reversed, a determination means is used, such as determining that this indicates the zero point of the alternating current.

In addition, if it is determined in step (3) that the amplitude value of the original AC signal is zero, then in step (4) the count value of the 8-bit counter for measuring the zero point interval is calculated. When the number of obtained (α-1) numerical values is 2 or more, that is, when α is 3 or more, the amplitude value data to be read from the first memory M1 in step (5) is set at zero point intervals. such that the zero interval indicated by the count value of the 8-bit counter for measurement of
-1) Each address position of the first memory M1 corresponding to each numerical value corresponding to each division point is read out sequentially, and is read out as described above. The data of these amplitude values are stored in the second memory M2 in pairs of zero intervals and associated numerical values for each difference value of the amplitudes of the adjacent ones.

Next, decoding will be explained using the block diagram shown in the first figure and the flowchart shown in the fourth figure. First, when the program shown in the flowchart of Fig. 4 is started by operating the playback button Bp of the operation section OP of the device, in step (P1), the number of data sets to be stored in the second memory M2 is counted. Reset the provided 15-bit counter and proceed to step (2P). The 15-bit counter counts up by one every time one data set is read from the second memory M2.

In step (2P), information related to the amplitude difference value and the zero point interval (the count value of the 8-bit counter for measuring the zero point interval is divided into α equal parts) in the order stored in the second memory M2. The data set consisting of the obtained value (in the example described above, a value that is 1/2 of the count value of the 8-bit counter described above) is read out and applied to the DA converter DAC, and the step (3P)
In the DA converter DAC, the above-mentioned amplitude difference value is converted into an analog amplitude difference value li, and
The information related to the zero point interval described above is converted into an analog electrical quantity τi, and the information is supplied to the interpolation circuit CP.

FIG. 5 is a block diagram showing an example of the configuration of the interpolation circuit CP and the configuration of related parts. In this FIG. 5, DIV is a divider, INT is an integrator, and in the DA converter DAC, D/A1 performs DA conversion on the amplitude difference value read from the second memory M2 and outputs the analog amplitude difference and other li.
The D/A converter is a DA converter, and D/A2 is a DA converter that converts information related to the zero point interval read from the second memory into an analog electrical quantity τi and outputs it.

The interpolator CP is DA to its divider DIV
Given the output signal li of the converter D/A1 and the output signal τi of the DA converter D/A2, Xi=li/τi...(1) By performing the calculation as shown in equation (1), the signal is Output Xi.

The output signal Xi from the divider DIV is integrated by the integrator INT and output as a signal Yi.

Yi=∫Xidt (2) Signal interpolation by the interpolation circuit CP is performed such that the interpolation slope θ is equal to li/τi in FIG. The interpolated signal can be made to have a waveform that approximates the original AC signal by polygonal line approximation.

In order to provide the time for signal interpolation by the interpolation operation explained with reference to FIGS. 5 and 6, that is, the time equal to the zero point interval divided by α, step (4P) is divided into steps (2P), A program delay is created so that the time it takes to pass step (3P) and step (4P) is equal to the time obtained by dividing the zero point interval time described above into α equal parts.

At step (5P), the amplitude difference value is sign-inverted and output, and at step (6P), in the same way as the step (4P) described above, step (5P), step (6P), and step ( 7P) Create a program delay for the elapsed time.

In step (7P), it is checked whether the 15-bit counter that counts the number of data sets read from the second memory M2 has reached a full count, or whether the stop button Bs has been pressed, and the 15-bit counter is counted. When the counter is at full count or the stop button
If Bs is being manipulated, the process ends; if not, the process returns to step (2P) and reads the next data set.

In the device shown in Figure 1, if the sampling period in the AD converter ADC is 1/8000 seconds as in the example mentioned above, and the average zero point interval is a count value of 4, then the zero point interval The average is 0.5ms, so if you allocate 1 byte each for storing the amplitude difference value and the information related to the zero point interval, you will need 64K bytes of memory as the second memory _M2. If _M2 is used, approximately 16 seconds worth of audio signals will be stored and played back. In addition, in the device shown in the first figure, the interpolation circuit
The reproduced signal approximated by a polygonal line by CP is applied to the speaker SP through a low-pass filter LPFp to obtain reproduced sound.

Next, the apparatus shown in FIG. 7 will be explained. In the apparatus shown in FIG. 7, the signal to be encoded is a signal of a fixed time length (one frame signal), and each frame of the signal has a sampling period Tc (sampling interval Tc). ).

FIG. 8 is a waveform example diagram of the signal Sa before encoding, and the 0-0 line in FIG. 8 is the AC axis line shown for reference, and in FIG. 8, Tf is the signal Sa.
This is the time length of a signal portion (time length of one frame signal) obtained by dividing Sa into fixed time lengths on the time axis.

In the signal Sa, each one-frame signal having a predetermined time length Tf crosses the AC axis 0-0 line multiple times within the time length Tf, that is, the signal Sa crosses the AC axis 0-0 line multiple times within the time length Tf. However, the number of zero points in each one frame signal differs depending on the frequency components of the signal in each one frame. For example, To explain the signal Sa shown in FIG. 8, there are 8 zero points in the signal of one frame from time t ₁ to t ₂ , and 4 zero points in the signal of one frame from time t ₂ to t ₃ . individual,
Hereinafter, the number of zero points is 6, 3, and 4 for signals of one frame successively on the time axis.

In the device shown in FIG. 7, the signal Sa
A signal portion of a predetermined constant time length Tf, that is, a sample in which the time length is equally divided by a number related to the number of zero points that exist in the one frame signal for each one frame signal. By performing encoding such that a sample value sequence is obtained for the signal of one frame using the encoding period Tc, the amount of data can be reduced. The following is an explanation using Sa as an example.

That is, when the number of zero points of the signal of one frame successively on the time axis is 8, 4, 6, 3, or 4 as described above, such as the signal Sa shown in FIG. For example, 1 has 8 zero points.
For frame signals, the time length Tf is (8×
K) In order to obtain a sequence of sample values from a signal of one frame with a sampling period that is divided into equal parts, for example, for a signal of one frame with four zero points, the time length is Similarly, so that a sequence of sample values from the signal of one frame can be obtained at a sampling period such that Tf is divided into (4×K) equal parts.
For each frame of signals with 6 or 3 zero points, the time length Tf is (6
x K) or (3 x K) equal sampling periods, so that a sequence of sample values can be obtained from each frame of the signal, and in general, zeros in the signal of one frame are When the number of points is Z, the time length for that one frame signal is
With a sampling period such that Tf is divided into (Z×K) equal parts,
A sample value sequence is obtained, and by using the above-mentioned encoding means, recording and reproducing operations can be easily realized with a reduced amount of data.

The data obtained by the above-mentioned encoding means, that is, the sample value sequence from each one frame signal having a predetermined time length Tf, is specified as the number Z of zero points in one frame signal. The data obtained by sampling with the sampling period obtained by equally dividing the time length Tf by a number (Z × K) having the following relationship is the data and the sampling period Tc. , the number N of sample values in one frame signal, and information such as the frame number are used for transmission or recording in pairs.

Next, the configuration and operation of the device shown in FIG. 7 will be explained. The microphone MIC shown in FIG. 7 converts a sound wave into an electrical signal (audio signal) and supplies it to a low-pass filter LPFr. In the device shown in Figure 7, a microphone MIC is used as a signal source.
The signal source may be a generator of other forms of audio signals or other signal generators.

In the following example description, the low-pass filter LPFr is
Its cutoff frequency is said to be 3KHz.
The audio signal converted into a frequency band signal of 3KHz or less by the low-pass filter LPFr is converted into a digital signal with the required number of bits (8 bits in the following explanation) by the AD converter ADC, and then sent to the microcomputer. The above-mentioned AD converter ADC performs AD conversion using pulses with a repetition frequency of 8 KHz from a clock pulse generator CG.

In the digital signal output from the AD converter ADC, the input audio signal is always sampled at a constant sampling period (1/8000 seconds in the example).
This is a quantized 8-bit digital signal, which is sequentially stored in the first storage device M ₁ (first memory M ₁ or buffer memory M ₁ ) under the control of the control circuit CCT. The buffer memory _M1 described above is assumed to have a storage capacity of 512 bytes in the following explanation example, and it is divided into two parts each having half the storage capacity, and the two parts are alternately divided into two parts. Used for writing data and reading data.

Now, the recording operation of the device shown in FIG.
By operating the record button Br in the OP, the operation is performed according to the program shown in the flowchart shown in Fig. 9.
When the record button Br in the OP is operated, the program starts ("Start" in Figure 9).
In step (1r), the 9-bit sample counter, 8-bit zero point counter, 16-bit frame counter, etc. provided in the control circuit CCT are reset.

Before the record button Br is operated, that is, the 9th
Even before the "beginning" in the illustrated flowchart, the control circuit CCT of the recording/reproducing apparatus performs the interrupt operation of step (10r) by receiving pulses from the clock pulse generator CG, and performs AD conversion. The digital signal output from the ADC is sequentially stored in the buffer memory _M1 , and a 9-bit sample counter is counted up.

Also, before the beginning, the 9-bit sample counter is repeatedly reset each time it reaches a full count.

At step (2r), the stored sample value is read from the buffer memory _M1 , and the 9-bit sample counter is counted up by 1.

In step (3r), it is checked whether the sign of the sample value read in step (2r) is the same as the sign of the sample value immediately before it, and if there is no change in sign, it is assumed that the point is not zero and step ( Return to step 2r), and when there is a change in sign, assume that the sample value read in step (2r) is the zero point, proceed to step (4r), and count the 8-bit zero point counter by 1 in step (4r). rise.

In step (5r), check whether the number of sample values sequentially read from buffer memory _M1 has reached 256 (or 512) using the count value of the 9-bit sample counter, and check the sample value read from buffer memory _M1 . When the number of sample values reaches 256 {that is, after repeating steps (2r) to (4r) 256 times}, proceed to step (6r), and if the number of sample values read from buffer memory _M1 has not reached 256, Return to step (2r).

Here, the number of sample values 256 read out from the buffer memory _M1 as described above is as follows for one frame signal of time length Tf of the signal Sa shown in FIG.
AD converter ADC has a constant sampling period (1/800 seconds)
The number of sample values obtained by sampling at 256 is the time length Tf of one frame signal.
This corresponds to

In step (6r), using the count value Zc of the 8-bit zero point counter, the predetermined number K, and the number 256 representing the time length Tf of the signal of one frame, the sample in the signal of one frame is calculated. The sampling period Tc required to obtain the value sequence is calculated, and the number of samples N is also calculated.

Sampling period Tc = 256/Zc・K As buffer memory _M1 , the one with a storage capacity of 512 bytes as mentioned above is divided into two parts with a storage capacity of 1/2, and the two parts are written and read. Assume that the time length of one frame signal is 32 milliseconds, and a signal is stored and read out in which there are 256 samples in one frame. When K is set to 2, the number of zero points Zc in the signal of one frame is 32
, the sampling period Tc is Tc=
256/32×2=4 That is, 4/8000=0.5 (milliseconds).

In the above example, the number of samples N is 64, which is 256
For one frame signal with a time length of 32 milliseconds, the number of samples N is 256/Tc=256/4=64.

Next, in step (7r), the buffer memory
From _M1 , a 9-bit sample counter is used to sequentially read out the sample values for each sampling period Tc for one frame of the signal to which the sampling period Tc is applied and a sample value sequence is to be taken out. (Address counter)'s count value at every Tc is used as an address signal to buffer memory _M1 to N+1 sequentially.
Read out the sample values, create N samples from the difference values of amplitudes, and read out the frame number of the count value Fc of the 16-bit frame counter, the number of samples N, the sampling period Tc, and the N samples described above. Create data in which the amplitude difference and other values are combined, store it in the second storage device M2 (second memory M ₂ ), and proceed to step (8r).

In step (8r), the 6-bit frame counter is counted up by 1.

In step (9r), check whether the 16-bit frame counter has reached a full count or whether the stop button Bs has been operated. If so, the process is over; if not, return to step (2r) and repeat each step above.

2 bytes corresponding to the count number Fc of the frame counter, 1 byte corresponding to the number of samples N, 1 byte corresponding to the sampling period Tc, and a 64-byte sample value string to create one frame signal. On the other hand, a second memory _M2 with a storage capacity of 68 bytes is required, so if 64K bytes of memory is used as the second memory _M2 , 963 frames will be stored in the second memory _M2 , that is, A signal of just over 30 seconds will be stored.

As is clear from the above explanation, the second memory _M2 stores, for each one frame signal, data with a sampling period Tc, a sample value string, data with a sample number N, and a frame number Fc (frame number A digital signal consisting of a set of counter count values Fc) etc. is stored, but this has a much larger amount of data than the digital signal stored in the first memory M ₁ (buffer memory M ₁ ). The amount of data is reduced by the above-mentioned encoding performed at the time of recording, making it possible to record and play back audio signals over long periods of time using a small memory capacity. do.

In order to perform recording and reproduction with even higher fidelity using the apparatus shown in Figure 7, encoding is performed based on the result of spectrum analysis of the signal as follows. Meaningful.

In other words, from the AD converter ADC to the control circuit CCT
1 stored in buffer memory M ₁ under the control of
Spectrum calculation is performed on the signal of a frame, and from the calculation result, the highest frequency among the signal components above a certain threshold level (for example, a signal level of 1/64 of the highest signal level) in the signal of one frame is calculated. Find the value, calculate the reciprocal of the number that is approximately twice the highest frequency value, and use the calculated value as the new sampling period for the signal of one frame.
Tc, and the sample value sequence corresponding to the signal of one frame is obtained from the buffer memory M according to the sampling period Tc. A reproduced signal with higher fidelity can be obtained than when the sampling period is set in relation to the zero point interval or the number of zero points.

In this case as well, a sample value sequence consisting of the amplitude difference values created from the sample value sequence selectively read from the buffer memory M1 using the new sampling period Tc obtained as described above, and Data that is paired with data related to the conversion period Tc is used for transmission or recording/reproduction.

The decoding operation in the device shown in FIG. 7 is started by operating the playback button Bp of the operation section OP of the device, but this is the same as the first decoding operation described with reference to FIGS. 1 and 4. The decoding operation is similar to the decoding operation in the illustrated device, in which the data sets sequentially read from the second memory M2 are correlated with the analog amount li of the amplitude difference value and the sampling period Tc by the DA converter DAC. Interpolation is performed by converting the analog quantity τi into an analog quantity τi and feeding it to the interpolation circuit CP, which produces a reproduced signal with a waveform that approximates the original signal waveform by polygonal line approximation. and is given to the speaker Sp.

As is clear from the above detailed explanation, in order to reduce the amount of data in the signal encoding, storage and reproducing apparatus of the present invention, the sampling period is adjusted according to the state of change of the original signal on the time axis. When decoding digital data that has been encoded in such a way that it is variable, and that includes a sample value related to the amplitude value of the original signal and data indicating the sampling period for obtaining the sample value. In addition, by interpolating the signal by integrating the ratio between the amplitude difference value in the digital data and the value representing the sampling period, it is possible to easily obtain a reproduced signal approximated by a broken line. According to the method, a high-quality reproduced signal can be easily obtained using a decoding means having a simple configuration.

[Brief explanation of the drawing]

1 and 7 are block diagrams of different embodiments of the device of the present invention, FIGS. 2 and 8 are explanatory waveform examples, and FIGS. 3, 4, and 9 are flowcharts. FIG. 5 is a block diagram of an example configuration of an interpolation circuit, and FIG. 6 is a characteristic diagram. MIC...Microphone, LPFr, LPFp...Low pass filter, ADC...AD converter, CG...Clock pulse generator, CCT...Control circuit including a microcomputer, OP...Operation unit, DAC...DA converter, _M1 ...first storage device (first memory, buffer memory), _M2 ...second storage device (second memory), CP...interpolation circuit.

Claims (1)

[Claims] 1 Data indicating sample values related to the amplitude value of the original signal and the sampling period for obtaining the sample values, by encoding such that the sampling period is variable according to the state of change on the time axis of the original signal. A signal encoding storage/reproduction device for decoding digital data in which a set of 1 and 2 is set, which calculates the ratio of the amplitude difference value in the digital data to the value representing the sampling period by division. and means for integrating the result obtained by the dividing means, and is capable of obtaining a reproduced signal approximated by a broken line.