JPH05145414A - Automatic frequency controller - Google Patents

Abstract

(57) [Abstract] [Purpose] To enable high speed and high stability of frequency control of an automatic frequency control device used in a digital car telephone device or the like. [Structure] The phase of the received signal to be input is determined by the digital VCO.
The phase quantizer 2 which quantizes the carrier signal inputted from 5 to determine the delay and advance from the expected value, and outputs the phase likelihood data, and the phase information from the phase quantizer are integrated to limit the integration. First overflow integrator 3 and a sign when it reaches a value, and the sign output from the first integrator is integrated and output as frequency division error data to the digital VCO to control the output frequency. In the automatic frequency control device including the second integrator 4, the phase likelihood determiner 7 detects the magnitude of the frequency error from the phase likelihood data of the phase quantizer 2 and determines the steady state or the transient state. According to the magnitude of the frequency error, the integration limit of the first integrator 3 is automatically changed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic frequency control device for stably outputting a reception frequency of a digital automobile telephone device or the like.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a configuration of a conventional automatic frequency control device. In FIG. 2, 1 is an input terminal for a received signal, 2 is a phase quantizer, 3 is a first integrator, Is a second integrator, 5 is a digital VCO (voltage controlled oscillator),
Reference numeral 6 is an output terminal for a carrier signal.

The automatic frequency control device configured as described above operates as follows. First, when the received signal is input from the input terminal 1 to the phase quantizer 2, the phase quantizer 2
Quantizes the phase of the received signal with the carrier signal input from the digital VCO 5, determines whether the output quantized phase value is behind or ahead of the preset expected value, and advances the value. The delay is input to the first integrator 3 as 1-bit information.

The first integrator 3 integrates the advance / delay of the received signal from the input bit information, and outputs the overflow signal output when the integration limit is reached and the code as 2-bit information. First when the overflow signal and the sign are output
The integrator 3 is initialized and repeats the above operation.

The second integrator 4 integrates the sign when the overflow signal of the first integrator 3 is generated. The integration result is input to the digital VCO 5 as frequency division error data. The digital VCO 5 controls the output frequency according to the value of the input frequency division error data, and operates so that the quantization phase matches the expected value. The carrier signal is also output to the carrier signal output terminal 6.

In the conventional automatic frequency control device, the frequency of the carrier signal for phase quantization is controlled as described above.

[0007]

However, in the above-mentioned conventional automatic frequency control device, since the integration limit of the first integrator 3 is constant, when the integration limit is set in consideration of the stability in the steady state, the transient characteristic pull-in time is set. However, if the integration limit is set in consideration of the high speed of the transient characteristic, there is a problem that the stability in the steady state deteriorates.

The present invention solves the above-mentioned problems of the prior art by detecting the magnitude of the frequency error from the phase likelihood data to determine whether it is a steady state or a transient state, and to set the integration limit according to that state. It is an object of the present invention to provide an automatic frequency control device that can achieve both high speed and high stability by changing.

[0009]

According to the present invention, a phase likelihood determiner is provided in an automatic frequency control device, and a steady state or a transient state is determined by detecting the magnitude of a frequency error from phase likelihood data. The feature is that the integration limit is changed according to the determination.

[0010]

According to the present invention, the magnitude of the frequency error is detected using the phase likelihood determiner based on the phase likelihood data generated as a result of the phase quantization, and the integration is performed according to the steady state or the transient state. By changing the limit, both high speed and high stability can be achieved, and a faster synchronization pull-in characteristic than the conventional automatic frequency control device can be realized.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings. 1 is a block diagram showing the configuration of an embodiment of the present invention, 7 is a phase likelihood determiner, and the other reference numerals are the same as or have the same functions as the corresponding reference numerals in FIG. To do.

The automatic frequency control device of the present invention configured as described above operates as follows. First, when the received signal is input to the phase quantizer 2 from the input terminal 1, the phase quantizer 2 quantizes the phase of the received signal by the carrier signal output from the digital VCO 5. The value of the quantized phase of the received signal is compared with a preset expected value to determine whether it is behind or ahead, and the lead / lag is output to the first integrator 3 as 1-bit information. The phase difference between the quantized phase value and the expected value is output to the phase likelihood determiner 7 as phase likelihood data.

In the phase likelihood judging device 7, the phase likelihood data N
(N is any positive integer) and the absolute value of the sum is M
If it is larger than (M is a positive integer), it is considered to be a transient state, and if it is smaller than M, it is considered to be a steady state. The 2-bit information is output to the second integrator 4. When the overflow signal and the sign are output, the first integrator 3 is initialized,
The above operation is repeated.

The second integrator 4 integrates the sign when the first integrator 3 generates the overflow signal. The integration result is input to the digital VCO 5 as frequency division error data,
The digital VCO 5 controls the output frequency according to the value of the input frequency division error data, and operates so that the quantization phase matches the set expected value. The carrier signal is also output to the carrier signal output terminal 6, and automatic frequency control can be performed.

As described above, according to the above-described embodiment, the phase likelihood determiner 7 detects whether the steady state is a transient state, and controls the integration limit of the first integrator 3 according to the state, so that the state is changed. Since you can select the optimum integration limit according to
This has the effect of enabling a faster sync pull-in characteristic than if a single fixed integration limit were used.

[0016]

As described above, the automatic frequency control device of the present invention is provided with the phase likelihood determiner to detect the magnitude of the frequency error and automatically adjust the integration limit according to the steady state or the transient state. This has the effect of achieving both high speed and high stability, and achieving high-speed synchronization pull-in characteristics and high stability in steady state.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an automatic frequency control device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional automatic frequency control device.

[Explanation of symbols]

1 ... Received signal input terminal 2 ... Phase quantizer 3 ...
1st integrator, 4 ... 2nd integrator, 5 ... Digital VC
O, 6 ... Carrier signal output terminal, 7 ... Phase likelihood determiner.

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Claims (1)

[Claims] 1. The phase of a received signal to be input is digital V
A phase quantizer that quantizes the carrier signal input from the CO to determine the delay and advance from the expected value, outputs phase likelihood data, and integrates the phase information from the phase quantizer to obtain the integration limit. A first integrator which outputs a overflow signal and a sign when the number reaches, and a first integrator which integrates the sign output from the first integrator and outputs it as frequency division error data to the digital VCO to control the output frequency. In an automatic frequency control device including two integrators, a phase likelihood determiner for detecting the magnitude of a frequency error from the phase likelihood data of the phase quantizer to determine whether the state is a steady state or a transient state is provided. An automatic frequency control device, wherein the integration limit of the first integrator is automatically changed according to the size of the error.