JPH05130415A - High efficiency picture coder - Google Patents

Abstract

(57) [Abstract] [Purpose] Efficient and high-efficiency coding is applied to image signals such as still images and moving images that have different energy distributions of output signals after orthogonal transformation. An image signal which is blocked in the horizontal and vertical directions in a frame by an input blocking circuit 2 is orthogonally transformed by an orthogonal transformer 3. Output rearrangement circuit 4 for the output signals
At, the lower frequency components are rearranged in the horizontal and vertical directions respectively. The input image discrimination circuit 5 discriminates the energy distribution of the rearranged signals, and according to the result, the high efficiency encoding circuit 7 rearranges them again in the vertical direction and then performs high efficiency encoding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-efficiency image coding apparatus in the field of video technology.

[0002]

2. Description of the Related Art With the digitization of image signals, high efficiency coding technology has become important. For example, Discrete Cosine Transform (hereinafter abbreviated as DCT), which is one of orthogonal transforms, has recently attracted attention as a means of signal processing in high-efficiency coding of image signals. This is because the correlation between adjacent pixels of the image signal is high, and therefore the output signal after DCT tends to concentrate energy in the low-order transform row and transform column of the orthogonal transform matrix, so compress the data amount significantly. Because you can.

[0003]

In the above DCT, for a general image such as a still image, the digitized input signal is processed in the frame in the vertical direction rather than in the field. It is known that the correlation between adjacent pixels of is high and the output signal after conversion is more likely to concentrate energy in the conversion rows and conversion columns of low order.

However, for moving images,
When trying to process in a frame, the output signal after conversion tends to not concentrate energy in the conversion row and conversion column of low order because of the time lag between fields, which is the effect of high efficiency encoding. There is a problem in that

An object of the present invention is to provide an efficient image high efficiency coding apparatus regardless of whether the input image is a still image or a moving image.

[0006]

In order to solve the above-mentioned problems, a high-efficiency image coding apparatus according to the present invention converts H image signals which are converted into digital signals and are inputted in the horizontal direction and V signals in the vertical direction. An input blocking circuit that blocks into blocks, an orthogonal transformer that orthogonally transforms the blocked image signal, and the signals output from the orthogonal transformer are arranged for each frequency band in the horizontal and vertical directions. An output rearranging circuit for rearranging, an image discriminating circuit for discriminating the image signal by examining the energy distribution of signals arranged for each frequency band, and the output rearranging circuit according to a request from the image discriminating circuit. And a high-efficiency encoding circuit for performing high-efficiency encoding after performing a process of rearranging the output signals from the same again for each frequency band and rearranging them.

[0007]

In the above structure, in order to more efficiently and efficiently code the signal orthogonally transformed by the orthogonal transformer and rearranged for each frequency band, the energy distribution of the signal is examined by the image discrimination circuit. Then, in the high-efficiency coding circuit, the signals are rearranged for each frequency band as needed based on the discrimination result of the image discrimination circuit, and then the high-efficiency encoding is performed.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-efficiency image coding apparatus according to the present invention will be described below with reference to the drawings showing its embodiments.

FIG. 1 is a block diagram of a high-efficiency image coding apparatus according to an embodiment. In the figure, 1 is an input signal of an image converted into a digital signal, and 2 is an input blocking circuit for blocking the input signal 1 into H × V blocks in the horizontal and vertical directions and outputting an orthogonal transform input block signal. Yes, 3 is an orthogonal transformer for orthogonal transforming the orthogonal transform input block signal from the input block circuit 2, and 4
Is an output rearrangement circuit that arranges the output of the orthogonal transformer 3 for each frequency band. Reference numerals 5 and 6 are a buffer and an input image discrimination circuit connected to the output rearrangement circuit 4, and the buffer 5 holds the signal from the output rearrangement circuit for the time when the input image signal discrimination circuit 6 performs the processing. Reference numeral 7 is a high-efficiency coding circuit that performs high-efficiency coding by changing the processing method of the signal from the buffer 5 based on the discrimination result of the input image discrimination circuit 6, and 8 is an output signal thereof.

In the image high-efficiency coding apparatus configured as described above, the orthogonal transformer 3 is an 8 × 8 DCT device, and the orthogonal transform input block signal input to the DCT device is processed within the frame. The case will be specifically described. 2 is an explanatory diagram of the output rearrangement circuit 4 when rearranging the DCT output signals, and FIG. 3 shows the input signal 1
Of the orthogonal transformation input block signal when is a still image,
4 is an explanatory diagram of an orthogonal transformation input block signal when the input signal 1 is a moving image, FIG. 5 is an explanatory diagram of an output signal of the output rearranging circuit 4 in the case of a still image, and FIG. 6 is an output rearranging in the case of a moving image. The explanatory diagrams of the output signals of the circuit 4 are respectively shown.

6 pixels of 8 pixels in the horizontal direction and 8 pixels in the vertical direction
The input signal 1 rearranged into an orthogonal transformation input block signal composed of four pixels is input to the orthogonal transformation unit 3 and DCTed into the output rearrangement circuit 4, where it is horizontally and vertically oriented as shown in FIG. The blocks are rearranged into blocks arranged in order from the low frequency component region. Here, when the input signal 1 is processed in the input blocking circuit 2 within a frame, the orthogonal transform input output from the input blocking circuit 2 is output depending on whether the input signal 1 is a still image or a moving image. The block signals have the following differences.

In the case of a still image, the outline portion on the screen of the orthogonal transformation input block signal is divided into a blank portion and a shaded portion as shown in FIG. In the case of a moving image, the contour on the screen is as shown in FIG. 4, and the signals of the third and fourth columns in the horizontal direction take the form of 10101010 in an extreme way. Even in the case of a moving image that moves vertically or diagonally, it often has a shape similar to that in FIG.

Therefore, the orthogonal transform input block signal is converted to DCT.
However, when the energy distribution of the signals after rearrangement by the output blocking circuit 4 is viewed in the same block, in the case of a still image, as shown in FIG. Signals having a relatively small level gather in the component region and gather in a blank portion, that is, a high frequency component region. On the other hand, in the case of a moving image, as shown in FIG. 6, the frequency components in the vertical direction are sequentially arranged from the lowest region to the highest region based on the correlation between the low frequency component as a normal image and the line-to-field line due to motion. Signals with a relatively large level tend to gather, signals with a relatively large level gather in the shaded area, and signals with a relatively small level gather in the blank area.

Conventionally, since the signals from the output rearrangement circuit 4 shown in FIGS. 5 and 6 are directly encoded with high efficiency, in the case of a moving image in which high energy signals are concentrated in the high frequency component region, The effect of high efficiency coding was small.

Therefore, in the present embodiment, after the signal after DCT is rearranged into blocks in which the signals are rearranged in order from the low frequency component region, the distribution of the signal is checked to determine a still image and a moving image. In this case, the signals are rearranged in the vertical direction again and then high efficiency coding is performed.

That is, in the input image discrimination circuit 6, the signals from the output rearrangement circuit 4 are arranged in order from the 0th column to the 7th column in the vertical direction and the 0th column, 7th column and 1st column in the vertical direction. A signal arranged in order from both sides of the 0th column and the 7th column, such as the 6th column, the 2nd column, the 5th column, the 3rd column, the 4th column, etc., is compared, which is advantageous for the subsequent high efficiency encoding Determine if it will be an input signal. In the case of a signal having a distribution as shown in FIG. 6 in the case of a moving image, the 0th column and 7th column in the vertical direction are used.
If they are rearranged in order from both sides of the column, the state of distribution as shown in FIG. 5 in the case of a still image approaches, and it becomes convenient for the subsequent high efficiency encoding.

The high-efficiency coding circuit 7 performs high-efficiency coding by changing the method of processing the signal from the buffer 5 delayed by the processing time of the input image discrimination circuit 6 based on the discrimination result of the input image discrimination circuit 6. .. In other words, in the case of a moving image, it is rearranged in the vertical direction and then high-efficiency encoding is performed, and in the case of a still image, high-efficiency encoding is performed as it is. Can be converted.

[0018]

As described above, according to the present invention, the input image is discriminated from the signals obtained by rearranging the outputs after the orthogonal transformation in the horizontal and vertical directions according to the frequency bands, and the high efficiency is obtained according to the discrimination result. Since high-efficiency encoding is performed after rearranging again for each frequency before encoding, high-efficiency encoding can be performed efficiently for both still images and moving images.

[Brief description of drawings]

FIG. 1 is a block diagram of a high-efficiency image encoding device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of an output rearrangement circuit of the device.

FIG. 3 is an explanatory diagram of an orthogonal transformation input block signal in the case of a still image of the same device.

FIG. 4 is an explanatory diagram of an orthogonal transform input block signal in the case of a moving image of the device.

FIG. 5 is an explanatory diagram of output signals of an output rearrangement circuit in the case of a still image of the device.

FIG. 6 is an explanatory diagram of output signals of an output rearrangement circuit in the case of a moving image of the device.

[Explanation of symbols]

 1 Input signal 2 Input blocking circuit 3 Orthogonal transformer 4 Output rearrangement circuit 5 Buffer 6 Input image discrimination circuit 7 High efficiency coding circuit 8 Output circuit

Claims (1)

[Claims] 1. An input blocking circuit for blocking an image signal, which is converted into a digital signal and input, into H blocks in the horizontal direction and V blocks in the vertical direction, and an orthogonal transform of the blocked image signal. And an output rearranging circuit that rearranges and rearranges the signals output from the orthogonal transformers in each of the horizontal and vertical directions, and the energy distribution of the signals rearranged in each frequency band. An image discrimination circuit for discriminating the image signal,
An image including a high-efficiency encoding circuit that performs high-efficiency encoding after performing a process of rearranging and rearranging the output signals from the output rearranging circuit again for each frequency band in response to a request from the image discrimination circuit High efficiency encoder.