JPH048068A - digital image processing circuit - Google Patents
digital image processing circuitInfo
- Publication number
- JPH048068A JPH048068A JP11459290A JP11459290A JPH048068A JP H048068 A JPH048068 A JP H048068A JP 11459290 A JP11459290 A JP 11459290A JP 11459290 A JP11459290 A JP 11459290A JP H048068 A JPH048068 A JP H048068A
- Authority
- JP
- Japan
- Prior art keywords
- coefficient
- value
- digital image
- circuit
- image processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Picture Signal Circuits (AREA)
- Television Receiver Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はビデオ信号をデジタル化し、ビデオ信号を伸長
しコントラストをアップする為のデジタル画像処理回路
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital image processing circuit for digitizing a video signal, expanding the video signal, and increasing contrast.
一般にビデオ信号を画像として表示する為に用いられる
受像管(CRT)のカソード電流I、lとグリッド、カ
ソード間電圧Eaxは第2図に示すような関係にあり、
又カソード電流と明るさの関係は比例関係にある0図中
Ecはカットオフ電圧であり、これ以下の電圧では、受
像管にカソード電流が流れない、又E8は受像管の許容
最大駆動電圧でありE$以上の電圧ではカソード電流が
過大に流れ電子ビームのスポット径が大きくなり画像の
細かい部分の表現ができなくなると共に受像管より発生
するX線の増大を招く事になる。Generally, the cathode current I, l of a picture tube (CRT) used to display a video signal as an image and the voltage Eax between the grid and the cathode have a relationship as shown in Fig. 2.
Also, the relationship between cathode current and brightness is proportional. In the figure, Ec is the cut-off voltage, and if the voltage is below this, cathode current will not flow through the picture tube. Also, E8 is the maximum allowable driving voltage of the picture tube. If the voltage is higher than E$, the cathode current will flow excessively and the spot diameter of the electron beam will become large, making it impossible to express fine parts of the image and causing an increase in the amount of X-rays generated from the picture tube.
この為、受像管に加える電圧はEcからE、までの電圧
とする。すなわちこのEcからEsが受像管のダイナミ
ックレンジであり、この値より受像管のコントラスト比
(黒から白までの比)が決定される。For this reason, the voltage applied to the picture tube is from Ec to E. That is, Ec to Es is the dynamic range of the picture tube, and the contrast ratio (ratio from black to white) of the picture tube is determined from this value.
いいかえれば充分なコントラストの有る画像を得る為に
はビデオ信号の振幅をこの範囲内で充分なレベルで加え
て受像管を駆動すればよい。In other words, in order to obtain an image with sufficient contrast, it is sufficient to drive the picture tube by adding the amplitude of the video signal at a sufficient level within this range.
しかしながらビデオ信号はいつでもこの範囲内を100
%振っているとは限らず、第3図(a)に示すような黒
レベルに近い部分、すなわちビデオ信号のレベルの小さ
い時もある。これを受像管のダイナミックレンジを利用
しコントラストを上げるには同図(b)の様に特に信号
の変化部分を拡大し駆動する事により充分なコントラス
トを得る事ができる。このような基本的な考えをもとに
1、オートペデスタル
これは画像の最も黒い部分をペデスタルレベルまで引き
下げる。この様子を第4図に示す。However, the video signal always falls within this range of 100
%, but there are also portions close to the black level as shown in FIG. 3(a), that is, times when the level of the video signal is low. In order to increase the contrast by utilizing the dynamic range of the picture tube, it is possible to obtain sufficient contrast by particularly enlarging and driving the changing portion of the signal as shown in FIG. 3(b). Based on this basic idea, 1. Autopedestal This lowers the blackest part of the image to the pedestal level. This situation is shown in FIG.
2、利得の増加
このままでは受像管の動作範囲をいっばいに使っていな
いので増幅器の利得を上げる(第3図(b)に示すよう
に拡大する)この様な一連の動作を行い受像管の動作範
囲を有効に用いる方法が考案され実用化されている。2. Increase in gain Since the operating range of the picture tube is not fully used as it is, the gain of the amplifier is increased (expanded as shown in Figure 3 (b)). A method of effectively using the operating range has been devised and put into practical use.
〔発明が解決しようとしている課題〕
しかしながら上記従来例ではオートペデスタルを行うと
画像の内容、例えば明るく、かつ白一色の様に画面が一
様で変化の少ない画像では黒方向に引き下げられる為充
分な明るさが感じられなくなると同時に増幅率が過大に
なり、不快感を与える画像となる。又、増幅器の利得を
増加させている為、ごく普通の画像では従来よりもコン
トラストは上がるが、時々白ピークを含んだ信号ではE
GKがE8を越えてしまうという欠点があった。[Problem to be Solved by the Invention] However, in the above-mentioned conventional example, when autopedestal is performed, the content of the image, for example, an image that is bright and has a uniform screen with little change, such as a solid white image, is lowered toward black, so it is not sufficient to At the same time that the brightness is no longer felt, the amplification factor becomes excessive, resulting in an unpleasant image. Also, because the gain of the amplifier is increased, the contrast is higher than before for ordinary images, but sometimes for signals containing white peaks, the E
The drawback was that the GK was higher than E8.
これを防ぐためリミッタ(ABL等)があるが、白ピー
クをリミットする為充分な白ピーク(白色)が得られな
いという欠点があった。There are limiters (such as ABL) to prevent this, but they have the disadvantage that a sufficient white peak (white color) cannot be obtained because they limit the white peak.
[課題を解決するための手段(及び作用)]本発明によ
ればデジタル画像信号の最大値、最小値、最大値と最小
値の中間値及び利得の係数を得てデジタル画像信号を処
理する回路を設けると共に、最大値、最小値と所定レベ
ルとの比較に基づき中間値をシフトするシフト手段とを
設ける事により明るい画像及び黒い画像においても各々
の質感を失なわず、かつコントラストの増大が計れるよ
うにしたものである。[Means for Solving the Problems (and Effects)] According to the present invention, a circuit processes a digital image signal by obtaining a maximum value, a minimum value, an intermediate value between the maximum value and the minimum value, and a gain coefficient of the digital image signal. By providing a shift means for shifting the intermediate value based on the comparison between the maximum value, the minimum value and a predetermined level, it is possible to increase the contrast without losing each texture even in bright and black images. This is how it was done.
第1図は本発明の実施例図であり、1はビデオ信号が入
力されるところの入力端子であり、2は所望の帯域で帯
域制限を行うローパスフィルタ(図示せず)を経た後標
本化、量子化を行いアナログ信号をデジタル信号に変換
するアナログ/デジタル変換器、3はデジタル化された
ビデオ信号のデータを記憶、遅延する為のメモリ、4は
ビデオ信号データに係数を乗算する等の処理を行う画像
処理回路、5はデジタル/アナログ変換器、6は最大値
検出回路、最小値検出回路、及び最大値と最小値の中間
値を求める演算回路である。FIG. 1 is a diagram showing an embodiment of the present invention, where 1 is an input terminal to which a video signal is input, and 2 is a sampled signal after passing through a low-pass filter (not shown) that performs band limitation in a desired band. , an analog/digital converter that performs quantization and converts an analog signal into a digital signal; 3 is a memory for storing and delaying the digitized video signal data; 4 is a memory for multiplying the video signal data by a coefficient, etc. An image processing circuit that performs processing; 5 is a digital/analog converter; 6 is a maximum value detection circuit, a minimum value detection circuit, and an arithmetic circuit that calculates an intermediate value between the maximum value and the minimum value.
7は増幅率を決める為の係数算出回路、8は7よりの係
数と9よりの係数を乗算する係数演算回路、9は所望の
コントラスト比を得る為に増幅率を可変する係数を発生
する係数発生回路、10は係数発生回路の係数を可変コ
ントロールするコントロール部である。7 is a coefficient calculation circuit for determining the amplification factor, 8 is a coefficient calculation circuit for multiplying the coefficient from 7 by the coefficient from 9, and 9 is a coefficient for generating a coefficient for varying the amplification factor to obtain a desired contrast ratio. The generating circuit 10 is a control section that variably controls the coefficients of the coefficient generating circuit.
上記の構成において、lの入力端子より入力されたビデ
オ信号は、所望の帯域で帯域制限を行うローパスフィル
ター(図示せず)を経る事により帯域制限されたのち、
2のアナログ/デジタル変換器により標本化(サンプリ
ングクロック発生回路、電源等は周知である為図示せず
)量子化が行なわれ、デジタル信号(デジタルデータ)
に交換され、順次3のメモリ回路に供給され、例えば、
1水平期間記憶(1ラインメモリ)された後に、4の画
像処理回路に送出される。In the above configuration, the video signal input from the input terminal 1 is band-limited by passing through a low-pass filter (not shown) that performs band-limiting in a desired band.
Sampling is performed by analog/digital converter 2 (sampling clock generation circuit, power supply, etc. are not shown as they are well known) and quantization is performed, and the digital signal (digital data) is
and is sequentially supplied to the memory circuit 3, for example,
After being stored for one horizontal period (one line memory), it is sent to the image processing circuit No. 4.
また、2よりのデジタル信号は、6の最大値検出、最小
値検出、中間値演算回路に送出される。Further, the digital signal from 2 is sent to the maximum value detection, minimum value detection, and intermediate value calculation circuit of 6.
6の最大値検出、最小値検出、中間値演算回路では、第
6図(a)に示すようなビデオ信号の同期部分及びペデ
スタル部分を除く有効ビデオ信号データの中で最大レベ
ルのデータを最大値Daととして演算し求め、7の係数
算出回路に送出する。7の係数算出回路では、6で求め
られた最大値をDa、最小値をDb、中間値をDcとし
、デジタルデータとして採りつる最大値をF、ペデイス
タルレベルなGとすれば、
Da−Db
□をDdとすれば
を求めいずれか小さい値を選択する。6, the maximum value detection, minimum value detection, and intermediate value calculation circuit detects the maximum level data in the effective video signal data excluding the synchronization part and pedestal part of the video signal as shown in FIG. 6(a). Da is calculated and sent to the coefficient calculation circuit 7. In the coefficient calculation circuit of 7, if the maximum value obtained in 6 is Da, the minimum value is Db, and the intermediate value is Dc, the maximum value that can be obtained as digital data is F, and the pedestal level G is Da- If Db □ is Dd, calculate and select the smaller value.
この事は、データの採りつる最大値、またはペデスタル
レベルと中間値との差を求める事により、いずれの方向
が増幅する為の余裕が少ないかを判別し、Ddで除算す
るという事は増幅率を求めた事になる。この係数算出回
路は、ビデオ信号の中間値を求め、最大可能なビデオ信
号のクリップしない増幅率を求める回路である。This means that by determining the difference between the maximum value of the data or the pedestal level and the intermediate value, it is possible to determine which direction has less margin for amplification, and dividing by Dd means the amplification rate. This means that you have asked for . This coefficient calculating circuit is a circuit that calculates the intermediate value of the video signal and calculates the maximum possible amplification factor that does not clip the video signal.
しかしながらこの様な演算を行なった場合、第7図(a
)に示すように、例えばビデオ信号の最大値Daがデジ
タルデータとして採りつる最大値Fと同一値であればコ
ントラストの改善は行なわれない、(同様に最小値Db
がペデスタルレベルGと同一値でも同様である)
この様な場合において演算回路6では
別の一方が大きな値となった場合には、中間値Dcを移
動し、コントラストを改善する。この場合においても異
和感を感じないレベルとして、±15〜20%の移動量
とする。However, when such calculations are performed, the result shown in Fig. 7 (a
), for example, if the maximum value Da of the video signal is the same value as the maximum value F that can be taken as digital data, the contrast will not be improved (Similarly, if the minimum value Db
(The same applies even if Dc is the same value as the pedestal level G.) In such a case, in the arithmetic circuit 6, if the other one becomes a large value, the intermediate value Dc is moved to improve the contrast. Even in this case, the amount of movement is set at a level of ±15 to 20% at which no discomfort is felt.
このように白ピーク、または黒レベル近辺でコントラス
ト比の小さい信号では、中間値のレベルシフトを行ない
、白伸長、または黒伸長を行ない、コントラストの改善
を行なう、この様子を第7図(b)に示す。In this way, for a signal with a small contrast ratio near the white peak or black level, a level shift of the intermediate value is performed, and white expansion or black expansion is performed to improve the contrast. This situation is shown in Figure 7 (b). Shown below.
9の係数発生回路では、この本発明の効果を画像の好み
により自由に可変する為の係数を発生する回路であり、
コントロール部より必要なデータが入力され、1以下の
係数が発生される。1であればこの本発明は100%の
効果(コントラスト比の向上)となる。The coefficient generation circuit No. 9 is a circuit that generates coefficients to freely vary the effect of the present invention depending on the image preference.
Necessary data is input from the control section and a coefficient of 1 or less is generated. 1, the present invention has a 100% effect (improvement in contrast ratio).
なお、7で求められた係数は、最小1から最大無限大に
近い値を採りつる。また9で発生する係数は1以下であ
り、これらの係数を8の係数演算回路に入力し乗算処理
を行なう。Note that the coefficients obtained in step 7 range from a minimum value of 1 to a maximum value close to infinity. Further, the coefficients generated at 9 are less than 1, and these coefficients are input to the coefficient arithmetic circuit at 8 to perform multiplication processing.
しかしながら、第5図(a)に示す様な信号レベルが中
レベルで最大値、最小値のレベル差の少ないもの、すな
わちコントラスト比の少ないものについては、同図(b
)に示す様な増幅率(係数)の大きな画像となり不快感
を与える画像を映出してしまう事になる。However, as shown in Fig. 5(a), when the signal level is medium and the level difference between the maximum and minimum values is small, that is, when the contrast ratio is small, the signal level shown in Fig. 5(b) is
), an image with a large amplification factor (coefficient) will be displayed, giving a sense of discomfort.
この為この係数演算回路においては、増幅率(係数)の
最大値を決めておく必要があり、すなわちリミッタ、例
えば、その値を2とすれば、第5図(a)の信号は同図
(b)にはならず、同図(c)程度であり不快感を与え
る事はない。For this reason, in this coefficient calculation circuit, it is necessary to determine the maximum value of the amplification factor (coefficient), that is, a limiter, for example, if the value is 2, the signal in FIG. It does not become (b), but is similar to (c) in the same figure, and does not cause any discomfort.
例えば、係数発生回路の係数を1とすれば、この係数演
算回路で得られる係数は1以上2以下となり、4の画像
処理回路に供給される。For example, if the coefficient of the coefficient generation circuit is 1, the coefficients obtained by this coefficient calculation circuit will be greater than or equal to 1 and less than or equal to 2, and will be supplied to the image processing circuit 4.
この画像処理回路では、6で求められた中間値を中心と
し、それに8の係数演算で求められた係数(増幅率)の
乗算を行ない第6図(b)に示すような、ビデオ信号の
データの処理が行なわれる。This image processing circuit takes the intermediate value obtained in step 6 as the center and multiplies it by the coefficient (amplification factor) obtained in the coefficient calculation in step 8, resulting in video signal data as shown in FIG. 6(b). processing is performed.
このデジタルビデオ信号データは、5のデジタル/アナ
ログ変換器でアナログ信号に変換され、後置される。ロ
ーパルスフィルターについて帯域制限された後、受像管
の駆動回路に供給される。This digital video signal data is converted into an analog signal by a digital/analog converter 5 and is then provided later. After being band limited by a low pulse filter, it is supplied to the picture tube drive circuit.
[発明の効果]
以上説明したように、デジタル画像信号の最大値、最小
値またそれらの適応的な中間値を求め利得の係数を可変
する手段を設ける事により、画像に応じた充分なコント
ラストが得られ大幅に画質が向上する。[Effects of the Invention] As explained above, by providing a means for determining the maximum value, minimum value, or adaptive intermediate value of the digital image signal and varying the gain coefficient, it is possible to obtain sufficient contrast depending on the image. This results in a significant improvement in image quality.
第1図は本発明による実施例におけるブロック図、
第2図は受像管の特性を示す図、
第3図はコントラストについて説明する図、第4図はオ
ートペデスタルについて説明する図、
第5図は増幅率について説明する為の図、第6図は最大
値、最小値、中間値を説明する為の図、
第7図は中間値シフトの説明図である。
1は入力端子、
2はアナログ/デジタル変換器、
3はメモリ、
4は画像処理回路、
5はデジタル/アナログ変換器、
6は最大値検出、最小値検出、
路、
7は係数算出回路、
8は係数演算回路
9は係数発生回路、
1oはコントロール部である。
中間値演算回Fig. 1 is a block diagram of an embodiment according to the present invention, Fig. 2 is a drawing showing the characteristics of the picture tube, Fig. 3 is a drawing explaining contrast, Fig. 4 is a drawing explaining the autopedestal, and Fig. 5 is a drawing showing the characteristics of the picture tube. FIG. 6 is a diagram for explaining the amplification factor, FIG. 6 is a diagram for explaining the maximum value, minimum value, and intermediate value, and FIG. 7 is a diagram for explaining the intermediate value shift. 1 is an input terminal, 2 is an analog/digital converter, 3 is a memory, 4 is an image processing circuit, 5 is a digital/analog converter, 6 is a maximum value detection, minimum value detection, path, 7 is a coefficient calculation circuit, 8 The coefficient calculation circuit 9 is a coefficient generation circuit, and 1o is a control section. Intermediate value calculation times
Claims (1)
める為の演算手段、該演算手段の出力に基づきデジタル
画像信号に対する係数を演算する係数算出手段、係数発
生手段、係数発生手段における係数を可変する為のコン
トロール部、係数算出手段に得られた係数と係数発生手
段より発生された係数を演算する為の係数演算手段、デ
ジタル画像信号を前記係数演算手段で求められた係数に
より処理する画像処理手段、前記最大値、最小値と所定
レベルとの比較に基づき前記中間値をシフトする手段、 とを設けたデジタル画像処理回路。(1) Calculating means for calculating the maximum value, minimum value, and intermediate value of the digital image signal, coefficient calculating means for calculating coefficients for the digital image signal based on the output of the calculating means, coefficient generating means, and coefficients in the coefficient generating means a control section for varying the coefficient, a coefficient calculation means for calculating the coefficient obtained by the coefficient calculation means and a coefficient generated by the coefficient generation means, and a digital image signal processed by the coefficient obtained by the coefficient calculation means. A digital image processing circuit comprising: image processing means; means for shifting the intermediate value based on a comparison between the maximum value, the minimum value and a predetermined level.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459290A JPH048068A (en) | 1990-04-26 | 1990-04-26 | digital image processing circuit |
| CA002040672A CA2040672C (en) | 1990-04-26 | 1991-04-17 | Image signal processing apparatus |
| US07/687,454 US5210610A (en) | 1990-04-26 | 1991-04-18 | Image signal correction processing apparatus |
| DE69127493T DE69127493T2 (en) | 1990-04-26 | 1991-04-23 | Device for processing a television signal |
| EP91303645A EP0454417B1 (en) | 1990-04-26 | 1991-04-23 | Image signal processing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11459290A JPH048068A (en) | 1990-04-26 | 1990-04-26 | digital image processing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH048068A true JPH048068A (en) | 1992-01-13 |
Family
ID=14641719
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11459290A Pending JPH048068A (en) | 1990-04-26 | 1990-04-26 | digital image processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH048068A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5394194A (en) * | 1992-02-07 | 1995-02-28 | Matsushita Electric Industrial Co., Ltd. | Gain control circuit and gradation correcting apparatus |
| WO2003010957A1 (en) * | 2001-07-26 | 2003-02-06 | Seiko Epson Corporation | Image processing system, projector, information storage medium, and white/black expansion method |
-
1990
- 1990-04-26 JP JP11459290A patent/JPH048068A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5394194A (en) * | 1992-02-07 | 1995-02-28 | Matsushita Electric Industrial Co., Ltd. | Gain control circuit and gradation correcting apparatus |
| WO2003010957A1 (en) * | 2001-07-26 | 2003-02-06 | Seiko Epson Corporation | Image processing system, projector, information storage medium, and white/black expansion method |
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