JPH046305B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention relates] The present invention generally relates to signal coring circuits;
In particular, the present invention relates to a novel coring circuit of a variable type that can accurately remove cores from a signal at a plurality of different coring levels and control the coring level.

[Prior art]

Coring of a signal (i.e. the removal of the average near-axis "core" of a signal by processing it with a translator that exhibits a transfer characteristic with a null region for signal swings near the axis) was developed in 1978, for example. A paper by J.P.Rossi published in SMPTE magazine, March issue, pp. 134-140, “Digital technology to reduce the number of television magazines.”
technology for Reducing Television Noise)
is a well-known signal processing function often used for noise reduction purposes as described in . Depending on the use of the coring circuit, it may be desirable to be able to easily adjust the level of coring to be performed. If this adjustment is easy (for example, the March 1968 issue
McMann (RH
McMann et al., “Improved Signal Processing for Color Television Broadcasting”
Techniques for Color Television
It allows for manual adjustment of the coring level (as shown in ``Broadcasting''), and it also allows for manual adjustment of the coring level (as shown in ``Broadcasting''), and allows for manual adjustment of the coring level (as shown in U.S. Pat. No. 4,167,749). Dynamic adjustment of the coring level can also be performed (e.g., by varying it as a function of the coring level).

[Disclosure of the invention]

The present invention relates to the provision of a coring circuit of a type that is adjustable in coring level, does not require capacitance elements in its construction, and can be conveniently and efficiently implemented in integrated circuit form. When using such a coring circuit, a lower limit for adjusting the coring level may allow for a finite residual coring level.

The apparatus for coring an input signal by a variable amount according to the present invention, in accordance with the illustrated embodiment described later, has a predetermined gain for producing a linearly amplified output signal in response to an input signal. It comprises a linear amplifier 13; 40 and a multistage limiting amplifier 15 including a first signal amplification stage 50 and a second signal amplification stage 60 connected in cascade. These first and second signal amplification stages have controllable gains, and
A first signal amplification stage 50 has an input coupled to receive the input signal, and a second amplification stage 60 has an input coupled to receive the input signal.
has an output that produces an amplitude limited output signal with a limiting level that varies proportionally to the relative gains of the first and second amplification stages.

The apparatus of the invention also includes an input CC coupled to the source of variable control voltage 21 and a first output 55 connected to provide a first gain control signal to the first signal amplification stage 50. and a second gain control signal complementary to the first gain control signal.
a second output 65 connected to supply a signal amplification stage 60 of the gain control means 23;5;
5,65. This gain control means is
The gains of the first amplification stage 50 and the second amplification stage 60 are controlled in opposite directions in response to changes in the variable control voltage, so that the total magnitude of the gain of the multistage limiting amplifier 15 is always equal to that of a linear amplifier. 13; substantially equal to the magnitude of the predetermined gain of 40 and operative to control the mutual gain of the first amplification stage 50 and the second amplification stage 60 in proportion to the value of the variable control voltage; .

The device of the invention further combines the linearly amplified signal with the amplitude limited output signal,
A signal synthesis means 17 is provided for generating a cored output signal having a coring level controlled by the variable control voltage.

According to one embodiment of the invention, the limiting amplifier 15
The cascaded amplifier stages 50, 60 each consist of a differential amplifier that draws its operating current from the collector electrode of each current source transistor 55, 65. The base-emitter path of each current transistor is connected in series across a common bias power supply. The desired coring level is controlled by varying a variable DC impedance shunt connected to the base-emitter path of one of the current source transistors. The variable DC impedance consists, for example, of the collector-emitter circuit of the first control transistor, which allows the biasing of the base-emitter junction to be adjusted.

As an example of an application of the invention, the signal subject to variable coring is a peaking signal derived from the luminance component of a television signal for use in enhancing horizontal details during image reproduction. In such applications of the invention, the variable cored peaking signal is then subjected to a closed-loop automatic peaking control scheme to substantially prevent adjustment of the coring level from unnecessarily affecting the level of peaking obtained. It is desirable to prevent this.

According to another variant of the invention, the coring method described above can automatically eliminate the coring effect at the lower limit of the coring level control range.

In this modification, the coring level control method utilizes, in addition to the first control transistor described above, a second control transistor of the opposite conductivity type.
The emitter electrode of the second control transistor is connected to the base electrode of one of the current source transistors of the limiting amplifier, and the emitter-collector circuit is shunted across the series circuit of the base-emitter circuits of the two current source transistors. ing. The base electrode of the second control transistor is adapted to respond to the same coring level control voltage used to variable bias the first control transistor. Over a wide part of the coring level control range, the base-emitter junction of the second control transistor is reverse biased, in which case the second control transistor is cut off and the operation of the variable coring is unaffected by this. However, near the lower limit of the coring level control range, the base-emitter path of the second control transistor becomes forward biased. Strong conduction by the second control transistor when the lower limit of this coring level control range is reached allows the limiting amplifier to be deenergized and eliminate coring action.

[Embodiments of the invention]

In the scheme of FIG. 1, a signal from a signal source 11 is applied to the inputs of a linear amplifier 13 and a multistage limiting amplifier 15. The magnitude of the total gain +G ₁ provided by the multistage limiting amplifier 15 is the gain of the linear amplifier 13 -
Equal to the magnitude of G ₁ , the outputs of both amplifiers are in antiphase relationship, eg, linear amplifier 13 provides a net phase reversal while limiting amplifier 15 does not.

The output of the linear amplifier 13 is a linearly converted version of the input, while the multistage limiting amplifier 15 functions as a nonlinear signal translator that produces a twice-clipped version of the input signal. The signal combiner 17 sums the outputs of both amplifiers 13 and 15 to generate a cored version of the input signal, and applies this to the signal gain circuit 19. The waveform of the cored signal applied to this utilization circuit 19 corresponds to the waveform of the input signal without the "core" near the center axis, which has been removed by cancellation in the combiner 17.

The gain distribution between each cascaded stage of multistage limiting amplifier 15 is adjusted by gain distribution control circuit 23 in response to a variable control voltage generated by variable coring control voltage source 21 without substantially compromising its overall gain. Ru. A convenient method of changing the distribution between the cascaded stages of the multistage limiting amplifier 15 in this way is described, for example, in 1982.
No. 363,869, dated March 31, 1984 (corresponding to US Pat. No. 4,464,633, dated August 7, 1984).

As the distribution of gain between the cascaded input and output stages of amplifier 15 changes in response to changes in the control voltage of power supply 21, the relative size of the core removed by coupler 17 changes. That is, the coring depth or level of the input signal is adjusted in response to changes in the coring control voltage. Changes in the gain distribution that increase the gain of the input stage will cause the output stage to clip closer to the axis, thus reducing the coring level. Conversely, a change in gain distribution that reduces the gain of the input stage increases the coring level. However, by keeping the overall gain of amplifier 15 substantially constant despite this change in gain distribution, the difference between each portion of the input waveform of combiner 17 is necessary for accurate cancellation to perform coring at the selected level. Consistency is guaranteed.

FIG. 2 shows a circuit of an embodiment of the coring method of FIG. 1, which performs the function of variable coring of a horizontal peaking signal in a television receiver. In this embodiment, the differential amplifier 40 functions as the linear amplifier 13 of the type shown in FIG.
0 serves as a cascaded input/output stage of the multistage limiting amplifier 15 of the type shown in FIG.

In order to generate a peaking signal to be processed by a circuit embodying the principles of the invention, the output of the luminance signal source 25 (for example, in a color television receiver, constituted by the luminance signal output of its comb filter) is connected to the resistor 27. is applied to the input terminal L of the delay line 29 via. By way of example, delay line 29 is a broadband device that exhibits a linear phase characteristic over the frequency band occupied by the signal from signal source 25 (eg, up to 4.0 MHz), resulting in a signal delay of 140 ns. The input end of delay line 29 is terminated with an impedance that substantially matches its characteristic impedance (for example with the aid of resistor 27), and the output end is unterminated (at terminal L') to obtain a reflection effect. Therefore, the signals generated at both ends of the delay line 29 are (1) the once-delayed luminance signal at terminal L', and (2) the sum of the undelayed luminance signal and the twice-delayed luminance signal at terminal L. The difference between the signals at terminals L and L' is determined by adding the luminance signal to the luminance signal (by actually boosting the luminance component in the frequency range of 1.75 to 5.25 MHz at the -6 dB point to a maximum at 3.5 MHz). It corresponds to a horizontal peaking signal that is suitable for adding to and emphasizing horizontal details.

Differential amplifier 40, which receives signals from terminals L and L' at its respective differential inputs, provides a linear amplification channel for such peaking signals. This amplifier 40 includes a pair of NPN transistors 41 and 43, and the emitter electrodes of both transistors are connected to each other.
It is returned to a reference potential point (eg, ground) via the collector-emitter circuit of the NPN current source transistor 45 and an emitter resistor 46 connected in series thereto. The base electrode of transistor 45 is connected to the positive terminal (+1.2V) of a bias potential source to set the required operating current of amplifier 40.

A signal from terminal L' is supplied to the base electrode of transistor 41 via NPN emitter follower transistor 34 and series-coupled resistor 36. The collector electrode of transistor 34 is connected directly to the positive terminal of the operating potential source + _Vcc , and the emitter electrode of transistor 34 is connected to the collector-emitter circuit of current source transistor 35 (with its base electrode connected to the +1.2V bias supply terminal). and is returned to the ground point via an emitter resistor 26 in series with this. The signal from terminal L is NPN emitter follower transistor 3.
The signal is supplied to the base electrode of the transistor 43 via a base-emitter circuit of 0 and a coupled resistor 32 connected in series thereto. The collector electrode of transistor 30 is directly connected to the +V _cc supply terminal, and the emitter electrode is connected to the collector-emitter circuit of current source transistor 31 (whose base electrode is connected to the +1.2V bias supply terminal) and emitter resistor 28 in series therewith. is returned to the grounding point via the Although the terminals L and L' are directly connected to the bases of the emitter follower transistors 30 and 34, an emitter follower (not shown) may be additionally inserted in each connection to increase the impedance given to each terminal. is desirable.

Resistor 38 connects the base electrodes of transistors 41 and 43 and cooperates with coupling resistors 36 and 32 to ensure that the maximum signal difference between the base potentials of the input signal is such that it fits within the linear signal handling range of amplifier 40. Leads to decay. The collector electrodes of transistors 41 and 43 are each connected to the positive terminal of the operating potential source by a load (not shown) that is respectively assigned to the output of the control amplifier. The collector currents of the transistors 41 and 43 vary according to the peaking signals having opposite phases.

The differential amplifier 50 has terminals L,
A multi-stage limiting amplifier 15 receives the signal from L' and provides a non-linear amplification channel for the peaking signal.
functions as an input stage. Amplifier 50 includes a pair of NPN transistors 51 and 53 whose emitter electrodes are connected to each other and grounded via a collector-emitter circuit of NPN current source transistor 55. A signal from terminal L', which occurs at the output of emitter follower transistor 34, is applied to the base electrode of transistor 51 via series-coupled resistor 37. A resistor 39 couples the base electrodes of transistors 51 and 53 together. Resistance 37, 39, 3
The attenuation of the input signal provided by network 3 is less than the attenuation provided by linear amplifier networks 36, 38, and 32, such that the maximum base-to-base signal swing may exceed the linear signal handling range of amplifier 50. do.

The collector electrodes of transistors 51 and 53 are connected to the positive terminal of the operating potential source +4.0V through load resistors 57 and 59, respectively.

A differential amplifier 6 serves as an output stage of the multi-stage limiting amplifier 15 and further clips the peaking signal.
0 includes a pair of NPN transistors 61 and 63 whose emitter electrodes are connected to the collector electrode of a current source transistor 65. transistor 65
The collector electrode of the current source transistor 55 is grounded via the base-emitter circuit, and the base electrode of the transistor 61 is connected to the input stage transistor 51.
The collector electrode of the transistor 63 is directly connected to the collector electrode of the transistor 53 in the input stage, and the base electrode of the transistor 63 is directly connected to the collector electrode of the transistor 53 in the input stage.

The collector electrode of transistor 61 is directly connected to the collector electrode of transistor 41 of linear amplifier 13 such that the sum of the collector currents of transistors 41 and 61 forms a cored peaking signal current I _p ', and transistor 63 The collector electrode of the transistor 43 is directly connected to the collector electrode of the transistor 43 of the linear amplifier 13.
The sum of the 63 collector currents is adapted to form a cored peaking signal current I _p (of the opposite phase of I _p ').

A diode 6 whose positive terminal +3.2J of the bias potential source and its cathode are directly connected to the anode of the second diode 68.
A resistor 66 is connected between the anode of the diode 68 and the anode of the diode 68, and the cathode of the diode 68 is directly grounded so that the pair of diodes 67 and 68 are forward biased by a bias potential source. Further, the anode of the diode 67 is directly connected to the base electrode of the current source transistor 65, and the voltage generated across the diodes 67 and 68 is connected to the base electrode of the current source transistor 65 and 55.
It is applied across the series circuit of the emitter circuit to forward bias its base-emitter junction.

The base electrode of the transistor 55 has one
It is directly connected to the collector electrode of the NPN transistor 71, and the emitter electrode of the transistor 71 is directly grounded, so that the collector-emitter circuit of the transistor 71 is connected to the base of the current source transistor 55 in the input stage.
A direct shunt connection is made to the Emitsuta circuit.

(The collector electrode was also directly connected to the +V _cc supply terminal)
A coring control voltage input terminal CC is connected to the base electrode of the NPN emitter follower transistor 75, and the emitter electrode of the transistor 75 is connected to the base electrode of the transistor 71 and the anode of the diode 72 via a resistor 73. . The cathode of diode 72 is directly connected to ground to shunt diode 72 directly to the base-emitter path of transistor 71. A positive coring control voltage applied to terminal CC controls the bias of transistor 71 to change the conductance of its collector-emitter path, thereby causing output signal currents I _p ,
Adjust the level of coring performed on I _p ′.

The level electrode of the current source transistor 65
The emitter electrode of the PNP control transistor 69 is directly connected, the collector electrode of the transistor 69 is directly grounded, and its emitter-collector circuit is directly shunted to the series circuit of the base-emitter circuits of the two current source transistors 65, 55. There is. A coring control voltage input terminal CC is directly connected to the base electrode of the control transistor 69.

In the figure, the coring control voltage source is illustrated as a manually controlled potentiometer 21, the variable tap of which is directly connected to the terminal CC, and the fixed terminals at both ends connected to the positive terminal +V and the grounded negative terminal of the DC voltage source, respectively. It is connected. As an example, the potential at the +V terminal is significantly greater than the potential 2V _be generated across the series circuit of diodes 67 and 68, so that the base-emitter junction of the PNP transistor 69 (with the control potential selected by the tap being at the potential 2V _be (when exceeds)
It remains reverse biased throughout most of the tap adjustment range. The variable coring control voltage can also be supplied from a dynamically controlled power supply (as is the case in the aforementioned US Pat. No. 4,167,749, for example). Throughout most of the adjustment range the PNP control transistor 69 is turned off and the operation of the variable coring scheme is as described below.

The base-emitter circuit of the transistor 65 is
(1) Base-emitter circuit of transistor 55,
(2) Form a voltage divider with a parallel circuit with the collector-emitter circuit of the transistor 71, and divide the bias voltage generated between the series diodes 67 and 68 at a voltage division ratio that depends on the conductance of the NPN control transistor 71. . As the shunt impedance provided by transistor 71 decreases (due to the increase in the coring control voltage), the base-emitter voltage V _be of current source transistor 55 decreases, thereby causing the base-emitter voltage of current source transistor 65 to decrease. increases in a complementary manner. Also, when the shunt impedance provided by the transistor 71 increases (due to a decrease in the coring control voltage),
The V _be of transistor 55 increases, which causes the V _be of transistor 65 to decrease in a complementary manner.

Therefore, when the coring control voltage is changed, the operating voltages of the differential amplifiers 50 and 60 are changed in a complementary manner, and therefore the gains of the two cascaded stages of the multistage limiting amplifier 15 are changed in a complementary manner. transistor 71
Since the influence of the change in DC impedance given by on the bias voltage generated across the diodes 67 and 68 can be ignored, the total gain of the multistage limiting amplifier 15, which is proportional to the product of the magnitude of the operating current of each stage, is: It is virtually unaffected even if the gain distribution between stages changes. Due to the precision of coring, the magnitude of the combined gain that is not affected by this is set so that the gains of the nonlinear and linear amplification channels are substantially equal.

Due to the change in gain distribution (caused by the reduction in coring control voltage) that increases the gain of input stage 50, output stage 60 clips closer to axis and thus lowers the coring level.
Conversely, a change in the gain distribution (consisting of an increase in the coring control voltage) that reduces the gain of the input stage will raise the coring level.

However, as the position of the variable tap of potentiometer 21 approaches its ground terminal, the base-emitter junction bias of PNP control transistor 69 moves in the forward direction, creating conduction in the emitter-collector path of transistor 69. At the limit of the control range where the tap is at the ground terminal, this continuity is large enough;
Current source transistors 65, 55 are cut off, thus eliminating coring of the horizontal peaking signal.

FIG. 3 shows another signal processing device suitable for applying the peaking signal coring circuit of FIG. 2.
In FIG. 3, the (push-pull) cored peaking signal outputs I _p , I _p ' of the device of FIG. 2 are provided as signal inputs of a gain-controlled peaking signal amplifier 101. Amplifier 101 is a peaking control terminal
Converts the cored peaking signal with a gain (or attenuation) determined by the control voltage applied to the PC.

The push-pull output of the amplifier 101 is summed by the signal combiner 103 with the push-pull output of the luminance signal amplifier 105 according to the delayed luminance signal at the terminal L' (FIG. 2), and the peaked luminance signal amplifier 10
A push-pull type of peaked luminance signal to be applied to 7 is formed. The amplifier 107 outputs this push-pull peaked luminance signal input to the output terminal O.
This signal is converted into a single-ended type, and applied to, for example, a matrix circuit of a color receiver to be combined with each color difference signal.

The output of amplifier 107 is also applied to the input of bandpass amplifier 109 for automatic peaking control. For example, the amplifier 109 has a center frequency of about 2 MHz and a bandwidth of about 2 MHz.
A 1 MHz passband is shown, and the portion of the peaked luminance signal within this passband is applied to a peak detector 110 which generates a control voltage proportional to the amplitude of the applied component. This control voltage is applied to the terminal PC and controls the magnitude of the peaking signal applied to the coupler 103 in a direction that counteracts the change in the amplitude of the supplied component.
U.S. patent application Ser.
Examples of useful circuits performing the functions of No. 5,107,109,110 (along with manual peaking control) are disclosed.

An advantage of utilizing the variable coring scheme of FIG. 2 in the apparatus of FIG. 3 is that any adverse effects on peaking levels are substantially avoided when adjusting the coring level. To illustrate this point, for example, changing the coring control voltage is
It is thought that this is done to increase the coring level in order to improve the ability to remove noise components from the peaking signal output of the device shown in the figure. Such large core removal reduces the amplitude of the residual peaking signal components in the outputs I _p and I _p '. However, in the automatic peaking control scheme of FIG. 3, by introducing complementary changes in the gain of amplifier 101, any reduction in peaking effect caused by such amplitude reduction is prevented.

For example, the values of each element in the circuit of FIG. 2 are as follows.

Resistance 26, 28 2KΩ 〃27 680Ω 〃32, 36 2.4KΩ 〃33, 37 470Ω 〃38 1KΩ 〃39 4.7KΩ 〃46, 57, 59 500Ω 〃66 13.3KΩ 〃73 25KΩ Potential (+V _cc ) 11.2V

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a coring circuit implementing the principle of the present invention, and Fig. 2 is a portion showing an embodiment of the coring circuit of Fig. 1 for variable coring of a peaking signal in a television receiver. Block Circuit Diagram FIG. 3 is a block diagram showing an automatic peaking control system suitable for applying the apparatus of FIG. 2. 11... Signal source, 13; 40... Linear amplifier, 15
...Multi-stage limiting amplifier, 17... Signal combining means, 21...
Supply source of variable control voltage, 23... Gain distribution control circuit, 50... First signal amplification stage, 55... First output, 60... Second signal amplification stage, 65... Second output, CC... Input.

Claims (1)

[Claims] 1. A linear amplifier with a predetermined gain that generates a linearly amplified output signal in response to an input signal; a first signal amplification stage and a second signal amplification stage connected in cascade; , each amplification stage having a controllable gain, the first amplification stage having an input coupled to receive the input signal, and the second amplification stage having a controllable gain. a multistage limiting amplifier having an output for generating an amplitude limited output signal with a limiting level that varies proportionally to the relative gains of the two amplifier stages; and an input coupled to a source of a variable control voltage. , a first output connected to supply a first gain control signal to the first signal amplification stage, and a second gain control signal complementary to the first gain control signal to the first signal amplification stage. a second output connected to supply a second signal amplification stage, the gain of the first amplification stage and the second amplification stage being in opposite directions in response to a change in the variable control voltage; such that the total gain of the multi-stage limiting amplifier is always substantially equal to the predetermined magnitude of the linear amplifier, and the relative gains of the first and second amplification stages are controlled to be gain control means for controlling in proportion to the value of the variable control voltage; and combining the linearly amplified signal with the amplitude limited output signal to obtain a coring level controlled by the variable control voltage. An apparatus for performing a variable amount of coring on an input signal, the apparatus comprising: signal synthesis means for supplying an output signal that has been subjected to coring processing;