JPH04340815A - Digital/analog converter - Google Patents

Abstract

PURPOSE:To offer a digital/analog converter by which the luminance of a CRT can be controlled to be changed almost lineally corresponding to a gradation. CONSTITUTION:Resistance groups A and B constituted of weighting resistances RA1-RA3, RB1-RB3, and RC, by which different output inclination characteristics can be obtained by the same input digital signal, are prepared for this converter. Then, the resistance groups A and B the most suited to the objective output inclination characteristic, are selected, and allowed to operate a conversion into an analog signal. Thus, the output characteristic of the converter can be operated by the free inclination, and the control of the CRT can be further practically operated.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital-to-analog converter used for displaying gradation images on a CRT (cathode ray tube) using digital signals.

0002

[Background Art] When an image signal with gradation is obtained using a digital signal, in order to display the image on a CRT, a digital-to-analog (D/A) converter is required to convert the digital signal into an analog signal. Is required. FIG. 2 shows a conventional D/A converter connection diagram. A 4-bit parallel digital signal is input to the converter shown in the figure. This digital signal is converted into X1, X2, X3,
It shall be expressed as X4. These signals are sent to open collector output type inverters B1, B2, and B, respectively.
3, input to this circuit via B4. Inverter B1
, B2, B3, and B4 are connected to weighting resistors R1, R2, R3, and R4, respectively. All one ends of these weighting resistors R1 to R4 are connected to the power supply 9 via a voltage dividing resistor RD. The output transistor TR of this circuit consists of an NPN type transistor, with the collector connected to the power supply 9 and the base connected to the inverter B1.
The emitter is connected to the output resistor RO at the connection between ~B4 and the voltage dividing resistor RD. One end of this output resistor RO is grounded. The output of this circuit is obtained from the emitter of the transistor TR, which is a so-called emitter follower system. Before giving a more specific explanation of this circuit, a device in which this circuit is used will be explained.

FIG. 3 shows a block diagram of a general CRT interface device. The device shown in the figure uses a digital luminance signal 2
is received by a D/A converter 1, an analog luminance signal 3 is obtained, and an image is displayed on a CRT 4. As the D/A converter 1 of such a device, a circuit as shown in FIG. 2 is used. Returning to FIG. 2 again, inverters B1 to B4 of this D/A converter exhibit open collector output characteristics as explained earlier, and when the input signal is high level, the output is low level, and when the input signal is low level, the output characteristic is low level. This is a circuit that shows a high impedance state. In addition, the weighting resistances R1, R2, R3, and R4 are as follows (1)
Its value is selected as shown in the formula. R1=2R2=4R3=8R4... (1) If the value of the weighting resistor is selected in this way, the inverter B
When one or more of the inverters 1 to B4 have their outputs at a low level, 1 to 4 weighting resistors are connected in parallel in various combinations.

Therefore, the connection point between the weighting resistors R1 to R4 and the voltage dividing resistor RD, ie, the base voltage of the transistor TR, is determined by the ratio of the combined resistance of the weighting resistors R1 to R4 and the value of the voltage dividing resistor RD. By selecting the value of each voltage dividing resistor as shown in equation (1) above, 16 levels of base voltage can be obtained using a 4-bit digital signal. The emitter voltage of the output transistor TR is the sum of the base voltage and the emitter-base voltage VBE. The emitter-base voltage VBE normally exhibits a constant value of about 0.6 volts. If the base voltage of this D/A converter is expressed as VB and the output voltage as V0, its output configuration will be as follows.

FIG. 4 shows an explanatory diagram of analog output characteristics for each gradation. In the figure, (a) shows the signal gradation in 16 levels, and (b) to (e) each represent the signal level of each bit of the 4-bit digital signals X4 to X1. Note that all of these signals are assumed to be low active, and are valid when they are at low level. Further, FIG. 4(f) represents the analog output signal level shown in FIG. As shown in the figure, when the D/A converter is driven under the conditions shown in FIG. 2, an output voltage V0 that increases linearly and stepwise at equal intervals with respect to the input digital signal is obtained. If the input signal is not 4 bits but 8 bits or 16 bits
Even if the number of bits increases, such as bits, the same configuration will be obtained.

[0006]

By the way, a CRT driven by the above-mentioned circuit has the following characteristics. FIG. 5 shows an explanatory diagram of brightness characteristics of a general CRT. The graph in the figure shows the input voltage on the horizontal axis and the brightness of the CRT on the vertical axis. As shown in the figure, a typical CRT should logically change its brightness as shown by the solid line 7 in response to the input voltage, but in reality, the brightness does not change linearly as shown by the broken line 8. , when the input voltage is low, the brightness change is small, and when the input voltage is high, the brightness change is large. If the D/A converter described above with reference to FIG. 2 is used for such a CRT, the following problem will occur.

FIG. 6 shows CRT luminance characteristics with respect to conventional gradations. Part (a) of the figure shows the analog output signal level. This characteristic is the same as that previously explained using FIG. 4(f). When a general CRT is driven at such an output signal level, in the case of a CRT luminance characteristic as shown in FIG. 6(b), the luminance for each signal is determined as shown in FIG. 6(c). That is, when the gradation changes in 16 steps from F to 0, the brightness characteristic of the CRT is preferably linear as shown by the broken line 11 shown in FIG. 6(c). However, in reality, the brightness changes are small in low gradation areas,
A curved characteristic (waveform 10) in which the luminance change becomes large is obtained in a high gradation portion. This poses a problem in that it is difficult to make a difference in brightness in areas with low brightness, and conversely the difference in brightness becomes too large in areas with high brightness. The present invention has been made in view of the above points, and provides a digital-to-analog converter that can control the brightness of a CRT so that it changes almost linearly in accordance with gradations in this type of circuit. The purpose is to

[0008]

[Means for Solving the Problems] The digital-to-analog converter of the present invention selects a composite resistance of a plurality of weighted resistors according to an input digital signal, and converts an output analog signal corresponding to the input digital signal by a terminal voltage of the composite resistor. In a device that obtains a signal, the weighting resistor is divided into a plurality of resistance groups, and the value of the weighting resistor of each group is selected so that different output slope characteristics can be obtained for the same input digital signal, and the value of the weighting resistor of each group is selected to meet the target. The present invention is characterized in that a characteristic selection unit is provided that switches the selection of the weighting resistor group according to the value of the input digital signal in accordance with the output slope characteristic to be determined.

[0009]

[Operation] This converter has a plurality of weighted resistor groups prepared so that different output slope characteristics can be obtained in response to the same input digital signal. Then, the resistor group that best matches the target output slope characteristic is selected and converted into an analog signal. This allows the output characteristics of the converter to be adjusted to a free slope, making it possible to control the CRT more practically.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained in detail below using examples shown in the drawings. FIG. 1 is a D/A converter connection diagram of the present invention. The circuit shown in the figure is a circuit that receives 4-bit digital signals X1 to X4 and obtains an analog output voltage V0, similar to the conventional circuit explained using FIG. 2 earlier. The configuration and wiring of the output transistor TR, output resistor R0, voltage dividing resistor RD, etc. of this circuit are the same as those of the conventional circuit explained using FIG. 2. That is, the circuit of FIG. 1 is a circuit that changes the base voltage VB of the output transistor TR in accordance with the level of the input analog signal to obtain the corresponding analog output voltage V0. Here, in order to change the base voltage VB of the output transistor TR, the converter of the present invention includes inverters M, MC, seven driver NAND gates GA1-GA3, GB1-GB3, and GC, and weighting resistors RA1- RA3, RB1~RB3
and RC.

The driver NAND gates GA1 to GA3 have lower bits X1, X2, and X of the digital signal, respectively.
It is wired so that 3 is input. Similarly, the driver NAND gates GB1 to GB3 are also connected to receive the lower bits X1, X2, and X3 of the input digital signal, respectively. Inverter M and inverter MC are both connected to receive the most significant bit X4 of the input digital signal. Furthermore, the most significant bit X4 of the input digital signal is used as a gate opening/closing signal for the driver NAND gates GA1 to GA3, and the output signal of the inverter M is the gate opening/closing signal for the driver NAND gates GB1 to GB.
3 opening/closing control signals. The outputs of the driver NAND gates GA1 to GA3 each have a weighting resistor RA.
1 to RA3 are connected, and the driver NAND gates GB1 to
The output of GB3 has weighting resistors RB1 to RB, respectively.
3 is connected, and a weighting resistor RC is connected to the output of the inverter MC.

All of the weighting resistors mentioned above have one end connected to the voltage dividing resistor RD. In this embodiment, the weighting resistors RA1 to RA3 are group A, and the weighting resistors R
B1 to RB3 will be referred to as group B. Further, in the present invention, inverters M, MC and driver NAND gate G
A circuit including A1 to GA3 and GB1 to GB3 will be referred to as a characteristic selection section 20. D/ of the present invention having the above configuration
The A converter operates as follows.

FIG. 7 shows an explanatory diagram of analog output characteristics for each gradation according to the present invention. 7(a) to (e) show the input digital signal level for each gradation, which was previously explained with reference to FIG. 4. In FIG. Therefore, these input digital signals are made low active and valid at low level. The value of each weighting resistor in FIG. 1 above is
It is selected as shown in the following formula. RA1=2RA2=4RA3... (2) RB1
=2RB2=4RB3... (3) Furthermore, the ratio of the resistance values of the A group and the B group is selected in advance according to the target output slope characteristic as shown in the following equation. RA1:RB1=RA2:RB2=RA3:RB3
=1:3... (4) Furthermore, the value of the weighting resistor RC shown in FIG. , is selected appropriately depending on the amplitude conditions of the output voltage.

Now, looking at the most significant bit X4 of the input digital signal shown in FIG. 7(b), it is at a high level in the low gradation part and at a low level in the high gradation part. Therefore, the driver NAND gate G shown in FIG.
A1 to GA3 operate in accordance with the input signal in the low gradation portion. On the other hand, the driver NAND gates GB1 to GB3 are
Operates in accordance with the input signal in high gradation areas. As a result, the input digital signals X1 to X
4 forms a composite resistance in which the weighting resistors RC and RA1 to RA3 are combined by driver NAND gates M1 and GA1 to GA3. This determines the output voltage of the low gradation portion. FIG. 7(f) shows the characteristics of such an output voltage V0. On the other hand, in the high gradation portion, the input digital signals X1 to X4 are combined with weighted resistors RC and RB1 to RB3 selected by the operation of the driver NAND gates MC and GB1 to GB3. As a result, the output voltage V0 of the high gradation portion is formed as shown in FIG. That is, the D/ of the present invention shown in FIG.
The output voltage characteristics of the A converter have different slopes in a low gray scale part where the A group of weighting resistors operates and a high gray scale part where the B group of weighting resistors operate. In this example, the characteristics are such that the output voltage change for each gradation is large in the low gradation part, and the output voltage change for each gradation is small in the high gradation part.

FIG. 8 shows a CRT for gradation according to the present invention.
An explanatory diagram of brightness characteristics is shown. In FIG. 7(a), output voltage characteristics as shown in FIG. 7 are displayed. Furthermore, FIG. 8(b) shows the brightness characteristics of the CRT, and shows the brightness characteristics of the conventional CRT shown in FIG.
This figure shows the characteristics of . Figure 8 (
When a CRT with the brightness characteristics (waveform 7) as shown in b) is controlled with the output of the characteristics as shown in FIG.
A luminance characteristic (waveform 10) as shown in c) appears. Figure 8
(c) shows the gradation on the horizontal axis and the brightness on the vertical axis. As can be seen by comparing the characteristics in FIG. 8(c) with the characteristics in FIG. 6(c), the CRT luminance characteristics with respect to gradation according to the present invention are more similar to the target output slope characteristics shown by the broken line 11 in the figure. It has become a characteristic that has come close.

[0016] This makes it possible to linearly control brightness with respect to gradation changes. In other words, in low gradation areas, the output voltage is changed roughly, resulting in brightness change approaching the target output slope characteristic, and in high gradation areas, the output voltage is changed finely to achieve the target output slope characteristic. It's matching. In the illustrated example, characteristics that completely match the broken line 11 are not obtained in the low gradation portion. However, in the circuit shown in FIG. 1, by increasing the number of bits of the input digital signal and further dividing the weighting resistors into a larger number of groups,
By configuring the characteristic selection section 20 to select a large number of groups, control with even better linearity becomes possible.

The present invention is not limited to the above embodiments. In the above embodiment, the digital-to-analog converter was used to independently correct the brightness characteristics of a CRT. However, even when correcting the output characteristics of a digital-to-analog converter in other circuits, a similar configuration can be used to solve the problem of linearity. It goes without saying that the present invention functions effectively not only when the output is corrected linearly but also when the output characteristic is selected to have an arbitrary output slope characteristic.

[0018]

[Effects of the Invention] The digital-to-analog converter of the present invention described above has a plurality of resistor groups for weighting, and each resistor group is designed so that different output slope characteristics can be obtained for the same input digital signal. By selecting a value in advance, selecting one of the resistor groups according to the target output slope characteristic, and switching the selection of these resistor groups, it is possible to easily achieve the target with a relatively simple circuit. Any output slope characteristic can be achieved. This allows the CRT drive circuit using the digital-to-analog converter to be more controllable.

[Brief explanation of the drawing]

FIG. 1 is a D/A converter connection diagram of the present invention.

FIG. 2 is a conventional D/A converter connection diagram.

FIG. 3 is a block diagram of a general CRT interface device.

FIG. 4 is an explanatory diagram of analog output characteristics for each gradation.

FIG. 5 is an explanatory diagram of brightness characteristics of a general CRT.

FIG. 6 is an explanatory diagram of CRT luminance characteristics with respect to conventional gradations.

FIG. 7 is an explanatory diagram of analog output characteristics for each gradation according to the present invention.

FIG. 8 is an explanatory diagram of CRT luminance characteristics with respect to gradation according to the present invention.

[Explanation of symbols]

X1 to X4 Input digital signal 9 Power supply 20 Characteristic selection section M, MC Inverter GA1 to GA3, GB1 to GB3 Driver NAND gate RA1 to RA3, RB1 to RB3, RC Weighting resistor RD Voltage dividing resistor TR Output transistor R0 Output resistor

Claims (1)

[Claims] 1. A composite resistance composed of a plurality of weighted resistors is selected according to an input digital signal, and an output analog signal corresponding to the input digital signal is obtained by a terminal voltage of the composite resistance. The values of the weighting resistors for each group are selected so that different output slope characteristics can be obtained for the same input digital signal by dividing the input digital signal into groups, and the values of the weighting resistors for each group are selected according to the target output slope characteristics. Depending on the value,
A digital-to-analog converter comprising a characteristic selection section for switching the selection of the weighting resistance group.