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JPH0433657Y2 - - Google Patents

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Publication number
JPH0433657Y2
JPH0433657Y2 JP1986147418U JP14741886U JPH0433657Y2 JP H0433657 Y2 JPH0433657 Y2 JP H0433657Y2 JP 1986147418 U JP1986147418 U JP 1986147418U JP 14741886 U JP14741886 U JP 14741886U JP H0433657 Y2 JPH0433657 Y2 JP H0433657Y2
Authority
JP
Japan
Prior art keywords
circuit board
terminal
control circuit
sub
external input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986147418U
Other languages
Japanese (ja)
Other versions
JPS6354274U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986147418U priority Critical patent/JPH0433657Y2/ja
Publication of JPS6354274U publication Critical patent/JPS6354274U/ja
Application granted granted Critical
Publication of JPH0433657Y2 publication Critical patent/JPH0433657Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 産業上の利用分野 本考案は、上下多段に配置された基板間を、外
部機器との接続を行うための比較的大電流の流れ
る大型の接続端子によつて、電気的に接続してな
る電力半導体装置にかかり、特に、基板と接続端
子との半田付けを能率良く行うための接続構造に
関するものである。
[Detailed description of the invention] Industrial field of application The invention uses large connection terminals through which a relatively large current flows between boards arranged in multiple stages above and below to connect with external equipment. The present invention relates to a power semiconductor device that is electrically connected to each other, and particularly relates to a connection structure for efficiently soldering a board and a connection terminal.

従来技術 第2図及び第3図に示したのは、従来の電力半
導体装置をパツケージ化したものの一例であり、
トランジスタやダイオード等の半導体素子1を配
線パターン上に配置して接続した電力回路基板2
と、スイツチ類その他の各種電気部品5を配線パ
ターン上に配置して接続した制御回路基板6と
を、モールド用樹脂外枠3を介して二段に配置
し、上記電力回路基板2を上記モールド用樹脂外
枠3にシリコンゲル等の内部注型樹脂4により固
定すると共に、エポキシ樹脂等の最終封止樹脂7
を注入硬化して、全体を固定したものである。
Prior Art What is shown in FIGS. 2 and 3 is an example of a conventional power semiconductor device packaged.
A power circuit board 2 in which semiconductor elements 1 such as transistors and diodes are arranged and connected on a wiring pattern.
and a control circuit board 6 to which switches and other various electrical components 5 are arranged and connected on a wiring pattern are arranged in two stages via a resin outer frame 3 for molding, and the power circuit board 2 is placed in the mold. It is fixed to the resin outer frame 3 with an internal casting resin 4 such as silicone gel, and a final sealing resin 7 such as epoxy resin is used.
The entire structure was fixed by injection hardening.

前記電力回路基板2に直立状態で半田付けされ
た平板状の外部入出力用端子8,8,……は、外
部装置と上記電力半導体装置とを接続するための
接続端子で、前記制御回路基板6を貫通してその
端部が外側に突出しており、この外部入出力用端
子8を用いて外部装置との結線が行われる。
The flat external input/output terminals 8, 8, . 6 and its end protrudes outward, and the external input/output terminal 8 is used to connect to an external device.

従来技術の問題点 上記のような外部入出用端子8は、上記のよう
に外部装置との接続を行うためのものであるか
ら、端子を差し込んだり抜いたりすることができ
るようにある程度大きな外力に耐え得るようまた
電力回路では比較的大きい電流を流す必要がある
ため、第4図a,bに示す如く比較的大型の平板
状となつており、従来の電力半導体装置では、上
記外部入出力用端子8と制御回路基板6とを第4
図bに示す如く、外部入出力用端子8の外周全長
にわたつて半田付け10することにより、電気的
に接続している。しかし、上記のような半田付け
10をする場合、半田付け時の熱が外部入出力用
端子8自身及びこの外部入出力用端子8が接続さ
れている電力回路基板2に伝達され、放熱される
ために良好な半田付けが行われない場合が生じる
という不都合があつた。
Problems with the Prior Art Since the external input/output terminal 8 as described above is for connecting with an external device as described above, it must be subjected to a certain amount of external force so that the terminal can be inserted or removed. In order to withstand the current, it is necessary to flow a relatively large current in the power circuit, so it has a relatively large flat plate shape as shown in Figure 4a and b, and in conventional power semiconductor devices, the external input/output The terminal 8 and the control circuit board 6 are connected to the fourth
As shown in FIG. b, the external input/output terminal 8 is electrically connected by soldering 10 over the entire length of the outer periphery. However, when performing the soldering 10 as described above, the heat during soldering is transferred to the external input/output terminal 8 itself and the power circuit board 2 to which this external input/output terminal 8 is connected, and is radiated. Therefore, there is a problem that good soldering may not be achieved.

考案の目的 従つて、本考案が目的とするところは、半田付
けを行つた際に余分な放熱が行われず、従つて、
半田付け時における歩溜りの向上を可能とする構
造の電力半導体装置を提供することである。
Purpose of the invention Therefore, the purpose of the present invention is to prevent excess heat from being dissipated during soldering, and to
An object of the present invention is to provide a power semiconductor device having a structure that enables an improvement in yield during soldering.

考案の構成 上記目的を達成するために本考案が採用する主
たる手段は、上下多段に配置された電力回路基板
と制御回路基板との間を該電力回路基板上に導通
状態で立設された外部入出力用の接続端子によつ
て電気的に接続してなる電力半導体装置におい
て、上記接続端子の胴部を上記制御回路基板を非
導通の状態で貫通させると共に、該接続端子の側
部に、この接続端子よりも幅の狭い側面視でL字
形状の副端子を一体的に取り付け、上記副端子の
先端部に至る延設部分を上記制御回路基板から離
間させて上記先端部のみを上記制御回路基板に半
田付けして、基板相互を電気的に接続するように
した点を要旨とする電力半導体装置である。
Structure of the invention The main means adopted by the invention to achieve the above object is to connect the power circuit board and the control circuit board, which are arranged vertically in multiple stages, with an external In a power semiconductor device electrically connected by input/output connection terminals, the control circuit board is passed through the body of the connection terminal in a non-conducting state, and a side part of the connection terminal is provided with: A sub-terminal having an L-shape in side view and narrower than the connecting terminal is integrally attached, and the extending portion reaching the tip of the sub-terminal is separated from the control circuit board, so that only the tip is controlled as described above. This is a power semiconductor device that is soldered to a circuit board to electrically connect the boards to each other.

実施例 続いて、第1図a及びbを参照して、本考案を
具体化した実施例につき説明し、本考案の理解に
供する。ここに第1図は本考案の一実施例に係る
電力半導体装置の基板間接続構造についてのもの
で、同図aは同接続構造に用いることのできる外
部入出力用端子の一例を示す正面図、同図bは同
外部入出力用端子の電力半導体装置への取り付け
状態を示す第4図b相当図である。
Embodiments Next, embodiments embodying the present invention will be described with reference to FIGS. 1a and 1b to provide an understanding of the present invention. FIG. 1 shows an inter-board connection structure of a power semiconductor device according to an embodiment of the present invention, and FIG. 1A is a front view showing an example of external input/output terminals that can be used in the connection structure. 4B is a view corresponding to FIG. 4B showing how the external input/output terminals are attached to the power semiconductor device.

尚、第2図乃至第4図に示した従来技術の構成
要素と共通の要素には、同一の符号を使用して説
明する。
Note that the same reference numerals are used for the same elements as those of the prior art shown in FIGS. 2 to 4.

以下の実施例は、本考案の具体的一例にすぎ
ず、本考案の技術的範囲を限定する性格のもので
はない。
The following examples are merely specific examples of the present invention, and are not intended to limit the technical scope of the present invention.

第1図に示した実施例において、第2図乃至第
4図に示した従来例と異なる主たる点は、第1図
aに示す如く、外部入出力用端子8aの側部に、
側面視でL字形の小型の副端子11が一体的に取
り付けられている点である。この副端子11の外
部入出力用端子8aとの接続部における幅lは、
上記外部入出力用端子8aの副端子11との接続
部における幅Lよりはるかに小さく、従つて、副
端子11の先端に加えられた熱がこの副端子11
を伝達する時の抵抗が大きいために、外部入出力
用端子8aに向かつて放熱される熱量が非常に少
ないという点である。
The main difference between the embodiment shown in FIG. 1 and the conventional example shown in FIGS. 2 to 4 is that, as shown in FIG. 1a, the external input/output terminal 8a has a
The point is that the small sub-terminal 11, which is L-shaped when viewed from the side, is integrally attached. The width l at the connection part of the sub-terminal 11 with the external input/output terminal 8a is:
The width L of the external input/output terminal 8a at the connection part with the sub-terminal 11 is much smaller than the width L, and therefore, the heat applied to the tip of the sub-terminal 11 is
Since the resistance during transmission is large, the amount of heat radiated toward the external input/output terminal 8a is extremely small.

上記のような副端子11を一体的に具備した外
部入出力用端子8aは、第1図bに示す如く、外
部入出力用端子8aの胴部を第4図に示す従来例
と同様、制御回路基板6に設けた挿入孔12に挿
入することにより、制御回路基板6に対して機械
的に固定される。この場合、外部入出力用端子8
aの胴部と制御回路基板6とは非導通の状態にあ
る。また、副端子11の先端部は、上記外部入出
力用端子8aの胴部を挿入した取付孔12に隣接
して穿孔された副端子挿入孔13に挿入されると
共に、半田付け14により制御回路基板6に電気
的に接続される。
As shown in FIG. 1b, the external input/output terminal 8a integrally provided with the above-mentioned sub-terminal 11 has a main body part that is controlled in the same way as in the conventional example shown in FIG. By inserting it into the insertion hole 12 provided in the circuit board 6, it is mechanically fixed to the control circuit board 6. In this case, external input/output terminal 8
The body portion of a and the control circuit board 6 are in a non-conducting state. Further, the tip of the sub-terminal 11 is inserted into a sub-terminal insertion hole 13 bored adjacent to the mounting hole 12 into which the body of the external input/output terminal 8a is inserted, and the control circuit is connected by soldering 14. It is electrically connected to the substrate 6.

上記のように外部入出力用端子8aは、熱伝導
の悪い小型の副端子11を介して制御回路基板6
に半田付け14されるので、半田付け時の熱が副
端子11を通つて、外部入出力用端子8aに伝達
しにくく、そのため放熱による半田付けの失敗が
著しく少なくなる。更に、本実施例装置では、副
端子11の先端部のみが制御回路基板6に電気的
に接続されてその先端部に至る該副端子11の延
設部分は制御回路基板6から離間していることか
ら(第1図b参照)、この部分を通して制御回路
基板6に熱が逃げることもなく、その半田付け作
業を極めて良好に行い得る。
As mentioned above, the external input/output terminal 8a is connected to the control circuit board 6 via the small sub-terminal 11 with poor thermal conductivity.
Since the soldering is performed 14, heat during soldering is difficult to be transmitted to the external input/output terminal 8a through the sub-terminal 11, and therefore failures in soldering due to heat radiation are significantly reduced. Furthermore, in the device of this embodiment, only the tip of the sub-terminal 11 is electrically connected to the control circuit board 6, and the extending portion of the sub-terminal 11 to the tip is separated from the control circuit board 6. Therefore, heat does not escape to the control circuit board 6 through this portion (see FIG. 1b), and the soldering work can be performed extremely well.

本考案においては上記したように、外部入出力
用端子8aのような接続端子からの熱を避けるた
め、小型の副端子を接続端子に設けると共にその
副端子の先端部のみを制御回路基板に半田付け
し、これにより半田付け時の放熱をできるだけ少
なくしようとするものであるため、副端子の構造
は、第1図に示したようなものに限定されず、
種々の形態のものが考えられる。
As mentioned above, in the present invention, in order to avoid heat from the connection terminals such as the external input/output terminal 8a, a small sub-terminal is provided on the connection terminal, and only the tip of the sub-terminal is soldered to the control circuit board. The structure of the sub-terminals is not limited to that shown in Fig. 1, as the aim is to minimize heat dissipation during soldering.
Various forms are possible.

また基板の段数は、前記実施例に示した2段に
限らず、3段以上であつてもよく、接続端子はそ
れらの基板は副端子を介して電気的い接続され
る。
Further, the number of stages of boards is not limited to the two stages shown in the above embodiment, but may be three or more stages, and the connection terminals are electrically connected to these boards via sub-terminals.

考案の効果 本考案は、以上述べたように、上下多段に配置
された電力回路基板と制御回路基板との間を該電
力回路基板上に導通状態で立設された外部入出力
用の接続端子によつて電気的に接続してなる電力
半導体装置において、上記接続端子の胴部を上記
制御回路基板を非導通の状態で貫通させると共
に、該接続端子に側部に、この接続端子よりも幅
の狭い側面視でL字形状の副端子を一体的に取り
付け、上記副端子の先端部に至る延設部分を上記
制御回路基板から離間させて上記先端部のみを上
記制御回路基板に半田付けして、基板相互を電気
的に接続するようにした電力半導体装置であるか
ら、接続端子を基板に半田付けする際には、副端
子を用いて行うことになり、副端子が小型で熱伝
達性が悪いことから、半田の放熱を防止し、半田
付けの成功率が著しく向上することになる。更
に、本考案に係る装置では、副端子の先端部のみ
が制御回路基板に電気的に接続されてその先端部
に至る該副端子の延設部分は制御回路基板から離
間していることから、この部分を通して制御回路
基板に熱が逃げることもなく、その半田付け作業
を極めて良好に行い得る。
Effects of the Invention As described above, the present invention provides connection terminals for external input/output that are installed upright on the power circuit board in a conductive state between the power circuit board and the control circuit board arranged in multiple stages above and below. In the power semiconductor device, the body of the connection terminal is passed through the control circuit board in a non-conducting state, and the side part of the connection terminal has a width wider than the connection terminal. An L-shaped sub-terminal is integrally attached when viewed from a narrow side, and an extended portion reaching the tip of the sub-terminal is separated from the control circuit board, and only the tip is soldered to the control circuit board. Since this is a power semiconductor device in which the boards are electrically connected to each other, sub-terminals are used to solder the connection terminals to the board. This prevents heat dissipation from the solder and significantly improves the soldering success rate. Further, in the device according to the present invention, only the tip of the sub-terminal is electrically connected to the control circuit board, and the extending portion of the sub-terminal to the tip is separated from the control circuit board. Heat does not escape to the control circuit board through this part, and the soldering work can be performed extremely well.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例にかかる電力半導体
装置の基板間接続構造に関するもので、同図a
は、同接続構造に用いることのできる接続端子の
一例を示す正面図、同図bは同接続端子の基板へ
の取り付け状態を示す正断面図、第2図乃至第4
図は従来の電力半導体装置の基板間接続構造に関
するもので、第2図は同側断面図、第3図は第2
図における平面図、第4図は第3図におけるA−
A矢視断面図(第1図b相当図)である。 符号の説明、2……電力回路基板、6……制御
回路基板、8a……外部入出力用端子(接続端
子)、11……副端子、12……取付孔、13…
…副端子挿入孔、14……半田付け。
FIG. 1 shows an inter-board connection structure of a power semiconductor device according to an embodiment of the present invention.
2 is a front view showing an example of a connecting terminal that can be used in the same connection structure, FIG.
The figures relate to the connection structure between the boards of a conventional power semiconductor device.
The plan view in the figure, Figure 4 is A- in Figure 3.
It is a sectional view taken along arrow A (a view corresponding to FIG. 1b). Explanation of symbols, 2...Power circuit board, 6...Control circuit board, 8a...External input/output terminal (connection terminal), 11...Subterminal, 12...Mounting hole, 13...
...Subterminal insertion hole, 14...Soldering.

Claims (1)

【実用新案登録請求の範囲】 上下多段に配置された電力回路基板と制御回路
基板との間を該電力回路基板上に導通状態で立設
された外部入出力用の接続端子によつて電気的に
接続してなる電力半導体装置において、 上記接続端子の胴部を上記制御回路基板を非導
通の状態で貫通させると共に、該接続端子の側部
に、この接続端子よりも幅の狭い側面視でL字形
状の副端子を一体的に取り付け、上記副端子の先
端部に至る延設部分を上記制御回路基板から離間
させて上記先端部のみを上記制御回路基板に半田
付けして、基板相互を電気的に接続するようにし
た電力半導体装置。
[Scope of Claim for Utility Model Registration] Electrical connection between a power circuit board and a control circuit board arranged in multiple stages above and below through connection terminals for external input/output installed in a conductive state on the power circuit board. In the power semiconductor device, the body of the connection terminal passes through the control circuit board in a non-conducting state, and a side part of the connection terminal has a width narrower than the connection terminal in side view. An L-shaped sub-terminal is integrally attached, the extending portion reaching the tip of the sub-terminal is separated from the control circuit board, and only the tip is soldered to the control circuit board to connect the boards to each other. A power semiconductor device that is electrically connected.
JP1986147418U 1986-09-25 1986-09-25 Expired JPH0433657Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986147418U JPH0433657Y2 (en) 1986-09-25 1986-09-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986147418U JPH0433657Y2 (en) 1986-09-25 1986-09-25

Publications (2)

Publication Number Publication Date
JPS6354274U JPS6354274U (en) 1988-04-12
JPH0433657Y2 true JPH0433657Y2 (en) 1992-08-12

Family

ID=31060758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986147418U Expired JPH0433657Y2 (en) 1986-09-25 1986-09-25

Country Status (1)

Country Link
JP (1) JPH0433657Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176674A (en) * 1981-04-22 1982-10-30 Yamatake Honeywell Co Ltd Printed board connecting tool
JPS6331409Y2 (en) * 1981-06-03 1988-08-22

Also Published As

Publication number Publication date
JPS6354274U (en) 1988-04-12

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