JPH04314235A - cell exchange device - Google Patents
cell exchange deviceInfo
- Publication number
- JPH04314235A JPH04314235A JP3079980A JP7998091A JPH04314235A JP H04314235 A JPH04314235 A JP H04314235A JP 3079980 A JP3079980 A JP 3079980A JP 7998091 A JP7998091 A JP 7998091A JP H04314235 A JPH04314235 A JP H04314235A
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- JP
- Japan
- Prior art keywords
- cell
- priority
- reserved
- address
- cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【0001】0001
【産業上の利用分野】この発明はATM(非同期転送モ
ード)方式の広帯域ISDN(サービス総合デジタル通
信網)でマルチメディア情報の各要求品質に応じ、入力
セル(ヘッダ部とデータ部の固定長ブロックからなる情
報の分割伝送単位)廃棄の優先制御をするセル交換装置
に関する。[Industrial Application Field] This invention is a wideband ISDN (Integrated Services Digital Network) based on the ATM (Asynchronous Transfer Mode) system. This invention relates to a cell switching device that performs priority control for discarding information (divided transmission unit of information consisting of).
【0002】0002
【従来の技術】たとえば文献(小崎他:共通バッファ形
ATMスイッチのLSI構成法、1989信学技報、S
SE89−144)に示す従来例の共通バッファ形セル
交換装置は図10のように、入力セル接続部1aは、入
力セル10をマルチプレクサで多重化し複数の入線1〜
nを共通バッファ部2aに接続する。共通バッファ部2
aは、バッファ領域を共通使用し、入力セル接続部1a
から多重化入力セルを制御部4aの書き込みアドレス指
令40で書き込み保留し制御部4aの読み出しアドレス
指令50で多重化出力セルを出力接続部3aに読み出す
。一方保留セルアドレスを出線対応に先入れ先出し(F
IFO)動作で保持する。出力セル接続部3aは、出力
セル20をデマルチプレクサで分離化し共通バッファ部
2aを複数の出線1〜nに接続する。制御部4aは、セ
ル廃棄一律優先制御手段を設け、入力セル接続部1aか
ら入力セルのヘッダ情報(出線宛先情報とセル廃棄優先
順位情報)30を解読し、入力セル廃棄の一律優先制御
をし共通バッファ部2aに書き込み読み出しアドレス指
令40と50をする。一方共通バッファ部2aの保留セ
ルアドレスの末尾に新たに書き込んだアドレス60を加
え、保留セルアドレスの先頭から順番に読み出したアド
レス70を未使用アドレスとして扱う。[Prior Art] For example, literature (Kozaki et al.: LSI configuration method for common buffer type ATM switch, 1989 IEICE Technical Report, S
In the conventional common buffer cell switching device shown in SE89-144), as shown in FIG.
n is connected to the common buffer section 2a. Common buffer section 2
a commonly uses the buffer area, and input cell connection section 1a
The write address command 40 of the control section 4a holds the multiplexed input cell from 1, and the read address command 50 of the control section 4a reads out the multiplexed output cell to the output connection section 3a. On the other hand, the reserved cell address is first in, first out (F
IFO) operation. The output cell connection section 3a separates the output cells 20 using a demultiplexer and connects the common buffer section 2a to a plurality of output lines 1 to n. The control unit 4a is provided with a cell discard uniform priority control means, decodes the header information (outgoing line destination information and cell discard priority information) 30 of the input cell from the input cell connection unit 1a, and performs uniform input cell discard priority control. Then, write and read address commands 40 and 50 are issued to the common buffer section 2a. On the other hand, the newly written address 60 is added to the end of the reserved cell addresses in the common buffer section 2a, and the addresses 70 sequentially read from the beginning of the reserved cell addresses are treated as unused addresses.
【0003】上記従来例の共通バッファ形セル交換装置
は、入力セル10の廃棄を優先セル(データ通信情報な
どの廃棄に対して厳しいセル)と非優先セル(画像情報
などの廃棄に対して緩いセル)ごとに一律的に優先制御
をする方式(セル廃棄一律優先制御方式)を採る。The above conventional common buffer type cell switching device discards input cells 10 by dividing them into priority cells (cells that are strict against discarding data communication information, etc.) and non-priority cells (cells that are lenient with respect to discarding image information, etc.). A method of uniform priority control for each cell (uniform cell discard priority control method) is adopted.
【0004】制御部4aのセル廃棄一律優先制御手段は
図11のように、まず共通バッファ部2aで保留する優
先セルと非優先セルの各計数信号11と12を優先セル
と非優先セルの各カウンタ5と6でそれぞれカウントす
る。つぎに優先セルと非優先セルの各カウンタ5と6の
各計数値を優先セルと非優先セルの各比較器7と8でX
とYの所定の各閾値(X>Y)とそれぞれ比較し、各閾
値を越えた優先セルと非優先セルを廃棄するように各廃
棄指令信号13と14を出力する。[0004] As shown in FIG. 11, the cell discard uniform priority control means of the control unit 4a first outputs the respective count signals 11 and 12 of the priority cells and non-priority cells held in the common buffer unit 2a to the respective count signals 11 and 12 of the priority cells and non-priority cells. Counters 5 and 6 respectively count. Next, each count value of each counter 5 and 6 of a priority cell and a non-priority cell is multiplied by each comparator 7 and 8 of a priority cell and a non-priority cell.
and Y with predetermined thresholds (X>Y), and outputs respective discard command signals 13 and 14 so as to discard priority cells and non-priority cells exceeding the respective thresholds.
【0005】[0005]
【発明が解決しようとする課題】上記のような従来のセ
ル交換装置では、入力セルの廃棄を優先セルと非優先セ
ルごとに一律的に優先制御をする方式(セル廃棄一律優
先制御方式)を採るから、非優先セルの割合が多いとバ
ッファ領域に十分余裕があるのに、閾値を越えた非優先
セルは廃棄されることになりバッファ領域を有効に使用
できない問題点があった。[Problem to be Solved by the Invention] In the conventional cell switching device as described above, there is a method (cell discard uniform priority control method) in which the discard of input cells is uniformly prioritized and controlled for each priority cell and non-priority cell. Therefore, if the ratio of non-priority cells is high, there is sufficient buffer space, but non-priority cells that exceed a threshold are discarded, resulting in the problem that the buffer space cannot be used effectively.
【0006】この発明が解決しようとする課題は、セル
交換装置で入力セルの廃棄を非優先セルだけ条件的に優
先制御をし、優先セルの廃棄に対する要求品質を満足し
、かつ非優先セルを必要以上に廃棄しないでバッファ領
域を有効に使用できる方式(セル廃棄条件優先制御方式
)を提供することにある。[0006] The problem to be solved by this invention is to conditionally control the discarding of input cells to only non-priority cells in a cell switching device, to satisfy the required quality for discarding priority cells, and to discard non-priority cells. The object of the present invention is to provide a method (cell discard condition priority control method) that can effectively use a buffer area without discarding more cells than necessary.
【0007】[0007]
【課題を解決するための手段】この発明のセル交換装置
は、上記課題を解決するためつぎの手段を備え、セル廃
棄条件優先制御方式を採ることを特徴とする。[Means for Solving the Problems] In order to solve the above problems, the cell switching device of the present invention is characterized by having the following means and adopting a cell discard condition priority control system.
【0008】入力セル接続部と出力セル接続部は、複数
の入線をバッファ部に接続し、バッファ部を複数の出線
に接続する。The input cell connection section and the output cell connection section connect a plurality of incoming lines to a buffer section, and connect the buffer section to a plurality of outgoing lines.
【0009】バッファ部は、入力セル接続部から入力セ
ルを制御部の書き込みアドレス指令で書き込み、保留し
、制御部の読み出しアドレス指令で出力セルを出力セル
接続部に読み出す。一方保留セルのアドレスを出線対応
にFIFO動作で保持する。The buffer section writes and holds input cells from the input cell connection section in response to a write address command from the control section, and reads out output cells to the output cell connection section in response to a read address command from the control section. On the other hand, addresses of reserved cells are held in correspondence with outgoing lines by FIFO operation.
【0010】制御部は、セル廃棄条件優先制御手段を設
け、入力セル接続部から入力セルのヘッダ情報(出線宛
先情報とセル廃棄優先順位情報)を解読し、入力セル廃
棄の条件優先制御をしバッファ部に書き込み読み出しア
ドレスを指令する。一方バッファ部の保留セルアドレス
の末尾に新たに書き込んだアドレスを加え、保留セルア
ドレスの先頭から順番に読み出したアドレスを未使用ア
ドレスとして扱う。The control unit is provided with a cell discard condition priority control means, which decodes the header information (outgoing line destination information and cell discard priority information) of the input cell from the input cell connection unit, and performs condition priority control for input cell discard. and commands the write/read address to the buffer section. On the other hand, the newly written address is added to the end of the reserved cell addresses in the buffer section, and the addresses sequentially read from the beginning of the reserved cell addresses are treated as unused addresses.
【0011】セル廃棄条件優先制御手段は、バッファ部
の保留セル満杯時だけ、入力優先セルを保留非優先セル
のアドレスに上書きし、上書きされたアドレスを2度読
みしないように制御し当該非優先セルを廃棄する。また
バッファ部の保留セル数を数え所定の条件を満たす時だ
け、非優先セルを廃棄する。またバッファ部の保留セル
数と保留セルアドレス数を数えそれぞれ所定の条件を満
たす時だけ、非優先セルを廃棄する。The cell discard condition priority control means overwrites the input priority cell with the address of the reserved non-priority cell only when the buffer section is full of reserved cells, and controls so that the overwritten address is not read twice. Discard the cell. Also, the number of reserved cells in the buffer section is counted and non-priority cells are discarded only when a predetermined condition is met. Also, the number of reserved cells and the number of reserved cell addresses in the buffer section are counted, and non-priority cells are discarded only when respective predetermined conditions are satisfied.
【0012】0012
【作用】この発明のセル交換装置は上記手段で、複数の
入線上の入力セルから条件的に優先制御をし非優先セル
を廃棄し、バッファ領域を有効に使用し複数の出線上の
出力セルを決定する。[Operation] The cell switching device of the present invention uses the above means to perform conditional priority control on input cells on a plurality of incoming lines, discard non-priority cells, effectively use buffer area, and output cells on a plurality of outgoing lines. Determine.
【0013】[0013]
【実施例】この発明を示す一実施例の分割共通バッファ
形セル交換装置は図1のように、上記従来例の図10に
対応する。ただし入力セル接続部1と出力セル接続部3
は、入力セル10と出力セル20を空間スイッチで経路
化する。分割共通バッファ部2は、バッファ領域を分割
し共通使用する。制御部4は、セル廃棄条件優先制御手
段を設け、入力セル廃棄の条件優先制御をする。DESCRIPTION OF THE PREFERRED EMBODIMENTS A divided common buffer type cell switching device according to an embodiment of the present invention is shown in FIG. 1, which corresponds to the conventional example shown in FIG. 10. However, input cell connection part 1 and output cell connection part 3
routes the input cell 10 and output cell 20 using a space switch. The divided common buffer section 2 divides the buffer area and uses it commonly. The control unit 4 is provided with a cell discard condition priority control means and performs condition priority control for discarding input cells.
【0014】上記実施例の分割共通バッファ形セル交換
装置は、入力セル10の廃棄を非優先セルだけ条件的に
優先制御をする方式(セル廃棄条件優先制御方式)を採
る。The divided common buffer type cell switching device of the above embodiment adopts a method (cell discard condition priority control method) in which discarding input cells 10 is conditionally controlled with priority only for non-priority cells.
【0015】制御部4のセル廃棄条件優先制御手段は図
2のように、分割共通バッファ部2の保留セル満杯時だ
け、入力優先セルを保留非優先セルのアドレスに上書き
し、上書きされたアドレスを2度読みしないように制御
し当該非優先セルを廃棄する。まず非優先セルアドレス
判定と保留セルアドレスフォーマット生成手段11で入
力セルヘッダのセル廃棄優先順位情報(優先/非優先判
定ビット)120から保留セルの書き込みアドレス11
0を判定し、非優先セルアドレスを非優先セルアドレス
バッファ12に保持する。一方保留セルの書き込みアド
レス110に優先/非優先判定ビットを付加したフォー
マットを生成し、分割共通バッファ部2の保留セル末尾
アドレス60とする。つぎに分割共通バッファ部2の保
留セル満杯時の入力優先セル上書き指令150で非優先
セルアドレスバッファ12からの当該非優先セルアドレ
スを入力優先セルの上書きアドレス130とし、同時に
上書きアドレスバッファ13に保持する。さらに分割共
通バッファ部2の保留セル先頭アドレス70から上書き
アドレス無効手段14で参照した上書きアドレスバッフ
ァ13にあり、かつ非優先判定ビットをもつ上書きされ
たアドレスを判定し無効にし、上書きされていないアド
レスを速度調整バッファ15でアドレスを無効にする速
度と保留セルを読み出す速度との差を吸収した上で保留
セルの読み出しアドレス140とする。なおアドレスを
無効にしても保留セルの読み出しに空きができスループ
ットが低下しないように、アドレスを無効にする速度を
保留セルを読み出す速度の数倍にしておく。またアドレ
スを無効にすると上書きアドレスバッファ13から当該
アドレスを削除する。As shown in FIG. 2, the cell discard condition priority control means of the control section 4 overwrites the input priority cell with the address of the reserved non-priority cell only when the divided common buffer section 2 is full of reserved cells, and uses the overwritten address. is controlled so that it is not read twice, and the non-priority cell is discarded. First, the non-priority cell address determination and reserved cell address format generation means 11 determines the write address 11 of the reserved cell from the cell discard priority information (priority/non-priority determination bit) 120 of the input cell header.
0 and holds the non-priority cell address in the non-priority cell address buffer 12. On the other hand, a format is generated in which a priority/non-priority determination bit is added to the write address 110 of the reserved cell, and the format is set as the reserved cell end address 60 of the divided common buffer unit 2. Next, with the input priority cell overwrite command 150 when the reserved cells of the divided common buffer unit 2 are full, the non-priority cell address from the non-priority cell address buffer 12 is set as the input priority cell overwrite address 130, and is held in the overwrite address buffer 13 at the same time. do. Furthermore, from the reserved cell start address 70 of the divided common buffer section 2, overwritten addresses in the overwritten address buffer 13 referred to by the overwritten address invalidating means 14 and having a non-priority determination bit are determined and invalidated, and the addresses that have not been overwritten are invalidated. is set as the read address 140 of the reserved cell after absorbing the difference between the speed at which the address is invalidated and the speed at which the reserved cell is read in the speed adjustment buffer 15. Note that the speed at which addresses are invalidated is set several times the speed at which reserved cells are read, so that the throughput will not decrease due to the vacant space in reading reserved cells even if the addresses are invalidated. Furthermore, when an address is invalidated, the address is deleted from the overwrite address buffer 13.
【0016】なお上記実施例で上書きされたアドレスを
2度読みしないように制御する手段は図3のようにして
もよい。まず非優先セルアドレス判定とアドレスフォー
マット生成手段11aで入力セルのヘッダ情報(出線宛
先情報とセル廃棄優先順位情報)30から保留セルの書
き込みアドレス110を判定し、非優先セルアドレスに
出線宛先番号と自ポインタ値(自身のアドレスが書かれ
ている位置)を付加したフォーマットを生成し、非優先
セルアドレスバッファ12に保持する。一方保留セルの
書き込みアドレス110に前ポインタ値(前のアドレス
が書かれている位置)と後ポインタ値(後のアドレスが
書かれている位置)を付加したフォーマットを生成する
。つぎに分割共通バッファ部2の保留セル満杯時の入力
優先セル上書き指令150で非優先セルアドレスバッフ
ァ12からの当該非優先セルアドレスを入力優先セルの
上書きアドレス130とする。さらに保留セルアドレス
フォーマット変換手段16で非優先セルアドレスバッフ
ァ12から当該上書きアドレス130の出線宛先番号と
自ポインタ値を受け、保留セルの書き込みアドレス11
0の生成フォーマットを変換し、分割共通バッファ部2
の保留セル末尾アドレス60とする。たとえば当該上書
きアドレス130の出線宛先番号としてn、自ポインタ
値として7を受けると、出線宛先番号nの保留セルアド
レスの自ポインタ値7で示される位置の前ポインタ値6
と後ポインタ値8を読み、前ポインタ値6で示される位
置の後ポインタ値7を8に書き換える。このように後ポ
インタ値を書き換え当該上書きアドレス130を飛ばし
て読み出す。In the above embodiment, the means for controlling to prevent the overwritten address from being read twice may be as shown in FIG. First, the non-priority cell address determination and address format generation means 11a determines the write address 110 of the reserved cell from the header information (outgoing destination information and cell discard priority information) 30 of the input cell, and sets the outgoing destination to the non-priority cell address. A format with a number and own pointer value (position where own address is written) is generated and held in the non-priority cell address buffer 12. On the other hand, a format is generated in which a previous pointer value (the position where the previous address is written) and a subsequent pointer value (the position where the next address is written) are added to the write address 110 of the reserved cell. Next, with an input priority cell overwrite command 150 when the reserved cells of the divided common buffer section 2 are full, the non-priority cell address from the non-priority cell address buffer 12 is set as the input priority cell overwrite address 130. Further, the pending cell address format conversion means 16 receives the outgoing line destination number and own pointer value of the overwrite address 130 from the non-priority cell address buffer 12, and receives the write address 11 of the pending cell.
Convert the generation format of 0 and divide common buffer section 2.
The last address of the reserved cell is 60. For example, when receiving n as the outgoing destination number and 7 as the own pointer value of the overwriting address 130, the previous pointer value 6 at the position indicated by the own pointer value 7 of the reserved cell address of the outgoing destination number n
and the rear pointer value 8 is read, and the rear pointer value 7 of the position indicated by the previous pointer value 6 is rewritten to 8. In this way, the post-pointer value is rewritten and the overwrite address 130 is skipped and read.
【0017】また上記実施例で制御部4のセル廃棄条件
優先制御手段は図4のように、分割共通バッファ部2の
保留セル数を数え所定の条件を満たす時だけ、非優先セ
ルを廃棄してもよい。まず分割共通バッファ部2の保留
セル計数信号210を保留セルカウンタ21でカウント
し、計数値を保留セル比較器22で所定の閾値と比較し
、入力セルのヘッダ情報(セル廃棄優先順位情報)30
をヘッダ解読器23で解読する。つぎに保留セル比較器
22とヘッダ解読器23の各結果からセル廃棄判定手段
24で判定し、閾値を越えた非優先セルだけを廃棄する
ようにセル廃棄指令信号220を出力する。In the above embodiment, the cell discard condition priority control means of the control section 4 counts the number of reserved cells in the divided common buffer section 2 and discards non-priority cells only when a predetermined condition is met, as shown in FIG. You can. First, the reserved cell count signal 210 of the divided common buffer unit 2 is counted by the reserved cell counter 21, the counted value is compared with a predetermined threshold value by the reserved cell comparator 22, and the header information (cell discard priority information) 30 of the input cell is
is decoded by the header decoder 23. Next, a cell discard determining means 24 makes a decision based on the results of the reserved cell comparator 22 and header decoder 23, and outputs a cell discard command signal 220 so as to discard only non-priority cells exceeding a threshold value.
【0018】なお上記実施例で保留セル比較器22とセ
ル廃棄判定手段24は図5のように、閾値Aが閾値Bよ
り大きい複数の保留セル比較器22aで計数値を所定の
閾値と比較し、セル廃棄判定手段24aでまず閾値Bを
越えた非優先セルは所定の頻度で廃棄し、閾値Aを越え
た非優先セルはすべて廃棄するようにセル廃棄指令信号
220を出力してもよい。また保留セル比較器22aは
、使用数と閾値を増やし精密制御をしてもよいし、優先
セルと非優先セルの入力割合などを監視し、動的に変化
する閾値を設定してもよい。In the above embodiment, the reserved cell comparator 22 and the cell discard determination means 24 compare the counted value with a predetermined threshold value using a plurality of reserved cell comparators 22a, in which the threshold value A is larger than the threshold value B, as shown in FIG. First, the cell discard determining means 24a may output a cell discard command signal 220 so that non-priority cells exceeding threshold B are discarded at a predetermined frequency, and all non-priority cells exceeding threshold A are discarded. Further, the reserved cell comparator 22a may perform precise control by increasing the number of used cells and the threshold value, or may monitor the input ratio of priority cells and non-priority cells, and set a dynamically changing threshold value.
【0019】また上記実施例で制御部4のセル廃棄条件
優先制御手段は図6のように、分割共通バッファ部2の
保留セル数と保留セルアドレス数を数えそれぞれ所定の
条件を満たす時だけ、非優先セルを廃棄してもよい。ま
ず保留セルカウンタ21と保留セル比較器22aとヘッ
ダ解読器23は上記実施例の図5と同じであり、分割共
通バッファ部2の保留セルアドレス計数信号230を出
線対応の各保留セルアドレスカウンタ25でカウントし
、各計数値を出線対応の各保留セルアドレス比較器26
で所定の閾値と比較する。つぎに保留セル比較器22a
と出線対応の各保留セルアドレス比較器26とヘッダ解
読器23の各結果からセル廃棄判定手段24bで図7の
ように判定し、所定の条件を満たす非優先セルだけを廃
棄するようにセル廃棄指令信号220を出力する。セル
廃棄判定手段24bは図7のように、まず入力セル10
が優先セルの場合、無条件に廃棄しない(手順S1,S
6)。つぎに非優先セルの場合、保留セル比較器22a
の閾値Aを越えたときは廃棄し、閾値Bを越えないとき
は廃棄しない(手順S2,S3,S5,S6)。さらに
非優先セルで保留セル比較器22aの閾値Aを越えない
で閾値Bを越えたときは、出線対応の各保留セルアドレ
ス比較器26の閾値を越えた出線宛先は廃棄し、越えな
い出線宛先は廃棄しない(手順S4〜S6)。なお出線
対応の各保留セルアドレス比較器26は、異なる閾値を
設定してもよい。Further, in the above embodiment, the cell discard condition priority control means of the control section 4 counts the number of reserved cells and the number of reserved cell addresses in the divided common buffer section 2, and only when respective predetermined conditions are satisfied, as shown in FIG. Non-priority cells may be discarded. First, the reserved cell counter 21, the reserved cell comparator 22a, and the header decoder 23 are the same as those in FIG. 25, and each count value is counted by each reserved cell address comparator 26 corresponding to the outgoing line.
is compared with a predetermined threshold value. Next, the reserved cell comparator 22a
Based on the results of each reserved cell address comparator 26 and header decoder 23 corresponding to the outgoing line, the cell discard determination means 24b makes a determination as shown in FIG. A discard command signal 220 is output. As shown in FIG.
is a priority cell, it is not discarded unconditionally (steps S1, S
6). Next, in the case of a non-priority cell, the reserved cell comparator 22a
If it exceeds threshold A, it is discarded, and if it does not exceed threshold B, it is not discarded (steps S2, S3, S5, S6). Furthermore, if the non-priority cell exceeds the threshold B without exceeding the threshold A of the reserved cell comparator 22a, the outgoing line destination that exceeds the threshold of each reserved cell address comparator 26 corresponding to the outgoing line is discarded and is not exceeded. The outgoing line destination is not discarded (steps S4 to S6). Note that each reserved cell address comparator 26 corresponding to an outgoing line may set a different threshold value.
【0020】なお上記実施例で出線対応の各保留セルア
ドレス比較器26とセル廃棄判定手段24bは図8のよ
うに、保留セルアドレス比較器26aで各保留セルアド
レスカウンタ25の各計数値を相互に比較し、セル廃棄
判定手段24cで図9のように非優先セルで保留セル比
較器の閾値Aを越えないで閾値Bを越えたときは、保留
セルアドレス比較器26aで相互に比較した最大計数値
の出線宛先は廃棄し、そのほかの出線宛先は廃棄しない
(手順S4a,S5,S6)ように判定してもよい。ま
た保留セルアドレス比較器26aは、相互に比較した最
大計数値でなく計数値の順番情報を出力し判定してもよ
い。In the above embodiment, each reserved cell address comparator 26 and cell discard determination means 24b corresponding to the outgoing line calculates each count value of each reserved cell address counter 25 by the reserved cell address comparator 26a, as shown in FIG. They are compared with each other, and when the non-priority cell exceeds the threshold B of the reserved cell comparator without exceeding the threshold A of the non-priority cell as shown in FIG. It may be determined that the outgoing line destination with the maximum count value is discarded, and the other outgoing line destinations are not discarded (steps S4a, S5, and S6). Further, the reserved cell address comparator 26a may output order information of the counted values instead of the maximum counted values compared with each other for determination.
【0021】また上記実施例でセル交換装置は、分割共
通バッファ形として説明したが、共通バッファ形や上記
実施例の図6と図8を除き入力バッファ形、出力バッフ
ァ形などでも適用できることはいうまでもない。Although the cell switching device in the above embodiment has been explained as a divided common buffer type, it is also applicable to a common buffer type, an input buffer type, an output buffer type, etc., except for the common buffer type, FIGS. 6 and 8 of the above embodiment. Not even.
【0022】[0022]
【発明の効果】上記のようなこの発明のセル交換装置で
は、入力セルの廃棄を非優先セルだけ条件的に優先制御
をする方式(セル廃棄条件優先制御方式)を採るから、
優先セルの廃棄に対する要求品質を満足し、かつ非優先
セルを必要以上に廃棄しないでバッファ領域を有効に使
用できる効果がある。[Effects of the Invention] The cell switching device of the present invention as described above adopts a method (cell discard condition priority control method) in which the discard of input cells is conditionally prioritized and controlled only for non-priority cells.
This has the effect of satisfying the required quality for discarding priority cells and effectively using the buffer area without discarding non-priority cells more than necessary.
【図1】この発明を示す一実施例のセル交換装置の機能
ブロック図。FIG. 1 is a functional block diagram of a cell switching device according to an embodiment of the present invention.
【図2】図1に示す制御部のセル廃棄条件優先制御手段
の一実施例の機能ブロック図。FIG. 2 is a functional block diagram of an embodiment of cell discard condition priority control means of the control unit shown in FIG. 1;
【図3】図2に示すセル廃棄条件優先制御手段の他の一
実施例の機能ブロック図。FIG. 3 is a functional block diagram of another embodiment of the cell discard condition priority control means shown in FIG. 2;
【図4】図1に示す制御部のセル廃棄条件優先制御手段
の他の一実施例の機能ブロック図。FIG. 4 is a functional block diagram of another embodiment of cell discard condition priority control means of the control unit shown in FIG. 1;
【図5】図4に示すセル廃棄条件優先制御手段の他の一
実施例の機能ブロック図。FIG. 5 is a functional block diagram of another embodiment of the cell discard condition priority control means shown in FIG. 4;
【図6】図1に示す制御部のセル廃棄条件優先制御手段
の他の一実施例の機能ブロック図。FIG. 6 is a functional block diagram of another embodiment of cell discard condition priority control means of the control unit shown in FIG. 1;
【図7】図6に示すセル廃棄判定手段のフロー図。FIG. 7 is a flow diagram of the cell discard determination means shown in FIG. 6;
【図8】図6に示すセル廃棄条件優先制御手段の他の一
実施例の機能ブロック図。FIG. 8 is a functional block diagram of another embodiment of the cell discard condition priority control means shown in FIG. 6;
【図9】図8に示すセル廃棄判定手段のフロー図。FIG. 9 is a flow diagram of the cell discard determination means shown in FIG. 8;
【図10】従来例のセル交換装置の機能ブロック図。FIG. 10 is a functional block diagram of a conventional cell switching device.
【図11】図10に示す制御部のセル廃棄一律優先制御
手段の機能ブロック図。FIG. 11 is a functional block diagram of cell discard uniform priority control means of the control unit shown in FIG. 10;
1 入力セル接続部
2 分割共通バッファ部
3 出力セル接続部
4 セル廃棄条件優先制御方式による制御部10
入力セル
20 出力セル
30 入力セルのヘッダ情報
40 書き込みアドレス指令
50 読み出しアドレス指令
60 保留セル末尾アドレス
70 保留セル先頭アドレス1 Input cell connection section 2 Division common buffer section 3 Output cell connection section 4 Control section 10 using cell discard condition priority control method
Input cell 20 Output cell 30 Input cell header information 40 Write address command 50 Read address command 60 Pending cell end address 70 Pending cell first address
Claims (3)
力セル接続部と、該入力セル接続部から入力セルを制御
部の書き込みアドレス指令で書き込み、保留し、制御部
の読み出しアドレス指令で出力セルを出力セル接続部に
読み出すとともに、保留セルのアドレスを出線対応に先
入れ先出し動作で保持するバッファ部と、該バッファ部
を複数の出線に接続する出力セル接続部と、前記入力セ
ル接続部から入力セルのヘッダ情報を解読し、入力セル
廃棄の優先制御をし、前記バッファ部に書き込み読み出
しアドレス指令をするとともに、前記バッファ部の保留
セルアドレスの末尾に新たに書き込んだアドレスを加え
、保留セルアドレスの先頭から順番に読み出したアドレ
スを未使用アドレスとして扱う制御部とを備えるセル交
換装置において、前記制御部で前記バッファ部の保留セ
ル満杯時だけ、入力優先セルを保留非優先セルのアドレ
スに上書きし、上書きされたアドレスを2度読みしない
ように制御し、当該非優先セルを廃棄するセル廃棄条件
優先制御手段を設けることを特徴とするセル交換装置。1. An input cell connection section that connects a plurality of input lines to a buffer section, and an input cell connection section through which an input cell is written and held in response to a write address command from a control section, and an output cell is written to and held in response to a read address command from the control section. a buffer unit that reads the address of the reserved cell to the output cell connection unit and holds the address of the reserved cell in a first-in, first-out operation corresponding to the outgoing line; an output cell connection unit that connects the buffer unit to a plurality of outgoing lines; It decodes the header information of the input cell, prioritizes discarding the input cell, issues a write/read address command to the buffer section, adds the newly written address to the end of the reserved cell address in the buffer section, and discards the reserved cell. In the cell switching device, the cell switching device includes a control unit that treats addresses sequentially read from the beginning of addresses as unused addresses, in which the control unit converts input priority cells to addresses of reserved non-priority cells only when the buffer unit is full of reserved cells. 1. A cell switching device comprising a cell discard condition priority control means for overwriting and controlling the overwritten address so as not to read it twice and discarding the non-priority cell.
え所定の条件を満たす時だけ、非優先セルを廃棄するセ
ル廃棄条件優先制御手段を設けることを特徴とする請求
項1記載のセル交換装置。2. Cell exchange according to claim 1, further comprising cell discard condition priority control means for counting the number of reserved cells in the buffer section in the control section and discarding non-priority cells only when a predetermined condition is satisfied. Device.
留セルアドレス数を数えそれぞれ所定の条件を満たす時
だけ、非優先セルを廃棄するセル廃棄条件優先制御手段
を設けることを特徴とする請求項1記載のセル交換装置
。3. A cell discard condition priority control means for counting the number of reserved cells and the number of reserved cell addresses in the buffer section in the control section and discarding non-priority cells only when respective predetermined conditions are satisfied. Item 1. Cell switching device according to item 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3079980A JPH04314235A (en) | 1991-04-12 | 1991-04-12 | cell exchange device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3079980A JPH04314235A (en) | 1991-04-12 | 1991-04-12 | cell exchange device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04314235A true JPH04314235A (en) | 1992-11-05 |
Family
ID=13705474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3079980A Pending JPH04314235A (en) | 1991-04-12 | 1991-04-12 | cell exchange device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04314235A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01236483A (en) * | 1988-03-16 | 1989-09-21 | Sanyo Electric Co Ltd | Signal track grasping device |
| JPH02184141A (en) * | 1989-01-10 | 1990-07-18 | Toshiba Corp | Buffer device |
-
1991
- 1991-04-12 JP JP3079980A patent/JPH04314235A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01236483A (en) * | 1988-03-16 | 1989-09-21 | Sanyo Electric Co Ltd | Signal track grasping device |
| JPH02184141A (en) * | 1989-01-10 | 1990-07-18 | Toshiba Corp | Buffer device |
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