JPH0430814Y2 - - Google Patents

Description

[Detailed Description of the Invention] "Industrial Application Field" This invention relates to a pulse generator that can provide pulses with known rise and fall times to various test circuits, measurement circuits, etc., for example.

"Prior Art" FIG. 3 shows a schematic structure of a conventional pulse generator. In the figure, 1 indicates a charge/discharge capacitor. Output pulses 4 are generated by taking out the voltage waveform generated in this charging/discharging capacitor 1 through a high-speed buffer 2 to an output terminal 3.

Here, this pulse generator has a structure in which the rise time T _rise and fall time T _fall of the pulse 4 can be freely set. That is, a charging current I _rise is applied to the charging/discharging capacitor 1 from the positive power supply 5 through the positive side variable current circuit 7 and the current switch 8, and the rising waveform of the output pulse 4 is generated. Charge/discharge capacitor 1
The charged voltage is discharged through the negative side variable current circuit 10 and the current switch 9 connected between the negative electrode power source 6 and the discharge current I _fall is drawn and discharged, thereby generating a falling waveform of the output pulse 4.

The current switches 8 and 9 are turned on and off alternately by the switching drive signal 12, and when the charging current I _rise is being supplied to the charging capacitor 1 from the positive side, the current switch 9 on the negative side is turned off. maintained. On the other hand, during the period when the positive side current switch 8 is off, the negative side current switch 9 is turned on and the voltage charged in the charging/discharging capacitor 1 is discharged.

By repeating this charging and discharging, a pulse waveform is generated in the charging/discharging capacitor 1, and this pulse waveform is outputted to the output terminal 3 through the high speed buffer amplifier 2.

Here, the positive side and negative side variable current circuits 7 and 10 are given a rise time control signal 13 that specifies the rise time of the pulse and a fall time control signal 14 that specifies the fall time, so that the charging current I _rise and the discharging current The rise time of pulse 4 depends on the value of the current I _fall .
The structure is such that a pulse with arbitrary _rise time T _rise and fall time T _fall can be generated by specifying T rise and fall time T _fall .

On the other hand, when the charging voltage of the charging/discharging capacitor 1 reaches the set voltage, the amplitude limiting diode 15 becomes conductive to limit the charging voltage of the charging/discharging capacitor 1 from increasing any further.

Furthermore, when the charging voltage of the charging/discharging capacitor 1 is discharged and the voltage across it reaches a specified negative voltage, the amplitude limiting diode 16 becomes conductive to prevent the voltage of the charging/discharging capacitor 1 from being drawn to the negative side of that voltage. limited to.

The voltage value at which these amplitude limiting diodes 15 and 16 conduct is determined by the amplitude control signal 17. In other words, the amplitude control signal 17 is applied to the buffer amplifier 1.
It is applied to the cathode of the amplitude limiting diode 15 and the cathode of the amplitude limiting diode 16 through 8 and 19, and defines the conduction start voltage of the diodes 15 and 16. Therefore, the amplitude value AP of the pulse 4 can be set to any value according to the setting of the amplitude limit signal 17.

In this way, the rise time T _rise of pulse 4 is
The fall time T _fall and amplitude value AP can be set arbitrarily, and the rise time T _rise , fall time T _fall and amplitude value AP of pulse 4 can be set to desired values according to the content of the test. It can be output.

"Problem to be Solved by the Invention" A charging current I _rise and a discharging current I _fall , which are defined by the positive side and negative side variable current circuits 7 and 10, flow through the amplitude limiting diodes 15 and 16. These charging currents
I _rise and discharge current I _fall change in conjunction with changing the rise time T _rise and _fall time T fall of pulse 4, which has the drawback of changing the amplitude value AP of output pulse 4. be.

In other words, the forward conduction current of the diode has a square characteristic as shown in FIG. 4, so when the conduction current I _F changes, the voltage drops V _F1 and V _F2 across the diodes 15 and 16 change. For this reason, when the rise time T _rise and fall time T _fall are changed, the amplitude value AP changes and the amplitude control signal 17
, and the amplitude value AP of output pulse 4 is no longer regulated to a known value.
There is a drawback that the reliability of data obtained from tests, measurements, etc. becomes low.

The object of this invention is to provide a pulse generator which can suppress changes in the amplitude of an output pulse caused by the voltage-current characteristics of an amplitude limiting diode, and therefore can maintain a constant amplitude even if the rise time and fall time are changed.

"Means for solving the problem" In this invention, in a pulse generator that applies a charging current and a discharging current to a charging/discharging capacitor and outputting a voltage signal generated across the charging/discharging capacitor as a pulse waveform, An analog subtracter is provided on the input side of the buffer amplifier that applies a voltage that specifies the amplitude limit value to the amplitude limiting diode, and a pair of dummy diodes with the same characteristics as the amplitude limiting diode are provided. Apply a current that changes in the same way as the charging current and discharging current that define the fall time, extract the forward voltage drop as a compensation voltage, and apply it to an analog subtracter.The analog subtracter generates an amplitude control signal using a dummy diode. The structure is such that the compensation voltage is subtracted to remove fluctuations in the amplitude limiting voltage.

According to the configuration of this invention, when the values of the charging current and discharging current applied to the charging/discharging capacitor are changed in order to change the rise and fall times of the output pulse, the current flowing through the dummy diode changes in conjunction with this. Then, change the value of the compensation voltage given to the analog subtracter.

The voltage applied to the amplitude limiting diode is corrected by this change in the compensation voltage, and voltage fluctuations occurring in the amplitude limiting diode can be canceled out.

Therefore, according to this invention, even if the pulse rise and fall times are changed, the pulse amplitude value is maintained at a constant value, and it is possible to output a pulse with a specified amplitude value. The reliability of tests or measurements can be improved.

"Embodiment" FIG. 1 shows an embodiment of this invention. In FIG. 1, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and redundant explanation thereof will be omitted.

In this invention, the amplitude limiting diode 15
and a buffer amplifier 1 that provides an amplitude limiting voltage to and 16.
Analog subtracters 21 and 22 are provided on the input sides of the variable current circuits 7 and 19, and a rise time control signal 13 and a fall time control signal 14 that define the rise and fall times to be applied to the variable current circuits 7 and 10 are applied. Dummy diodes 23 and 24 are provided to which currents that vary in the same way as the charging current I _rise and the discharging current I _fall applied to the discharge capacitor 1 are provided, and the voltages generated in the dummy diodes 23 and 24 are applied to the analog subtracters 21 and 22. The analog subtracters 21 and 22 are configured to remove the forward voltage drop generated across the amplitude limiting diodes 15 and 16.

In this embodiment, buffer amplifiers 25 and 26 are provided, and rise time and fall time control signals 13 and 14 are input to the buffer amplifiers 25 and 26.
A case is shown in which the output is applied to dummy diodes 23 and 24 through voltage-current conversion resistors 27 and 28.

With this configuration, a current corresponding to the values of the rise time and fall time control signals 13 and 14 flows through the dummy diodes 23 and 24, and this current causes the dummy diodes 23 and 24 to have a forward voltage V _F1 '.
and V _F2 ′ occur.

The forward voltages V _F1 ′ and V _F2 ′ generated in the dummy diodes 23 and 24 are applied to analog subtracters 21 and 22 and subtracted from the amplitude control signal 17 .

Therefore, the cathode of the amplitude limiting diode 15 receives a voltage E _C - which is the value E _C of the amplitude control signal 17 minus the forward voltage V _F1 ' of the dummy diode 23.
V _F1 ′ is given. If the forward voltage of the amplitude limiting diode 23 is V _F1 , the amplitude limiting diode 15 becomes conductive when the charging voltage of the charging/discharging capacitor 1 reaches this voltage E _C -V _F1 '+V _F1 .

Further, the anode of the amplitude limiting diode 16 is given a voltage -(E _C -V _F2 ') obtained by subtracting the forward voltage V _F2 ' of the dummy diode 24 from the value E _C of the amplitude control signal 17 and inverting the polarity. If the forward voltage of the amplitude limiting diode 24 is V _F2 , then the discharge voltage of the charge/discharge capacitor 1 is V _F2 , then the discharge current of the charge/discharge capacitor 1 is the voltage −(E _C −V _F2 ′)−V _F2
When the amplitude is reached, the amplitude limiting diode 16 becomes conductive.

Forward voltages V _F1 ′ and V _F2 generated in amplitude limiting diodes 15 and 16 and dummy diode 2
Since the forward voltages V _F1 ′ and V _F2 ′ generated at ports 3 and 24 are configured to change in conjunction with the rise time control signal 13 and the fall time control signal 14, respectively, V _F1 =V _F1 ′ and V It can be seen as _F2 = V _F2 ´.

As a result, the conduction start voltage of the amplitude limiting diodes 15 and 16 is E _C on the positive side and -E _C on the negative side,
The amplitude AP of the output pulse 4 is the value of the amplitude limit signal 17
Specified by E _C only.

Even when the value E _C of the amplitude control signal 17 is changed, if the characteristics of each diode 15, 16, 23, and 24 match, the conduction start voltage of the amplitude limiting diodes 15 and 16 will be the value E of the amplitude control signal 17. Defined only by _C. As a result, even if the amplitude value AP of the output pulse 4 is changed by changing the value E _C of the amplitude control signal 17, the conduction start voltage of the amplitude limiting diodes 15 and 16 depends only on the value E _C of the amplitude control signal 17. stipulated.

"Modified Embodiment" FIG. 2 shows a modified embodiment of this invention. In this example, the rise time control signal 13 and the fall time control signal 14 are applied to variable current circuits 31 and 32, respectively, and the variable current circuits 31 and 32 cause currents to vary in conjunction with the rise time control signals 13 and 14.
I′ _rise and I′ _fall are obtained, and these currents I′ _rise and I
′ _fall
is applied to the dummy diodes 23 and 24 so as to obtain compensation signals corresponding to the rise time setting value and fall time setting value from the dummy diodes 23 and 24, respectively, and supplying this compensation signal to the analog subtracters 21 and 22. This shows a case in which the amplitude limiting voltage is corrected.

Even with this configuration, it is possible to eliminate changes in the amplitude limiting voltage caused by the voltage-current characteristics of the amplitude limiting diodes 15 and 16.

"Effects of the invention" As explained above, according to this invention, in a pulse generator configured so that the rise time and fall time can be arbitrarily varied and set,
Even if the rise time and fall time are changed, the change in the forward voltage generated in the amplitude limiting diodes 15 and 16 is eliminated by the compensation voltage generated in the dummy diodes 23 and 24.

As a result, the amplitude value AP of the output pulse 4 is determined only by the value E _C of the amplitude control signal 17, and can always be treated as a known value.

Therefore, the reliability of various tests and measurements performed using this output pulse 4 can be improved.

[Brief explanation of the drawing]

Fig. 1 is a connection diagram showing one embodiment of this invention, Fig. 2 is a connection diagram showing a modified embodiment of this invention, and Fig. 3 is a connection diagram showing an embodiment of this invention.
The figure is a connection diagram for explaining the conventional technique, and FIG. 4 is a characteristic curve diagram showing the characteristics of a diode shown for explaining the drawbacks of the conventional technique.

Claims (1)

[Scope of Claim for Utility Model Registration] A. A positive side variable current circuit that applies a charging current to the charge/discharge capacitor and defines the pulse rise time, and B. A positive side variable current circuit that draws the current charged in the charge/discharge capacitor and determines the pulse fall time. A pair of amplitude limiting diodes that become conductive to define the positive and negative side voltage values of the pulse when the charging voltage and discharging voltage of the charging/discharging capacitor reach the specified values; , D a pair of buffer amplifiers that apply a conduction start voltage to these pair of amplitude limiting diodes, E an analog subtraction circuit provided on the input side of this pair of buffer amplifiers, F an analog subtraction circuit provided with the above pair of amplitude limits to this analog subtraction circuit. a pair of dummy diodes that provide a compensation voltage corresponding to fluctuations in the forward conduction voltage generated in the dummy diodes;