JPH04236568A - Edit processing system and equipment in picture reader - Google Patents

Abstract

PURPOSE:To improve the edit picture capability by counting clock signals with different periods resulting from a reference clock frequency-divided at a frequency division ratio in response to a size of an original picture so as to generate an address signal and reading an edit attribute data so as to reduce an edit unit area. CONSTITUTION:When an edit unit area is decided, edit attribute data ED0-3 designated by the operator from an operation panel and in response to the content of edit are written in an edit memory 26 by a CPU 19 according to each edit unit area. In the case of implementing main scanning, a read picture data DV2 is inputted to an edit processing section 14 and the edit attribute data ED stored in the edit memory 26 is read for the edit while its address is designated by address counters 23, 24. In this case, a designation signal 5 with a frequency division ratio in response to an original size is inputted to frequency division circuits 21, 22 and one pulse is outputted for each edit unit and the pulse is counted by the counters 23, 24. As a result, the edit data ED corresponding to the data DV2 is outputted from the memory 26 to the processing section 14.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an editing processing method and apparatus in which the minimum editing unit area in which editing processing can be performed is variable in an image reading device.

0002

2. Description of the Related Art Conventionally, image reading devices have been known that perform various editing processes on image data obtained by reading with an image sensor, such as negative/positive inversion processing, masking processing, or pseudo halftone processing. It is being Such an image reading device is provided with an editing memory for storing editing attribute data for specifying editing processing contents for each editing unit area in which the original image is subdivided (Japanese Patent Laid-Open No. 63-46871). Public bulletin).

[0003] Since the editing unit area is the smallest image area that can be edited, the smaller the editing unit area, the higher the editing density and the higher the editing processing capacity of the device.

Conventionally, the size of the editing unit area is
It is fixedly determined by the maximum image size (maximum size) that can be processed by the device and the capacity of the editing memory.

[0005]

[Problem to be Solved by the Invention] Therefore, when a manuscript whose size is smaller than the maximum size is read, the size of the editing unit area becomes large relative to the manuscript size, and the size of the editing unit area in the editing memory becomes large. There was a problem in that the free space increased and its usage efficiency was poor.

[0006] Furthermore, in order to increase the editing processing capacity by reducing the editing unit area, the capacity of the editing memory must be increased, resulting in an increase in cost.

For example, when the maximum size is A3 and the editing unit area is 1 x 2 mm, when reading an A4 document whose area is half that, the size of the editing unit area relative to the original size is The ratio is doubled, and half of the capacity of the editing memory becomes an empty area. In order to reduce the editing unit area to half, 1 x 1 mm,
The capacity of the editing memory must be doubled.

In view of the above-mentioned problems, the present invention aims at effective use of editing memory, and when the original size is smaller than the maximum size, the editing unit area is made smaller to improve the editing processing capacity. The purpose is to provide a processing method and apparatus.

[0009]

[Means for Solving the Problems] In order to solve the above-mentioned problems, the system according to the invention of claim 1 includes an image sensor for reading an original image, and an editing method for the image data read by the image sensor. It has an editing processing means for performing processing, and an editing memory for storing editing attribute data for instructing the contents of editing processing by the editing processing means for each editing unit area obtained by subdividing the manuscript image. In the image reading device, the editing unit area is changed according to the size of the original image.

The apparatus according to the second aspect of the present invention includes an image sensor for reading a document image, and an editing apparatus for sequentially performing editing processing on each unit image data of the image data read by the image sensor. a processing means, an editing memory for storing editing attribute data for instructing editing processing contents by the editing processing means for each editing unit area obtained by subdividing the manuscript image, and a memory for accessing the editing memory. An image reading device comprising an address generating means for generating an address signal,
The address generating means includes variable clock generating means for generating a clock signal having a different period depending on the size of the original image, and a counting means for counting the clock signal and outputting an address signal.

[0011]

[Operation] The variable clock generating means divides the reference clock, for example, at a frequency division ratio depending on the size of the original image, and generates a clock signal having a different cycle depending on the size of the original image.

The counting means counts the clock signal and generates an address signal, and uses this address signal to address the editing memory and read out the editing attribute data. The size of the editing unit area is changed depending on the cycle of the clock signal generated by the variable clock generating means.

[0013]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 2 is a block diagram of an image reading device 1 according to the present invention.

The image reading device 1 includes a CCD 11, an AD conversion section 12, an image processing section 13, an editing processing section 14, and an external IF.
15, an editing signal generating section 16, a clock generating section 17, a system memory 18, a CPU 19, and the like.

The CCD 11 is a one-dimensional photoelectric conversion element that reads an image of a document as it moves relative to the sub-scanning direction and converts it into an electrical signal. CCD
11 sequentially outputs an analog signal SV1 having a value corresponding to the density of each pixel of the original image.

The AD converter 12 converts the analog signal SV1 output from the CCD 11 into image data DV1, which is an 8-bit digital signal.

The image processing section 13 performs shading correction processing, scaling processing, gamma correction processing, edge enhancement processing, smoothing processing, etc. on the image data DV1 converted by the AD conversion section 12, and converts the image data DV2 into image data DV2. Output.

The editing processing section 14 performs various editing processes such as negative/positive inversion processing, masking processing, or pseudo halftone processing, and outputs image data DV3. Such editing processing is performed for each unit image data in the original image, for example, 1
This is performed for each pixel of image data. The editing content is specified by editing attribute data ED output from the editing signal generating section 16. The editing content is specified for each editing unit area. Details will be described later.

The external IF unit 15 outputs the image data DV3 to an external data processing device such as a printer device,
In addition, various control signals are input from these devices, etc.
It is used to exchange various data and signals.

The editing signal generating section 16 outputs editing attribute data ED for specifying the editing content by the editing processing section 14. To specify the editing content using the editing attribute data ED,
Editing is performed for each unit area in which the original image is subdivided, and the editing content can be changed if the editing unit area changes. In other words, the editing unit area is the smallest image area on which editing processing can be performed. In this embodiment, the size of the editing unit area is changed depending on the size of the document to be read.

The clock generator 17 generates a clock signal S2 necessary for transferring or processing the image data DV.

The system memory 18 includes RAM and ROM.
It stores programs and data necessary for processing by the CPU 19.

The CPU 19 controls the entire image reading apparatus 1 in addition to writing editing attribute data into an editing memory 26 (to be described later) according to specified editing contents.

FIG. 1 is a block diagram showing the main parts of an image reading apparatus 1 including an editing signal generating section 16 according to the present invention.

The editing signal generating section 16 includes frequency dividing circuits 21 and 22 in the main scanning direction and sub-scanning direction, and an address counter 23.
, 24, an address selector 25, an editing memory 26, a data selector 27, and the like.

The frequency dividing circuit 21 in the main scanning direction receives a clock signal S2, which is also a clock pulse for sequentially outputting the image data DV2 pixel by pixel, and divides the frequency thereof. The frequency dividing circuit 22 in the sub-scanning direction inputs a horizontal synchronizing signal S3 when reading a document, that is, a signal outputted once for each line in the main scanning direction, and divides this signal. These frequency division ratios are designated by a frequency division ratio designation signal 5 from the CPU 19.

Address counters 23 and 24 count output pulses from frequency dividing circuits 21 and 22, respectively,
The integrated count value is sent to address signals A0-7, A8-1.
Output as 5. One address counter 23 also outputs a select signal S6 to the data selector 27. The select signal S6 is a signal for switching between the upper 4 bits and the lower 4 bits of 8-bit data.

Address counter 23 receives horizontal synchronization signal S
The address counter 24 is reset by the vertical synchronization signal S4, that is, for each page of the document.

The address selector 25 receives address signals A0-7, A output from the address counters 23, 24.
8 to 15 and the address signal A output from the CPU 19.
0 to 15 are switched and outputted by a select signal S7 output from the CPU 19, and the address of the editing memory 26 is specified.

The editing memory 26 stores editing attribute data ED for instructing the contents of editing processing by the editing processing unit 14.
This is a readable and writable memory for storing each editing unit area. When writing edit attribute data ED, CPU1
9, and address counters 23 and 24 during reading.

In this embodiment, the editing memory 26 has a capacity of 64 Kbytes (16 bits x 8 bits), and 8-bit data D0 to D7 are read or written by addressing with 16 bits. Further, since the edit attribute data ED is 4 bits, it is stored in either the upper 4 bits or the lower 4 bits in one address. In other words, one address has two edit attribute data ED.
is stored. As a result, the memory area can be used effectively, and the access speed of the edit attribute data ED can be increased. Note that the reading and writing operations of the editing memory 26 are as follows.
It is specified by the RD signal, WR signal, and CS signal.

The data selector 27 receives a select signal S6.
The data D0 read out from the editing memory 26 by
7, either the upper 4 bits or the lower 4 bits are alternately selected and output to the editing processing section 14 as editing attribute data ED0 to ED3.

FIG. 3 is a block diagram showing the circuit of the editing processing section 14.

The editing processing unit 14 includes an exclusive OR element 31,
AND element 32, comparator 33, data selector 3
4, a dither matrix ROM 35, and a simple binarization threshold generation section 36.

An exclusive OR operation is performed on each bit of the image data DV2 with a negative/positive inversion signal ED0, which is one of the editing attribute data ED0 to ED3. As a result, negative/positive inversion processing is performed when the negative/positive inversion signal ED0 is "1". For example, in the case of a black and white image, black and white are reversed.

Then, an AND operation is performed between the output of the exclusive OR element 31 and the masking signal ED1, whereby masking processing is performed when the masking signal ED1 is "0". When masking processing is performed, that portion of the image is erased.

Further, the comparator 33 performs binarization processing to obtain 1-bit image data DV3. The binarization process by the comparator 33 is a simple binarization process based on a constant threshold value read from the simple binarization threshold generation unit 36.
Either the value processing or the pseudo halftone processing based on the dither data read from the dither matrix ROM 35 is selected by the binary/halftone switching signal ED2.

In the case of pseudo-halftone processing, either the 16-gradation dither data or the 64-gradation dither data stored in the dither matrix ROM 35 is selected by the gradation switching signal ED3.

Next, the processing operation of the image reading device 1 will be explained with a focus on the editing signal generating section 16.

When a preliminary scan is performed and the original is read by the CCD 11, the CPU 19 recognizes its vertical and horizontal lengths and size (for example, A3 or A4). The size of the editing unit area is determined based on this size.

For example, in the case of an A3 document, which is the maximum size that can be read by the image reading device 1, the editing unit area is 1 mm in the main scanning direction and 2 mm in the sub-scanning direction. In the case of an A4 document, which has half the area, the editing unit area is also 1 mm in the sub-scanning direction. For pixels included in one editing unit area, the same editing attribute data D
E is given, and editing processing is performed using the same editing content.

When the editing unit area is determined, the editing attribute data ED0 to ED3 corresponding to the editing content specified by the operator from the operation panel (not shown) is written to the editing memory 26 by the CPU 19 for each editing unit area. It will be done.

[0044] Note that the editing unit area or editing content is
19 may be directly designated from an external screen or the like.

Next, when the main scan is performed, the read image data DV2 is input to the editing processing section 14, and the editing attribute data ED stored in the editing memory 26 is
The address is designated and read by the address counters 23 and 24, and editing is performed based on the read editing attribute data ED.

At this time, the frequency division ratio designation signal 5 of the frequency division ratio corresponding to the document size is inputted to the frequency division circuits 21 and 22.
As a result, one pulse is output for each previously determined editing unit area, and the address counters 23 and 24 are incremented. As a result, the editing attribute data ED corresponding to the image data DV2 input to the editing processing section 14 is read out from the editing memory 26 and output to the editing processing section 14.

That is, in this embodiment, the frequency dividing circuit 2
1 and 22 correspond to the variable clock generating means of the present invention, address counters 23 and 24 correspond to the counting means of the present invention, and these correspond to the address generating means of the present invention.

According to the above embodiment, since the size of the editing unit area is determined according to the original size, the entire memory area of the editing memory 26 can be used effectively, and when the original size is small, the size of the editing unit area is determined. The editing density can be increased by reducing the editing unit area. Note that the size of the editing unit area can be changed to correspond to not only a standard size such as A3 or A4, but also a document of any size.

[0049] Generally, the entire surface of a document is considered to be an image, so the size of the document and the size of the document image match, but considering that there is an image in a part of the document, it is possible to The size of the original image may also be detected or specified.

In the above-described embodiment, if only one of the vertical and horizontal directions of the editing unit area can be changed, one of the frequency dividing circuits 21 and 22 can be omitted. In addition, if the editing unit area is to have only two types, large and small, for example, only a switching circuit between a clock signal for equal magnification and a clock signal obtained by dividing the frequency by two is provided in place of the frequency dividing circuits 21 and 22. These can simplify the hardware circuit.

In the above embodiment, the edit attribute data ED is 4 bits, but it may be 3 bits or less or 5 bits or more. Further, although the editing memory 26 is configured to have 8 bits per address, it may be 4 bits or 16 bits. Although the memory area of the editing memory 26 is 64 Kbytes, it may be other than this, and the editing memory 26 may be realized by a plurality of memory chips or by a partial area of one memory chip. Furthermore, the configurations of the editing signal generating section 16, the editing processing section 14, and other parts of the image reading device 1, the editing contents by the editing processing section 14, the processing procedure by the CPU 19, etc. can be changed in various ways other than those described above.

[0052]

According to the present invention, it is possible to effectively utilize the editing memory, and when the document size is smaller than the maximum size, it is possible to reduce the editing unit area and improve the editing processing capacity.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main parts of an image reading device centering on an editing signal generating section according to the present invention.

FIG. 2 is a block diagram of an image reading device according to the present invention.

FIG. 3 is a block diagram showing a circuit of an editing processing section.

[Explanation of symbols]

1 Image reading device 11 CCD (image sensor) 14 Editing processing unit (editing processing means) 19 CPU 26 Editing memories 21, 22 Frequency dividing circuit (variable clock generation means) 23
, 24 Address counter (counting means) ED
Edit attribute data

Claims (2)

[Claims] Claim 1: An image sensor that reads a document image;
An editing processing means for performing editing processing on the image data obtained by reading by the image sensor, and editing attribute data for instructing the content of editing processing by the editing processing means, the original image being subdivided. An editing processing method in an image reading device comprising an editing memory for storing each editing unit area, wherein the editing unit area is changed according to the size of the document image. . Claim 2: An image sensor that reads a document image;
Editing processing means for sequentially performing editing processing for each unit image data on the image data obtained by reading by the image sensor; and editing attribute data for instructing the content of editing processing by the editing processing means. , an image reading device comprising: an editing memory for storing the document image in each subdivided editing unit area; and address generation means for generating an address signal for accessing the editing memory; The generating means includes variable clock generating means for generating clock signals with different cycles depending on the size of the document image, and counting means for counting the clock signals and outputting an address signal. An editing processing device in an image reading device.